公开(公告)号：US10002842B2

公开(公告)日：2018-06-19

申请号：US15132711

申请日：2016-04-19

申请人： Commissariat A L'Energie Atomique Et Aux Energies Alternatives

发明人： François Marion

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H05K3/10

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/114 ,  H01L2224/11452 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/1161 ,  H01L2224/11614 ,  H01L2224/11827 ,  H01L2224/11901 ,  H01L2224/13011 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13172 ,  H01L2224/1318 ,  H01L2224/13184 ,  H01L2224/13566 ,  H01L2224/13582 ,  H01L2224/13624 ,  H01L2224/13687 ,  H01L2224/16145 ,  H01L2224/81099 ,  H01L2224/81193 ,  H01L2224/81208 ,  H01L2224/81355 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H05K3/10 ,  Y10T29/49117 ,  H01L2924/00014 ,  H01L2224/131

摘要： A method of producing a hybridized device including two microelectronic components, including a first microelectronic component having conductive inserts on a connection surface, and a second microelectronic component having ductile conductive pads on a surface opposed to the connection surface, is provided. The method includes the steps of hybridizing the first and second electronic components face-to-face by arranging the connection surface of the first microelectronic component to oppose the surface of the second microelectronic component having the ductile conductive pads, and establishing an electro-mechanical connection between the first microelectronic component and the second microelectronic component by inserting, at ambient temperature, inserts of the first microelectronic component, provided with a second metal sub-layer, into the ductile conductive pads of the second microelectronic component.

公开(公告)号：US20170345739A1

公开(公告)日：2017-11-30

申请号：US15289187

申请日：2016-10-09

申请人： International Business Machines Corporation

发明人： Daniel C. Edelstein ,  Chih-Chao Yang

IPC分类号： H01L23/48 ,  H01L21/822 ,  H01L21/768 ,  H01L27/06 ,  H01L23/532

CPC分类号： H01L23/481 ,  H01L21/76856 ,  H01L21/76873 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L24/94 ,  H01L25/065 ,  H01L27/0688 ,  H01L2224/04 ,  H01L2224/04026 ,  H01L2224/05009 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/06102 ,  H01L2224/08146 ,  H01L2224/13009 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/13583 ,  H01L2224/13657 ,  H01L2224/13666 ,  H01L2224/13673 ,  H01L2224/13676 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/13687 ,  H01L2224/29006 ,  H01L2224/29187 ,  H01L2224/32146 ,  H01L2224/73204 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/05442 ,  H01L2224/83 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/0499 ,  H01L2924/01027 ,  H01L2924/0498 ,  H01L2924/01044 ,  H01L2224/08 ,  H01L2224/80 ,  H01L2224/81

摘要： An advanced through silicon via structure for is described. The device includes a substrate including integrated circuit devices. A high aspect ratio through substrate via is disposed in the substrate. The through substrate via has vertical sidewalls and a horizontal bottom. The substrate has a horizontal field area surrounding the through substrate via. A metallic barrier layer is disposed on the sidewalls of the through substrate via. A surface portion of the metallic barrier layer has been converted to a nitride surface layer by a nitridation process. The nitride surface layer enhances the nucleation of subsequent depositions. A first metal layer fills the through substrate via and has a recess in an upper portion. A second barrier layer is disposed over the recess. A second metal layer is disposed over the second barrier layer and creates a contact.

公开(公告)号：US09748135B2

公开(公告)日：2017-08-29

申请号：US14828608

申请日：2015-08-18

申请人： International Business Machines Corporation ,  SUSS MicroTec Photonic Systems Inc.

发明人： Yuri M. Brovman ,  Brian M. Erwin ,  Nicholas A. Polomoff ,  Jennifer D. Schuler ,  Matthew E. Souter ,  Christopher L. Tessler

IPC分类号： H01L21/768

CPC分类号： H01L21/76841 ,  H01L21/76825 ,  H01L21/76837 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03614 ,  H01L2224/03632 ,  H01L2224/0381 ,  H01L2224/039 ,  H01L2224/0401 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/1182 ,  H01L2224/13007 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13687 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/00012

摘要： A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.

公开(公告)号：US20170033075A1

公开(公告)日：2017-02-02

申请号：US15294508

申请日：2016-10-14

申请人： Advanced Semiconductor, Inc.

发明人： Min-Fong SHU ,  Yi-Hsiu TSENG ,  Kuan-Neng CHEN ,  Shu-Chiao KUO

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L24/81 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3142 ,  H01L23/3185 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/564 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05623 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05672 ,  H01L2224/05676 ,  H01L2224/05678 ,  H01L2224/1182 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13582 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/13618 ,  H01L2224/13623 ,  H01L2224/13624 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13663 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13676 ,  H01L2224/13678 ,  H01L2224/13687 ,  H01L2224/1607 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/16501 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81096 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81395 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81418 ,  H01L2224/81423 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81457 ,  H01L2224/81463 ,  H01L2224/81464 ,  H01L2224/81466 ,  H01L2224/81476 ,  H01L2224/81478 ,  H01L2224/81487 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/81898 ,  H01L2224/83104 ,  H01L2224/83193 ,  H01L2224/92125 ,  H01L2924/00015 ,  H01L2924/15311 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2224/8109 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/053

摘要： A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.

摘要翻译： 一种接合结构的制造方法包括：（a）提供基板，其中所述基板包括顶表面和邻近所述基板顶表面设置的至少一个接合焊盘，至少一个接合焊盘，其具有倾斜表面，其具有第一 坡; （b）提供半导体元件，其中所述半导体元件包括至少一个支柱，并且至少一个支柱具有具有第二斜率的侧壁，其中所述第一斜率的绝对值小于所述第二斜率的绝对值; 和（c）将至少一个柱结合到所述至少一个接合焊盘中相应的一个焊盘的倾斜表面的一部分上。

公开(公告)号：US20150357235A1

公开(公告)日：2015-12-10

申请号：US14828608

申请日：2015-08-18

申请人： International Business Machines Corporation ,  SUSS MicroTec Photonic Systems Inc.

发明人： Yuri M. Brovman ,  Brian M. Erwin ,  Nicholas A. Polomoff ,  Jennifer D. Schuler ,  Matthew E. Souter ,  Christopher L. Tessler

IPC分类号： H01L21/768

CPC分类号： H01L21/76841 ,  H01L21/76825 ,  H01L21/76837 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76865 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/53238 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03614 ,  H01L2224/03632 ,  H01L2224/0381 ,  H01L2224/039 ,  H01L2224/0401 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/1182 ,  H01L2224/13007 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13687 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/04941 ,  H01L2924/00012

摘要： A method of selectively locating a barrier layer on a substrate includes forming a barrier layer on a surface of the substrate. The barrier layer comprises of a metal element and a non-metal element. The barrier layer may also be formed from a metal element and non-metal element. The method further includes forming an electrically conductive film layer on the barrier layer, and forming a metallic portion in the electrically conductive film layer. The method further includes selectively ablating portions of the barrier layer from the dielectric layer to selectively locate place the barrier layer on the substrate.

公开(公告)号：US09165888B2

公开(公告)日：2015-10-20

申请号：US14222467

申请日：2014-03-21

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Warren M. Farnworth ,  David R. Hembree

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L21/768 ,  H01L23/48

CPC分类号： H01L23/5384 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/03444 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05611 ,  H01L2224/114 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1161 ,  H01L2224/1162 ,  H01L2224/1182 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/11831 ,  H01L2224/11903 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13075 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13687 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81205 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/81898 ,  H01L2224/831 ,  H01L2224/83141 ,  H01L2224/83193 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes a second semiconductor substrate having a second substrate material with a preformed recess. The penetrating structure of the first semiconductor substrate is received in the recess of the second semiconductor substrate and is mechanically engaged with the recess and secured to the second semiconductor substrate.

摘要翻译： 公开了用于堆叠管芯的互连结构，包括贯穿硅通孔的穿透结构以及相关的系统和方法。 根据特定实施例的系统包括具有第一衬底材料的第一半导体衬底和由第一半导体衬底承载的穿透结构。 该系统还包括第二半导体衬底，该第二半导体衬底具有带有预制凹槽的第二衬底材料。 第一半导体衬底的穿透结构被容纳在第二半导体衬底的凹部中，并且与凹部机械地接合并固定到第二半导体衬底。

公开(公告)号：US20140335687A1

公开(公告)日：2014-11-13

申请号：US14444759

申请日：2014-07-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yi-Wen WU ,  Cheng-Chung LIN ,  Chien Ling HWANG ,  Chung-Shi LIU

IPC分类号： H01L21/768

CPC分类号： H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05541 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/10145 ,  H01L2224/11002 ,  H01L2224/1112 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13551 ,  H01L2224/13561 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/1358 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13686 ,  H01L2224/13687 ,  H01L2224/13688 ,  H01L2224/1369 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2924/01007 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/00 ,  H01L2224/05552

摘要： A method of making a semiconductor device includes forming an under bump metallurgy (UBM) layer over a substrate, the UBM layer comprising sidewalls and a surface region. The method further includes forming a conductive pillar over the UBM layer, the conductive pillar includes sidewalls, wherein the conductive pillar exposes the surface region of the UBM layer. The method further includes forming a non-metal protective structure over the sidewalls of the conductive pillar, wherein the non-metal protective structure contacts the surface region of the UBM layer, and the non-metal protective structure exposes the sidewalls of the UBM layer.

摘要翻译： 制造半导体器件的方法包括在衬底上形成凸块下金属（UBM）层，UBM层包括侧壁和表面区域。 所述方法还包括在所述UBM层上形成导电柱，所述导电柱包括侧壁，其中所述导电柱暴露所述UBM层的表面区域。 所述方法还包括在所述导电柱的侧壁上形成非金属保护结构，其中所述非金属保护结构接触所述UBM层的表面区域，并且所述非金属保护结构暴露所述UBM层的侧壁。

公开(公告)号：US20140206145A1

公开(公告)日：2014-07-24

申请号：US14222467

申请日：2014-03-21

申请人： MICRON TECHNOLOGY, INC.

发明人： Owen R. Fay ,  Warren M. Farnworth ,  David R. Hembree

IPC分类号： H01L23/00

CPC分类号： H01L23/5384 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/03444 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05551 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05611 ,  H01L2224/114 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1161 ,  H01L2224/1162 ,  H01L2224/1182 ,  H01L2224/11823 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/11831 ,  H01L2224/11903 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13075 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13562 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13687 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73257 ,  H01L2224/81139 ,  H01L2224/81191 ,  H01L2224/81205 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/81898 ,  H01L2224/831 ,  H01L2224/83141 ,  H01L2224/83193 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

摘要： Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes a second semiconductor substrate having a second substrate material with a preformed recess. The penetrating structure of the first semiconductor substrate is received in the recess of the second semiconductor substrate and is mechanically engaged with the recess and secured to the second semiconductor substrate.

摘要翻译： 公开了用于堆叠管芯的互连结构，包括贯穿硅通孔的穿透结构以及相关的系统和方法。 根据特定实施例的系统包括具有第一衬底材料的第一半导体衬底和由第一半导体衬底承载的穿透结构。 该系统还包括第二半导体衬底，该第二半导体衬底具有带有预制凹槽的第二衬底材料。 第一半导体衬底的穿透结构被容纳在第二半导体衬底的凹部中，并且与凹部机械地接合并固定到第二半导体衬底。

公开(公告)号：US20140124877A1

公开(公告)日：2014-05-08

申请号：US13764261

申请日：2013-02-11

申请人： QUALCOMM INCORPORATED

发明人： Yangyang Sun ,  Lily Zhao ,  Michael Han

IPC分类号： H01L29/43 ,  H01L29/84 ,  H01L21/768 ,  H01L23/498

CPC分类号： H01L29/43 ,  B81B2207/093 ,  B81C1/00269 ,  B81C2203/019 ,  H01L21/768 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/03019 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/10126 ,  H01L2224/11019 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/1183 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13138 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13163 ,  H01L2224/13565 ,  H01L2224/13687 ,  H01L2224/13688 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/05442 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/01034 ,  H01L2924/0109 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A conductive interconnect includes an inorganic collar. The conductive interconnect includes a conductive support layer. The conductive interconnect also includes a conductive material on the conductive support layer. The conductive interconnect further includes an inorganic collar partially surrounding the conductive material. The inorganic collar is also disposed on sidewalls of the conductive support layer.

摘要翻译： 导电互连包括无机套环。 导电互连包括导电支撑层。 导电互连件还包括在导电支撑层上的导电材料。 导电互连还包括部分地围绕导电材料的无机套管。 无机套环也设置在导电支撑层的侧壁上。

公开(公告)号：US20140042630A1

公开(公告)日：2014-02-13

申请号：US13569674

申请日：2012-08-08

申请人： Stephen P. Ayotte ,  Timothy H. Daubenspeck ,  David J. Hill ,  Glen E. Richard ,  Timothy M. Sullivan

发明人： Stephen P. Ayotte ,  Timothy H. Daubenspeck ,  David J. Hill ,  Glen E. Richard ,  Timothy M. Sullivan

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L24/13 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11614 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13655 ,  H01L2224/13666 ,  H01L2224/13684 ,  H01L2224/13687 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14151 ,  H01L2224/1416 ,  H01L2224/14177 ,  H01L2924/12042 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/04953 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： Aspects of the present invention relate to a controlled collapse chip connection (C4) structures. Various embodiments include a method of forming a controlled collapse chip connection (C4) structure. The method can include: providing a precursor structure including: a substrate, a dielectric over the substrate, the dielectric including a plurality of trenches exposing a portion of the substrate, and a metal layer over the dielectric and the portion of the substrate in each of the plurality of trenches, forming a resist layer over the metal layer, forming a rigid liner over a surface of the resist layer and the metal layer, and forming solder over the rigid liner between portions of the resist layer.

摘要翻译： 本发明的方面涉及一种受控的崩溃芯片连接（C4）结构。 各种实施例包括形成受控崩溃芯片连接（C4）结构的方法。 该方法可以包括：提供前体结构，其包括：衬底，在衬底上的电介质，电介质包括暴露衬底的一部分的多个沟槽，以及覆盖在电介质上的金属层和衬底的每一个中的金属层 所述多个沟槽在所述金属层上形成抗蚀剂层，在所述抗蚀剂层和所述金属层的表面上形成刚性衬垫，以及在所述抗蚀剂层的部分之间的所述刚性衬垫上形成焊料。