公开(公告)号：US12080692B2

公开(公告)日：2024-09-03

申请号：US17578799

申请日：2022-01-19

申请人： Mitsubishi Electric Corporation

发明人： Keisuke Eguchi ,  Hiroyuki Masumoto

IPC分类号： H01L25/16 ,  H01L21/48 ,  H01L23/00 ,  H01L23/373

CPC分类号： H01L25/16 ,  H01L21/4807 ,  H01L23/3735 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29147 ,  H01L2224/3003 ,  H01L2224/32225 ,  H01L2224/48225 ,  H01L2224/73265 ,  H01L2924/1203 ,  H01L2924/1205 ,  H01L2924/13055 ,  H01L2924/1426 ,  H01L2924/15787 ,  H01L2924/1579

摘要： A semiconductor device includes: a metal sheet; an insulating pattern provided on the metal sheet; a power circuit pattern and a signal circuit pattern that are provided on the insulating pattern; a power semiconductor chip mounted on the power circuit pattern; and a control semiconductor chip that is mounted on the signal circuit pattern and controls the power semiconductor chip. The power semiconductor chip is bonded to the power circuit pattern with a first die bonding material comprised of copper, and the control semiconductor chip is bonded to the signal circuit pattern with a second die bonding material.

公开(公告)号：USRE49987E1

公开(公告)日：2024-05-28

申请号：US17725442

申请日：2022-04-20

申请人： Invensas LLC

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L25/065 ,  B81B7/00 ,  B81C1/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/42 ,  H01L23/48 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L25/00 ,  H01L25/16 ,  H01L49/02

CPC分类号： H01L25/0657 ,  B81B7/0074 ,  B81C1/0023 ,  H01L21/4853 ,  H01L23/3675 ,  H01L23/42 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/522 ,  H01L23/5383 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/24 ,  H01L24/49 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L28/10 ,  H01L28/20 ,  H01L28/40 ,  H01L24/02 ,  H01L24/17 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/81 ,  H01L2224/0239 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14132 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/73201 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/1205 ,  H01L2924/1206 ,  H01L2924/1207 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/3841 ,  H01L2924/01322 ,  H01L2924/00 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2224/0239 ,  H01L2924/01029 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2224/05568 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/81825 ,  H01L2924/00014 ,  H01L2224/1147 ,  H01L2924/00014 ,  H01L2224/0347 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05111 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05169 ,  H01L2924/00014 ,  H01L2224/05669 ,  H01L2924/00014 ,  H01L2224/05155 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05144 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05184 ,  H01L2924/00014 ,  H01L2224/05684 ,  H01L2924/00014 ,  H01L2224/05139 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/0345 ,  H01L2924/00014 ,  H01L2224/03452 ,  H01L2924/00014 ,  H01L2224/0332 ,  H01L2924/00014 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/03464 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/11464 ,  H01L2924/00014 ,  H01L2224/0333 ,  H01L2924/00012 ,  H01L2224/13616 ,  H01L2924/00014 ,  H01L2224/05616 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/01074 ,  H01L2224/13184 ,  H01L2924/01028 ,  H01L2224/13124 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01082 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2224/13116 ,  H01L2924/00014 ,  H01L2224/13113 ,  H01L2924/00014 ,  H01L2224/13169 ,  H01L2924/00014 ,  H01L2224/73201 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/94 ,  H01L2224/81 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2224/45015 ,  H01L2924/20756 ,  H01L2224/45015 ,  H01L2924/20757 ,  H01L2224/45015 ,  H01L2924/20758 ,  H01L2224/45015 ,  H01L2924/20759 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20756 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20757 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20758 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20759 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/2076 ,  H01L2924/00014 ,  H01L2224/45099

摘要： Apparatus(es) and method(s) relate generally to via arrays on a substrate. In one such apparatus, the substrate has a conductive layer. First plated conductors are in a first region extending from a surface of the conductive layer. Second plated conductors are in a second region extending from the surface of the conductive layer. The first plated conductors and the second plated conductors are external to the first substrate. The first region is disposed at least partially within the second region. The first plated conductors are of a first height. The second plated conductors are of a second height greater than the first height. A second substrate is coupled to first ends of the first plated conductors. The second substrate has at least one electronic component coupled thereto. A die is coupled to second ends of the second plated conductors. The die is located over the at least one electronic component.

公开(公告)号：US11715701B2

公开(公告)日：2023-08-01

申请号：US16386774

申请日：2019-04-17

申请人： Toshiba Memory Corporation

发明人： Yuusuke Takano ,  Yoshiaki Goto ,  Takeshi Watanabe ,  Takashi Imoto

IPC分类号： H01L23/552 ,  H01L21/66 ,  H01L23/00 ,  H01L23/31 ,  G01R31/28

CPC分类号： H01L23/552 ,  H01L22/14 ,  H01L24/48 ,  H01L24/49 ,  G01R31/2853 ,  H01L23/3128 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/48095 ,  H01L2924/00014 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/181 ,  H01L2924/00012

摘要： According to one embodiment, a semiconductor device includes a wiring board that has a first surface and a second surface opposed to the first surface, a semiconductor chip provided on the first surface, external connection terminals provided on the second surface, a sealing resin layer provided on the first surface, and a conductive shield layer that covers at least a portion of a side surface of the wiring board and the sealing resin layer. The wiring board includes a first ground wire that is electrically connected to the conductive shield layer, and a second ground wire that is electrically connected to the conductive shield layer and is electrically insulated from the first ground wire.

公开(公告)号：US20230144181A1

公开(公告)日：2023-05-11

申请号：US18149205

申请日：2023-01-03

申请人： Murata Manufacturing Co., Ltd.

发明人： Takuya GOITSUKA

IPC分类号： H01L23/498 ,  H01L23/13 ,  H01L23/00 ,  H01L25/04 ,  H01L25/18 ,  H05K1/18 ,  H05K3/34 ,  H05K3/46

CPC分类号： H01L23/49838 ,  H01L23/13 ,  H01L24/13 ,  H01L25/04 ,  H01L25/18 ,  H05K1/18 ,  H05K3/34 ,  H05K3/46 ,  H01L2224/13005 ,  H01L2224/81193 ,  H01L2924/15787 ,  H01L2924/19105

摘要： Provided is a ceramic laminated substrate which is formed on an electronic component to be mounted and is less likely to cause mounting defects even if there is irregularity in the height of solders. The ceramic laminated substrate includes: a ceramic laminate on which ceramic layers are laminated; via conductors; terminal electrodes; and a land electrode. The land electrode has a first land electrode and a second land electrode that are used to join different terminal electrodes of a single electronic component. The area of the first land electrode is smaller than the area of the second land electrode, and the first land electrode has a bump electrode and a plating layer, the second land electrode has a membrane electrode and plating layers, and the height of the first land electrode is formed higher than the height of the second land electrode.

公开(公告)号：US20180247923A1

公开(公告)日：2018-08-30

申请号：US15967233

申请日：2018-04-30

申请人： ABB Schweiz AG

发明人： Samuel Hartmann ,  Ulrich Schlapbach

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498

CPC分类号： H01L25/18 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5381 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L2224/0603 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/49433 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/30107 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor module, comprises a substrate plate; a semiconductor switch chip and a diode chip attached to a collector conductor on the substrate plate, wherein the diode chip is electrically connected antiparallel to the semiconductor switch chip; wherein the semiconductor switch chip is electrically connected via bond wires to an emitter conductor on the substrate plate providing a first emitter current path, which emitter conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; wherein a gate electrode of the semiconductor switch chip is electrically connected via a bond wire to a gate conductor on the substrate plate providing a gate current path, which gate conductor is arranged oppositely to the semiconductor switch chip with respect to the diode chip; and wherein a protruding area of the emitter conductor runs besides the diode chip towards the first semiconductor switch chip and the first semiconductor switch chip is directly connected via a bond wire with the protruding area providing an additional emitter current path running at least partially along the gate current path. The semiconductor switch chip is a first semiconductor switch chip and the diode chip is a first diode chip, which are arranged in a first row. The semiconductor module comprises further a second row of a second semiconductor switch chip and a second diode chip attached to the collector conductor, wherein the diode chip of each row is electrically connected antiparallel to the semiconductor switch chip of the same row and the first and second rows are electrically connected in parallel. The first semiconductor switch chip is arranged besides the second diode chip and the second semiconductor chip is arranged besides the first diode chip.

公开(公告)号：US20180233440A1

公开(公告)日：2018-08-16

申请号：US15911500

申请日：2018-03-05

申请人： AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

发明人： Edward Law ,  Sam Ziqun Zhao ,  Kunzhong Hu ,  Rezaur Rahman Khan

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/49811 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05124 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05672 ,  H01L2224/06135 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/29012 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1041 ,  H01L2924/00 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/85 ,  H01L2924/00014

摘要： A reconstituted semiconductor package and a method of making a reconstituted semiconductor package are described. An array of die-attach substrates is formed onto a carrier. A semiconductor device is mounted onto a first surface of each of the die-attach substrates. An interposer substrate is mounted over each of the semiconductor devices. The interposer substrates are electrically connected to the first surface of the respective die-attach substrates. A molding compound is filled in open spaces within and between the interposer substrates mounted to their respective die-attach substrates to form an array of reconstituted semiconductor packages. Electrical connections are mounted to a second surface of the die-attach substrates. The array of reconstituted semiconductor packages is singulated through the molding compound between each of the die-attach substrates and respective mounted interposer substrates.

公开(公告)号：US10008427B2

公开(公告)日：2018-06-26

申请号：US15615148

申请日：2017-06-06

申请人： International Business Machines Corporation

发明人： Taryn J. Davis ,  Jonathan R. Fry ,  Tuhin Sinha

IPC分类号： H01L23/58 ,  H01L21/66 ,  H01L21/56 ,  H01L21/48 ,  G01N29/06 ,  H01L23/498

CPC分类号： H01L22/34 ,  G01N29/043 ,  G01N29/06 ,  G01N29/0681 ,  G01N2291/101 ,  G01N2291/2697 ,  H01L21/4853 ,  H01L21/563 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26 ,  H01L22/30 ,  H01L23/10 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/92125 ,  H01L2225/06596 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16251 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/35121

摘要： A method includes forming a flip-chip module including a chip connected to a substrate with a layer of underfill material adhered to the chip and the substrate; sensing chip-packaging interaction failure in the underfilled flip-chip module in situ; reporting in-situ chip-packaging interaction failure to a device in real-time; and imaging the chip-packaging interaction failure with an indirect scanning acoustic microscope.

公开(公告)号：US10002846B2

公开(公告)日：2018-06-19

申请号：US15792414

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/00 ,  B29C64/10

CPC分类号： H01L24/80 ,  B29C64/10 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/20 ,  H01L23/26 ,  H01L23/49805 ,  H01L23/564 ,  H01L24/03 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A method is provided. The method includes removing an extracted die including an original ball bond from a previous packaged integrated circuit, bonding the extracted die to an interposer to create a remapped extracted die, 3D printing one or more first bond connections between one or more original bond pads of the extracted die and one or more first bond pads of the interposer, securing the remapped extracted die to a package base, and 3D printing one or more second bond connections between one or more second bond pads of the interposer and one or more package leads or downbonds of the package base. The one or more first and second bond connections conform to the shapes and surfaces of the extracted die, the interposer, and the package base.

公开(公告)号：US09997485B2

公开(公告)日：2018-06-12

申请号：US15663802

申请日：2017-07-30

申请人： Semiconductor Components Industries, LLC

发明人： Shutesh Krishnan ,  Yun Sung Won

IPC分类号： H01L23/00 ,  H01L23/495

CPC分类号： H01L24/27 ,  H01L23/49513 ,  H01L23/49524 ,  H01L24/29 ,  H01L24/36 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/16225 ,  H01L2224/27318 ,  H01L2224/27334 ,  H01L2224/29 ,  H01L2224/29006 ,  H01L2224/29101 ,  H01L2224/29199 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/32013 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/40245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/838 ,  H01L2224/8384 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/37099

摘要： A bonding structure and a method for bonding components, wherein the bonding structure includes a nanoparticle preform. In accordance with embodiments, the nanoparticle preform is placed on a substrate and a workpiece is placed on the nanoparticle preform.

公开(公告)号：US20180158746A1

公开(公告)日：2018-06-07

申请号：US15868715

申请日：2018-01-11

申请人： QUALCOMM INCORPORATED

发明人： Mou-Shiung LIN

IPC分类号： H01L23/29 ,  H01L23/00 ,  H01L23/525 ,  H01L23/498 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L23/538

CPC分类号： H01L23/293 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/525 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/11 ,  H01L24/19 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2224/0231 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/12105 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/82 ,  H01L2224/13099 ,  H01L2924/00

摘要： A chip package may include a first polymer layer and a first semiconductor chip in the first polymer layer. The first semiconductor chip may include a first semiconductor device and a first semiconductor substrate supporting the first semiconductor device. The first semiconductor chip may also have a first contact pad coupled to the first semiconductor device. The first semiconductor chip may further include a first conductive interconnect on the first contact pad. The chip package may also include a second polymer layer on the first polymer layer and across an edge of the first semiconductor chip. The chip package may further include a first conductive layer in the second polymer layer and directly on a surface of the first conductive interconnect, and across the edge of the first semiconductor chip.