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公开(公告)号:US10312197B2
公开(公告)日:2019-06-04
申请号:US14475326
申请日:2014-09-02
IPC分类号: H01L23/552 , H01L23/31 , H01L23/00 , H01L23/29 , H01L21/56
摘要: According to one embodiment, a method of manufacturing a semiconductor device includes forming a sealing resin layer containing an inorganic filler so as to seal a semiconductor chip, removing a portion of the surface of the sealing resin layer by dry etching such that a portion of the inorganic filler is exposed, and forming a shield layer so as to cover at least the sealing resin layer.
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公开(公告)号:US09824905B2
公开(公告)日:2017-11-21
申请号:US14482489
申请日:2014-09-10
IPC分类号: G01R31/10 , H01L21/67 , C23C14/54 , H01L23/552 , C23C14/56
CPC分类号: H01L21/67265 , C23C14/54 , C23C14/56 , H01L21/67259 , H01L21/67288 , H01L23/552 , H01L2924/0002 , H01L2924/14 , H01L2924/00
摘要: A semiconductor manufacturing device has an upper cover configured to be arranged above top surface of unshielded semiconductor device which are mounted on a tray placed on a carrier to go through electromagnetic shielding, and a displacement detector configured to detect an abnormality when the upper cover is raised by at least one of the semiconductor device which is brought into contact with a bottom surface of the upper cover.
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公开(公告)号:US11715701B2
公开(公告)日:2023-08-01
申请号:US16386774
申请日:2019-04-17
发明人: Yuusuke Takano , Yoshiaki Goto , Takeshi Watanabe , Takashi Imoto
IPC分类号: H01L23/552 , H01L21/66 , H01L23/00 , H01L23/31 , G01R31/28
CPC分类号: H01L23/552 , H01L22/14 , H01L24/48 , H01L24/49 , G01R31/2853 , H01L23/3128 , H01L2224/48095 , H01L2224/48227 , H01L2224/48228 , H01L2224/49 , H01L2924/00014 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/19107 , H01L2924/15787 , H01L2924/00 , H01L2924/15788 , H01L2924/00 , H01L2924/00014 , H01L2224/45099 , H01L2224/48095 , H01L2924/00014 , H01L2924/00014 , H01L2224/05599 , H01L2924/181 , H01L2924/00012
摘要: According to one embodiment, a semiconductor device includes a wiring board that has a first surface and a second surface opposed to the first surface, a semiconductor chip provided on the first surface, external connection terminals provided on the second surface, a sealing resin layer provided on the first surface, and a conductive shield layer that covers at least a portion of a side surface of the wiring board and the sealing resin layer. The wiring board includes a first ground wire that is electrically connected to the conductive shield layer, and a second ground wire that is electrically connected to the conductive shield layer and is electrically insulated from the first ground wire.
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