公开(公告)号：US10002846B2

公开(公告)日：2018-06-19

申请号：US15792414

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/00 ,  B29C64/10

CPC分类号： H01L24/80 ,  B29C64/10 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/20 ,  H01L23/26 ,  H01L23/49805 ,  H01L23/564 ,  H01L24/03 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A method is provided. The method includes removing an extracted die including an original ball bond from a previous packaged integrated circuit, bonding the extracted die to an interposer to create a remapped extracted die, 3D printing one or more first bond connections between one or more original bond pads of the extracted die and one or more first bond pads of the interposer, securing the remapped extracted die to a package base, and 3D printing one or more second bond connections between one or more second bond pads of the interposer and one or more package leads or downbonds of the package base. The one or more first and second bond connections conform to the shapes and surfaces of the extracted die, the interposer, and the package base.

公开(公告)号：US20180047700A1

公开(公告)日：2018-02-15

申请号：US15792414

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/00 ,  B29C64/10

CPC分类号： H01L24/80 ,  B29C64/10 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/20 ,  H01L23/26 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/03 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/98 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/24226 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A method is provided. The method includes removing an extracted die including an original ball bond from a previous packaged integrated circuit, bonding the extracted die to an interposer to create a remapped extracted die, 3D printing one or more first bond connections between one or more original bond pads of the extracted die and one or more first bond pads of the interposer, securing the remapped extracted die to a package base, and 3D printing one or more second bond connections between one or more second bond pads of the interposer and one or more package leads or downbonds of the package base. The one or more first and second bond connections conform to the shapes and surfaces of the extracted die, the interposer, and the package base.

公开(公告)号：US20160181171A1

公开(公告)日：2016-06-23

申请号：US14600733

申请日：2015-01-20

申请人： Global Circuit Innovations Incorporated

发明人： Erick Merle Spory

IPC分类号： H01L23/20 ,  H01L21/48 ,  H01L23/498 ,  H01L23/495 ,  H01L23/04 ,  H01L23/00 ,  H01L23/26

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A packaged integrated circuit is provided. The packaged integrated circuit includes a die, a package including a base, a lid, and a plurality of package leads, and die attach adhesive for securing the die to the package base. the die includes a plurality of die pads. The die is secured to the base with the die attach adhesive. After the die is secured to the base, at least one of the plurality of die pads is electrically connected to at least one of the plurality of package leads with a printed bond connection. After printing the bond connection, the lid is sealed to the base.

摘要翻译： 提供封装的集成电路。 封装的集成电路包括管芯，包括基座，盖子和多个封装引线的封装以及用于将管芯固定到封装基座的管芯附着粘合剂。 管芯包括多个管芯焊盘。 模具用芯片附着粘合剂固定到基座上。 在芯片被固定到基座之后，多个裸片焊盘中的至少一个通过印刷的键合电连接到多个封装引线中的至少一个。 在打印粘合连接之后，将盖子密封到基座上。

公开(公告)号：US20240250062A1

公开(公告)日：2024-07-25

申请号：US18414500

申请日：2024-01-17

申请人： STATS ChipPAC Pte. Ltd.

发明人： JinHee JUNG ,  ChangOh KIM ,  HeeSoo LEE

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/82 ,  H01L21/561 ,  H01L24/24 ,  H01L25/0655 ,  H01L25/50 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3185 ,  H01L2224/24137 ,  H01L2224/245 ,  H01L2224/82005 ,  H01L2224/82103 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079

摘要： A method for making a semiconductor device is provided. The method includes: providing a semiconductor assembly comprising a first semiconductor die and a second semiconductor die, wherein a first interconnection structure is electrically coupled to the first semiconductor die and a second interconnection structure is electrically coupled to the second semiconductor die; depositing an encapsulant layer over the semiconductor assembly to encapsulate the first interconnection structure and the second interconnection structure, wherein the encapsulant layer comprises an additive activatable by laser; forming an interconnection channel in the encapsulant layer and activating the additive of the encapsulant layer in the interconnection channel as a seed layer by laser patterning, wherein the interconnection channel exposes and interconnects the first and the second interconnection structures; forming a conductive layer in the interconnection channel of the encapsulant layer; and forming an outer layer on the encapsulant layer to cover the conductive layer.

公开(公告)号：US20240145429A1

公开(公告)日：2024-05-02

申请号：US18496634

申请日：2023-10-27

申请人： STMICROELECTRONICS S.r.l.

发明人： Riccardo VILLA ,  Guendalina CATALANO

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L24/82 ,  H01L21/561 ,  H01L23/3135 ,  H01L23/49513 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/24105 ,  H01L2224/24247 ,  H01L2224/245 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82103 ,  H01L2224/92244 ,  H01L2924/01029

摘要： Laser direct structuring, LDS material is molded onto semiconductor dice arranged on die pads in a leadframe and the semiconductor dice are electrically coupled with electrically conductive leads in the leadframe via electrical connections that comprise electrically conductive formations exposed at the front surface of the LDS material, electrically conductive vias between the semiconductor dice and the front surface of the LDS material, as well as electrically conductive lines over the front surface of the LDS material that couple selected ones of the electrically conductive formations with selected ones of the second electrically conductive vias. The electrically conductive vias and lines are provided applying laser beam energy to the front surface of the laser direct structuring material at spatial positions located as a function of the electrically conductive formations exposed at the front surface of the LDS material acting as fiducials. The electrically conductive formations exposed at the front surface of the LDS material may comprise pillar-like extensions of the leadframe leads, electrically conductive material grown on the leads in cavities in the front surface of the LDS material or electrically conductive leads in a lead frame where the die pads are downset with respect to the leads.

公开(公告)号：US09935028B2

公开(公告)日：2018-04-03

申请号：US14142823

申请日：2013-12-28

申请人： Global Circuit Innovations Incorporated

发明人： Erick Merle Spory

IPC分类号： H01L21/00 ,  H01L23/20 ,  H01L23/00 ,  H01L23/26 ,  H01L21/50 ,  H01L21/48 ,  H01L23/04 ,  H01L23/495 ,  H01L23/498 ,  H01L23/10

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A method for assembling a packaged integrated circuit is provided. The method includes placing a die into a cavity of a package base, securing the die to the package base with a die attach adhesive, printing a bond connection between a die pad of the die and a lead of the package base or a downbond, and sealing a package lid to the package base.

公开(公告)号：US08716870B2

公开(公告)日：2014-05-06

申请号：US13328359

申请日：2011-12-16

申请人： Arun Virupaksha Gowda

发明人： Arun Virupaksha Gowda

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L24/24 ,  H01L23/3735 ,  H01L23/5389 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L25/50 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/73267 ,  H01L2224/8201 ,  H01L2224/82101 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/8384 ,  H01L2224/92244 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor device package having direct write interconnections and method of manufacturing thereof is disclosed. A device package is formed by providing a substrate structure, attaching at least one device to the substrate structure that each include a substrate and one or more connection pads formed on the substrate, depositing a dielectric layer over the at least one device and onto the substrate structure by way of a direct write application, the dielectric layer including vias formed therethrough, and forming an interconnect structure on the dielectric layer that is electrically coupled to the connection pads of the at least one device, the interconnect structure extending through the vias in the dielectric layer so as to be connected to the connection pads.

摘要翻译： 公开了一种具有直接写入互连的半导体器件封装及其制造方法。 通过提供衬底结构形成器件封装，将至少一个器件连接到衬底结构，每个器件包括衬底和形成在衬底上的一个或多个连接焊盘，在该至少一个器件上方沉积介电层并在衬底上 通过直接写入应用的结构，所述电介质层包括通过其形成的通孔，以及在电耦合到所述至少一个器件的连接焊盘的所述电介质层上形成互连结构，所述互连结构延伸穿过所述至少一个器件中的通孔 电介质层，以便连接到连接焊盘。

公开(公告)号：US11881466B2

公开(公告)日：2024-01-23

申请号：US16495112

申请日：2018-04-26

申请人： ORBOTECH LTD.

发明人： Michael Zenou ,  Zvi Kotler ,  Ofer Fogel

IPC分类号： H01L23/00 ,  H01L21/48

CPC分类号： H01L24/19 ,  H01L21/4846 ,  H01L24/73 ,  H01L24/76 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/73259 ,  H01L2224/76158 ,  H01L2224/82103

摘要： A method for producing electronic devices includes fixing a die that includes an electronic component with integral contacts to a dielectric substrate. After fixing the die, a conductive trace is printed over both the dielectric substrate and at least one of the integral contacts, so as to create an ohmic connection between the conductive trace on the substrate and the electronic component.

公开(公告)号：US20190006335A1

公开(公告)日：2019-01-03

申请号：US16020145

申请日：2018-06-27

申请人： LG Display Co., Ltd.

发明人： Seungchul LEE ,  Changho LEE ,  Hanseok KIM ,  Mira YUN

IPC分类号： H01L25/16 ,  G09G3/32 ,  H01L23/498 ,  H01L27/12 ,  H01L23/00 ,  H01L33/60 ,  H01L23/60

CPC分类号： H01L25/167 ,  G09G3/32 ,  G09G2300/02 ,  G09G2310/0259 ,  G09G2310/0272 ,  G09G2380/02 ,  H01L23/49805 ,  H01L23/49833 ,  H01L23/4985 ,  H01L23/60 ,  H01L24/24 ,  H01L24/32 ,  H01L24/73 ,  H01L24/82 ,  H01L25/162 ,  H01L27/124 ,  H01L33/32 ,  H01L33/60 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73217 ,  H01L2224/82103 ,  H01L2224/82214 ,  H05K1/141 ,  H05K3/403 ,  H05K2201/09154 ,  H05K2201/10106 ,  H05K2201/10128

摘要： Disclosed herein are a display device with a reduced bezel area and a method for fabricating the same. A wiring electrode disposed on a substrate is electrically connected to a connection electrode disposed on an inclined surface of a circuit board in contact with the substrate, and the connection electrode is electrically connected to a circuit wiring disposed on the circuit board. Therefore, an inactive area such as a pad portion for connecting the substrate with the circuit board is not required, such that the bezel area can be reduced.

公开(公告)号：US09824948B2

公开(公告)日：2017-11-21

申请号：US14600733

申请日：2015-01-20

申请人： Global Circuit Innovations Incorporated

发明人： Erick Merle Spory

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/20 ,  H01L23/00 ,  H01L23/26 ,  H01L21/50 ,  H01L21/48 ,  H01L23/04 ,  H01L23/495 ,  H01L23/498 ,  H01L23/10

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00015 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861 ,  H01L2224/48 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/00

摘要： A packaged integrated circuit is provided. The packaged integrated circuit includes a die, a package including a base, a lid, and a plurality of package leads, and die attach adhesive for securing the die to the package base. the die includes a plurality of die pads. The die is secured to the base with the die attach adhesive. After the die is secured to the base, at least one of the plurality of die pads is electrically connected to at least one of the plurality of package leads with a printed bond connection. After printing the bond connection, the lid is sealed to the base.