公开(公告)号：US12132014B2

公开(公告)日：2024-10-29

申请号：US17622588

申请日：2020-07-08

Applicant: HITACHI, LTD.

Inventor： Junpei Kusukawa ,  Eiichi Ide

IPC: H01L25/16 ,  H01L23/00 ,  H01L23/60 ,  H01L23/373

CPC classification number: H01L23/60 ,  H01L25/16 ,  H01L23/3735 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/3303 ,  H01L2224/33181

Abstract: A power semiconductor apparatus provided with a first conductor section connected to a direct-current terminal for transmitting direct-current power; a second conductor section connected to an alternating-current terminal for transmitting alternating-current power; a semiconductor element which is disposed between the first conductor section and the second conductor section and is for converting the direct-current power to the alternating-current power; and an interposition section disposed between the first conductor section and the second conductor section, in which the interposition section has a first conductor layer connected to the first conductor section, a second conductor layer connected to the second conductor section, and a plurality of insulation layers disposed between the first conductor layer and the second conductor layer, with one or a plurality of third conductor layers sandwiched between the plurality of insulation layers.

公开(公告)号：US12130523B2

公开(公告)日：2024-10-29

申请号：US17622792

申请日：2021-12-20

Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Fangyun Liu

IPC: H01L23/60 ,  G02F1/1362 ,  H01L27/02

CPC classification number: G02F1/136204 ,  H01L23/60 ,  H01L27/0288 ,  G02F2202/22

Abstract: An electrostatic protection circuit, a power management chip, and a display terminal are provided. The electrostatic protection circuit includes a level shift unit and a power management unit. The electrostatic protection circuit also includes a clamping module. An input terminal of the clamping module receives an electrostatic detection signal. An output terminal of the clamp module outputs a fault detection signal. The output terminal of the clamp module continues to output a high electrical potential when the electrostatic detection signal transits from a low electrical potential to the high electrical potential until the power management unit stops operating.

公开(公告)号：US20240336375A1

公开(公告)日：2024-10-10

申请号：US18745959

申请日：2024-06-17

Applicant: Space Arena, Inc.

Inventor： Daniel Faber

IPC: B64G1/24 ,  A63B71/02 ,  B64C39/02 ,  B64G1/64 ,  B64U50/19 ,  B64U50/34 ,  B64U101/00 ,  H01L23/60

CPC classification number: B64G1/242 ,  A63B71/02 ,  B64C39/024 ,  B64G1/646 ,  H01L23/60 ,  B64U50/19 ,  B64U50/34 ,  B64U2101/00 ,  B64U2201/20

Abstract: Enclosures for facilitating activities in space, and associated systems and methods, are disclosed. A representative system includes a spacecraft having an enclosed interior volume (which can be formed by an inflatable membrane) and one or more unmanned aerial vehicles (UAVs) carried by the spacecraft and positioned to deploy into the enclosed interior volume. The system can include a remote-control system to control the one or more UAVs from a terrestrial location while the spacecraft is in space. A wireless charging system can provide electrical power to the one or more UAVs. A representative method includes configuring one or more controllers to launch a first spacecraft to a first orbit, launch a second spacecraft to a second orbit, move the first spacecraft to the second orbit, dock the first spacecraft with the second spacecraft, and broadcast an event within an interior volume of the first spacecraft to a terrestrial location.

公开(公告)号：US20240332367A1

公开(公告)日：2024-10-03

申请号：US18741835

申请日：2024-06-13

Applicant: ROHM CO., LTD.

Inventor： Katsuhisa NAGAO ,  Hidetoshi ABE

IPC: H01L29/16 ,  H01L23/31 ,  H01L23/535 ,  H01L23/60 ,  H01L29/06 ,  H01L29/36 ,  H01L29/423 ,  H01L29/47 ,  H01L29/51 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L29/1608 ,  H01L23/535 ,  H01L23/60 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/36 ,  H01L29/4236 ,  H01L29/47 ,  H01L29/51 ,  H01L29/739 ,  H01L29/78 ,  H01L29/7811 ,  H01L29/872 ,  H01L23/3171

Abstract: According to the present invention, a semiconductor device includes a first conductivity type SiC layer, an electrode that is selectively formed upon the SiC layer, and an insulator that is formed upon the SiC layer and that extends to a timing region that is set at an end part of the SiC layer. The insulator includes an electrode lower insulating film that is arranged below the electrode, and an organic insulating layer that is arranged so as to cover the electrode lower insulating film. The length (A) of the interval wherein the organic insulating layer contacts the SiC layer is 40 μm or more, and the lateral direction distance (B) along the electrode lower insulating layer between the electrode and SiC layer is 40 μm or more.

公开(公告)号：US12106600B2

公开(公告)日：2024-10-01

申请号：US18127229

申请日：2023-03-28

Applicant: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jingfu Tao ,  Pengfei Cheng ,  Lu Yu ,  Kangle Chang ,  Heling Zhu ,  Jian Sang ,  Chuandong Liao ,  Yinwei Chen ,  Jingang Liu

IPC: G06V40/13 ,  F21V8/00 ,  G06V10/147 ,  G06V10/54 ,  G06V40/12 ,  H01L23/60 ,  H05K9/00 ,  G02B5/04 ,  G02B5/28

CPC classification number: G06V40/1318 ,  G02B6/0068 ,  G02B6/0073 ,  G06V10/147 ,  G06V10/54 ,  G06V40/1324 ,  G06V40/1359 ,  G06V40/1376 ,  H01L23/60 ,  H05K9/0067 ,  G02B5/04 ,  G02B5/281 ,  G02B5/285

Abstract: A texture recognition device and a display device are provided. The texture recognition device includes a backlight element, configured to provide first backlight; a light constraint element, configured to perform a light divergence angle constraint process on the first backlight to obtain second backlight with a divergence angle within a preset angle range, the second backlight being transmitted to a detection object; and a photosensitive element, configured to detect the second backlight reflected by a texture of the detection object to recognize a texture image of the texture of the detection object.

公开(公告)号：US20240324197A1

公开(公告)日：2024-09-26

申请号：US18306231

申请日：2023-04-24

Applicant: United Microelectronics Corp.

Inventor： Hung Hsun Shuai ,  Chih-Jung Chen

IPC: H10B41/40 ,  H01L23/60 ,  H10B41/30

CPC classification number: H10B41/40 ,  H01L23/60 ,  H10B41/30

Abstract: A semiconductor device includes a substrate, a doped ring, a plurality of contacts, and a plurality of conductive lines. The substrate includes a first region and a second region surrounding the first region. The doped ring is located in the substrate in the second region and surrounds the first region. The doped ring includes a first doped region and a plurality of second doped regions. The first doped region is located in the substrate in the second region and surrounds the first region. The first doped region has an opening. The second doped regions are separated from each other and located in the substrate of the opening. The contacts are electrically connected to the second doped regions. The conductive lines are connected to the contacts and a plurality of conductive layers in the first region.

公开(公告)号：US20240321781A1

公开(公告)日：2024-09-26

申请号：US18731021

申请日：2024-05-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tao-Yi HUNG ,  Wun-Jie LIN ,  Jam-Wem LEE ,  Kuo-Ji CHEN

IPC: H01L23/60 ,  H01L27/02 ,  H02H9/04

CPC classification number: H01L23/60 ,  H01L27/0266 ,  H01L27/0292 ,  H02H9/046

Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus comprises: an internal circuit formed in a first wafer; an array of electrostatic discharge (ESD) circuits formed in a second wafer, wherein the ESD circuits include a plurality of ESD protection devices each coupled to a corresponding switch and configured to protect the internal circuit from a transient ESD event; and a switch controller in the second wafer, wherein the switch controller is configured to control, based on a control signal from the first wafer, each of the plurality of ESD protection devices to be activated or deactivated by the corresponding switch, and wherein the first wafer is bonded to the second wafer.

公开(公告)号：US20240321691A1

公开(公告)日：2024-09-26

申请号：US18732879

申请日：2024-06-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsu-Lun Liu ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chen-En Yen ,  Cheng-Lung Yang ,  Kuanchih Huang

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/60

CPC classification number: H01L23/481 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/60

Abstract: Some devices included a substrate; and a through via, including a plurality of scallops adjacent the through via in a first region and a plurality of scallops adjacent the through via in a second region, the plurality of scallops having a first depth, the scallops having a greater depth. Some devices include an opening extending into a substrate, including a first region and a second region. Sidewalls of the opening include a stack of first concave portions extending a first distance into the first substrate, and a stack of second concave portions extending a second distance, greater than and parallel to the first distance, into the first substrate. A conductor partially fills the first concave portions and at least partially fills the respective second concave portions.

公开(公告)号：US12087710B2

公开(公告)日：2024-09-10

申请号：US17730872

申请日：2022-04-27

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey A. West

IPC: H01L23/52 ,  H01L21/78 ,  H01L23/522 ,  H01L23/528 ,  H01L23/60 ,  H01L25/065

CPC classification number: H01L23/60 ,  H01L21/78 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/528 ,  H01L25/0655

Abstract: An electronic device comprises a multilevel metallization structure over a semiconductor layer and including a first region, a second region, a pre-metal level on the semiconductor layer, and N metallization structure levels over the pre-metal level, N being greater than 3. The electronic device also comprises an isolation component in the first region, the isolation component including a first terminal and a second terminal in different respective metallization structure levels, as well as a conductive shield between the first region and the second region in the multilevel metallization structure, the conductive shield including interconnected metal lines and trench vias in the respective metallization structure levels that at least partially encircle the first region.

公开(公告)号：US12080659B2

公开(公告)日：2024-09-03

申请号：US17715924

申请日：2022-04-07

Applicant: KINGPAK TECHNOLOGY INC.

Inventor： Chien-Chen Lee ,  Li-Chun Hung

IPC: H01L23/60 ,  H01L23/492 ,  H01L23/552

CPC classification number: H01L23/60 ,  H01L23/492 ,  H01L23/552

Abstract: A sensor package structure is provided. The sensor package structure includes a substrate, a sensor chip disposed on the substrate, a light-curing layer disposed on the substrate and surrounding the sensor chip, a light-permeable layer disposed on the light-curing layer, and a shielding layer that is ring-shaped and that is disposed on the light-permeable layer. And inner surface of the light-permeable layer, the light-curing layer, and the substrate jointly define an enclosed space that accommodates the sensor chip. A first projection area defined by orthogonally projecting the shielding layer onto the inner surface does not overlap the assembling region. A second projection area defined by orthogonally projecting the sensing region onto the inner surface along the predetermined direction does not overlap the first projection area and is located inside of the first projection area.