公开(公告)号：US20240250062A1

公开(公告)日：2024-07-25

申请号：US18414500

申请日：2024-01-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JinHee JUNG ,  ChangOh KIM ,  HeeSoo LEE

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/82 ,  H01L21/561 ,  H01L24/24 ,  H01L25/0655 ,  H01L25/50 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3185 ,  H01L2224/24137 ,  H01L2224/245 ,  H01L2224/82005 ,  H01L2224/82103 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079

Abstract: A method for making a semiconductor device is provided. The method includes: providing a semiconductor assembly comprising a first semiconductor die and a second semiconductor die, wherein a first interconnection structure is electrically coupled to the first semiconductor die and a second interconnection structure is electrically coupled to the second semiconductor die; depositing an encapsulant layer over the semiconductor assembly to encapsulate the first interconnection structure and the second interconnection structure, wherein the encapsulant layer comprises an additive activatable by laser; forming an interconnection channel in the encapsulant layer and activating the additive of the encapsulant layer in the interconnection channel as a seed layer by laser patterning, wherein the interconnection channel exposes and interconnects the first and the second interconnection structures; forming a conductive layer in the interconnection channel of the encapsulant layer; and forming an outer layer on the encapsulant layer to cover the conductive layer.

公开(公告)号：US20240371825A1

公开(公告)日：2024-11-07

申请号：US18646853

申请日：2024-04-26

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： TaeWoo LEE ,  HeeSoo LEE ,  EunHee MYUNG

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/00

Abstract: A semiconductor package and a method for making the same are provided. The semiconductor package may include: a substrate having a first surface and a second surface opposite to the first surface; a first insulating layer disposed on the first surface of the substrate and having a first concave portion; a first semiconductor interposer disposed in the first concave portion of the first insulating layer, the first semiconductor interposer including a first semiconductor layer and a plurality of first wiring patterns formed on the first semiconductor layer; a first electronic component overlapping with a first portion of the first semiconductor interposer and electrically connected with the first wiring patterns of the first semiconductor interposer; and a second electronic component overlapping with a second portion of the first semiconductor interposer and electrically connected with the first wiring patterns of the first semiconductor interposer.

公开(公告)号：US20240112981A1

公开(公告)日：2024-04-04

申请号：US18475238

申请日：2023-09-27

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： ChangOh KIM ,  SeungHyun LEE ,  HeeSoo LEE

IPC: H01L23/42 ,  H01L21/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L23/42 ,  H01L21/4882 ,  H01L23/367 ,  H01L23/481 ,  H01L24/32 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32245 ,  H01L2225/06568

Abstract: A semiconductor device comprises a substrate; a primary semiconductor die attached onto the substrate comprising a front surface and a back surface, wherein the primary semiconductor die has a first region and a second region besides the first region; an auxiliary semiconductor die attached onto the front surface at the first region; a heat transfer block comprising a main body attached onto the front surface at the second region; a metal layer wrapping around the main body; a graphene layer formed outside of the metal layer; a heat spreader attached onto the substrate and defining with the substrate a chamber for accommodating the primary semiconductor die, the auxiliary semiconductor die and the heat transfer block, wherein the graphene layer extends between the heat spreader and the front surface such that heat generated by the first region can be transferred to the heat spreader through the graphene layer.

公开(公告)号：US20240405049A1

公开(公告)日：2024-12-05

申请号：US18673384

申请日：2024-05-24

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： BumRyul MAENG ,  MyungHo JUNG ,  HeeSoo LEE

IPC: H01L27/146

Abstract: A method for forming a sensor package is disclosed. The method comprises: providing a sensor; forming an optical filter and a transparent mold on the sensor to form a sensor assembly; providing a substrate, wherein one or more connectors are attached on a front surface of the substrate; forming a first encapsulant layer on the front surface of the substrate, wherein the one or more connectors are exposed from the first encapsulant layer; disposing the sensor assembly on the first encapsulant layer; connecting the sensor with the one or more connectors; and forming a second encapsulant layer on the first encapsulant layer to cover the sensor assembly.

公开(公告)号：US20230402400A1

公开(公告)日：2023-12-14

申请号：US18332779

申请日：2023-06-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak LEE ,  SangHo SONG ,  YeonJee LEE ,  HeeSoo LEE

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/56

Abstract: A method for making a semiconductor device comprises: providing a substrate having a first region and a second region, wherein the first region comprises at least one electronic component and a conductive pattern formed therein; forming a conductive bar on the conductive pattern; forming an encapsulant layer in the first region of the substrate to cover the at least one electronic component, the conductive bar and the conductive pattern; removing a portion of the encapsulant layer that is above the conductive bar to expose the conductive bar and separate the encapsulant layer into a main portion and a peripheral portion; disposing a deposition mask above the substrate to cover the second region; and depositing a conductive material on the substrate to form a shielding layer on the substrate which is not covered by the deposition mask.