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    Fine Pitch BVA Using Reconstituted Wafer With Area Array Accessible For Testing
    1.
    发明申请
    Fine Pitch BVA Using Reconstituted Wafer With Area Array Accessible For Testing 有权

    公开(公告)号：US20230005804A1

    公开(公告)日：2023-01-05

    申请号：US17865994

    申请日：2022-07-15

    申请人： INVENSAS LLC

    发明人： Rajesh Katkar

    IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L25/10 ,  H01L21/78

    摘要： A microelectronic assembly having a first side and a second side opposite therefrom is disclosed. The microelectronic assembly may include a microelectronic element having a first face, a second face opposite the first face, a plurality of sidewalls each extending between the first and second faces, and a plurality of element contacts. The microelectronic assembly may also include an encapsulation adjacent the sidewalls of the microelectronic element. The microelectronic assembly may include electrically conductive connector elements each having a first end, a second end remote from the first end, and an edge surface extending between the first and second ends, wherein one of the first end or the second end of each connector element is adjacent the first side of the package. The microelectronic assembly may include a redistribution structure having terminals, the redistribution structure adjacent the second side of the package, the terminals being electrically coupled with the connector elements.

    MULTI-CHIP MODULES FORMED USING WAFER-LEVEL PROCESSING OF A RECONSTITUTED WAFER
    2.
    发明申请
    MULTI-CHIP MODULES FORMED USING WAFER-LEVEL PROCESSING OF A RECONSTITUTED WAFER 有权

    公开(公告)号：US20220375864A1

    公开(公告)日：2022-11-24

    申请号：US17835851

    申请日：2022-06-08

    申请人： INVENSAS LLC

    发明人： Liang Wang ,  Rajesh Katkar

    IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L25/065

    摘要： Apparatuses and methods are described. This apparatus includes a bridge die having first contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted wafer has a wafer surface including a layer surface of the molding layer and the die surface. A redistribution layer on the wafer surface includes electrically conductive and dielectric layers to provide conductive routing and conductors. The conductors extend away from the die surface and are respectively coupled to the first contacts at bottom ends thereof. At least second and third IC dies respectively having second contacts on corresponding die surfaces thereof are interconnected to the bridge die and the redistribution layer. A first portion of the second contacts are interconnected to top ends of the conductors opposite the bottom ends thereof in part for alignment of the at least second and third IC dies to the bridge die.

    Multi-chip modules formed using wafer-level processing of a reconstituted wafer
    4.
    发明授权
    Multi-chip modules formed using wafer-level processing of a reconstituted wafer 有权

    公开(公告)号：US11387214B2

    公开(公告)日：2022-07-12

    申请号：US16712357

    申请日：2019-12-12

    申请人： INVENSAS LLC

    发明人： Liang Wang ,  Rajesh Katkar

    IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L25/16

    摘要： Apparatuses and methods are described. This apparatus includes a bridge die having first contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted wafer has a wafer surface including a layer surface of the molding layer and the die surface. A redistribution layer on the wafer surface includes electrically conductive and dielectric layers to provide conductive routing and conductors. The conductors extend away from the die surface and are respectively coupled to the first contacts at bottom ends thereof. At least second and third IC dies respectively having second contacts on corresponding die surfaces thereof are interconnected to the bridge die and the redistribution layer. A first portion of the second contacts are interconnected to top ends of the conductors opposite the bottom ends thereof in part for alignment of the at least second and third IC dies to the bridge die.

    RADIO FREQUENCY DEVICE PACKAGES
    6.
    发明申请
    RADIO FREQUENCY DEVICE PACKAGES 有权

    公开(公告)号：US20230130259A1

    公开(公告)日：2023-04-27

    申请号：US18048378

    申请日：2022-10-20

    申请人： INVENSAS LLC

    发明人： Belgacem Haba ,  Hong Shen ,  Patrick Variot ,  Rajesh Katkar

    IPC分类号： H01Q9/04 ,  H01Q1/52 ,  H01Q1/48 ,  H01L23/552 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

    摘要： An integrated device package is disclosed. The integrated device package can include an antenna structure and an integrated device die electrically coupled to the antenna structure. The antenna structure can be formed with a system board or separated from the system board. When the antenna structure is formed with the system board, the integrated device package can include a redistribution layer having conductive routing traces such that the integrated device die is disposed between the system board and the redistribution layer, and the integrated device die is electrically coupled to the antenna structure at least partially through one or more of the conductive routing traces of the redistribution layer. When the antenna structure is separated from the system board, the integrated device die can be positioned between the antenna structure and the system board, and the integrated device die can be electrically coupled to the antenna structure at least partially through one or more of conductive routing traces of the system board and conductive wire of an interconnect structure between the system board and the antenna structure.