公开(公告)号：US20160113087A1

公开(公告)日：2016-04-21

申请号：US14976698

申请日：2015-12-21

申请人： Michael A. TISCHLER ,  Philippe M. SCHICK ,  Ian ASHDOWN ,  Calvin Wade SHEEN ,  Paul JUNGWIRTH

发明人： Michael A. TISCHLER ,  Philippe M. SCHICK ,  Ian ASHDOWN ,  Calvin Wade SHEEN ,  Paul JUNGWIRTH

IPC分类号： H05B33/08 ,  F21K99/00 ,  H05B37/02

CPC分类号： F21K9/66 ,  F21K9/20 ,  F21K9/275 ,  F21K9/278 ,  F21K9/64 ,  F21K9/65 ,  F21V3/02 ,  F21V9/30 ,  F21V23/003 ,  F21V23/02 ,  F21V29/74 ,  F21Y2115/10 ,  G02F1/133603 ,  H01L23/367 ,  H01L23/4985 ,  H01L23/5387 ,  H01L24/32 ,  H01L24/83 ,  H01L25/0753 ,  H01L27/156 ,  H01L31/0468 ,  H01L33/0025 ,  H01L33/06 ,  H01L33/08 ,  H01L33/28 ,  H01L33/30 ,  H01L33/32 ,  H01L33/36 ,  H01L33/483 ,  H01L33/486 ,  H01L33/502 ,  H01L33/505 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L51/0097 ,  H01L2224/06102 ,  H01L2224/16225 ,  H01L2224/2929 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83385 ,  H01L2224/83851 ,  H01L2225/107 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01063 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/10321 ,  H01L2924/10322 ,  H01L2924/10323 ,  H01L2924/10324 ,  H01L2924/10328 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10331 ,  H01L2924/10332 ,  H01L2924/10333 ,  H01L2924/10334 ,  H01L2924/10335 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/381 ,  H02S30/00 ,  H05B33/0854 ,  H05B37/0218 ,  H05B37/0227 ,  H05B37/0245 ,  H05K1/189 ,  H05K3/323 ,  H05K2201/09036 ,  H05K2201/10106 ,  H05K2203/302 ,  H01L2924/01015 ,  H01L2924/01031 ,  H01L2924/01051 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014

摘要： In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

公开(公告)号：US20160111395A1

公开(公告)日：2016-04-21

申请号：US14870064

申请日：2015-09-30

申请人： INFINEON TECHNOLOGIES AG

发明人： Alexander Heinrich

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L25/0655 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/4827 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/544 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68354 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/05687 ,  H01L2224/06183 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/29166 ,  H01L2224/29171 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/75265 ,  H01L2224/75303 ,  H01L2224/75753 ,  H01L2224/7598 ,  H01L2224/83002 ,  H01L2224/83005 ,  H01L2224/83007 ,  H01L2224/83024 ,  H01L2224/83055 ,  H01L2224/83065 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/83092 ,  H01L2224/83101 ,  H01L2224/83127 ,  H01L2224/83132 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83208 ,  H01L2224/83222 ,  H01L2224/83385 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83466 ,  H01L2224/83469 ,  H01L2224/8381 ,  H01L2224/83815 ,  H01L2224/8382 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83907 ,  H01L2224/83986 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15157 ,  H01L2924/157 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01026 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/01023 ,  H01L2924/01027

摘要： A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

摘要翻译： 形成芯片组件的方法可以包括在载体中形成多个空腔; 该方法还可以包括在每个空腔中设置管芯附着液体; 在芯片安装液体上布置多个芯片，每个芯片包括设置在后侧金属化之后的后侧金属化和后侧互连材料，其中后侧互连材料面向载体; 蒸发管芯附着液体; 并且在蒸发模具附着液体之后，将多个芯片固定到载体上。

公开(公告)号：US09312225B2

公开(公告)日：2016-04-12

申请号：US13943543

申请日：2013-07-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hung-Pin Chang ,  Kuo-Ching Hsu ,  Chen-Shien Chen ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L21/768 ,  H01L21/683 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56

CPC分类号： H01L23/5384 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/11 ,  H01L24/12 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05027 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/13147 ,  H01L2224/1401 ,  H01L2224/1701 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A bump structure that may be used for stacked die configurations is provided. Through-silicon vias are formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon vias. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon vias. The isolation film is thinned to re-expose the through-silicon vias. Bump pads and redistribution lines are formed on the backside of the semiconductor substrate providing an electrical connection to the through-silicon vias. Another isolation film is deposited and patterned, and a barrier layer is formed to provide contact pads for connecting to an external device, e.g., another die/wafer or circuit board.

摘要翻译： 提供了可用于堆叠管芯配置的凸块结构。 通孔形成在半导体衬底中。 半导体衬底的背面变薄以暴露通硅通孔。 在半导体衬底的背面和通过硅通孔的暴露部分之后形成隔离膜。 隔离膜被稀释以重新暴露通硅通孔。 在半导体衬底的背面上形成凸起焊盘和再分布线，提供与通孔硅通孔的电连接。 沉积和图案化另一个隔离膜，并且形成阻挡层以提供用于连接到外部装置（例如另一个芯片/晶片或电路板）的接触焊盘。

公开(公告)号：US20160086907A1

公开(公告)日：2016-03-24

申请号：US14837426

申请日：2015-08-27

申请人： QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD.

发明人： Simon Jonathan Stacey

IPC分类号： H01L23/00 ,  H01L23/31

CPC分类号： H01L24/17 ,  H01L23/28 ,  H01L23/29 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/532 ,  H01L24/05 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13111 ,  H01L2224/1412 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2924/00 ,  H01L2224/05552

摘要： A device comprising a chip including a substrate defining one or more electronic devices and a printed circuit board electrically connected to the chip via one or more solder elements sandwiched between the chip and the printed circuit board, and the solder elements, and buffer layers having a Young's Modulus of 2.5 GPa or less.

摘要翻译： 一种包括芯片的器件，其包括限定一个或多个电子器件的衬底和通过夹在芯片和印刷电路板之间的一个或多个焊料元件与芯片电连接的印刷电路板，以及焊料元件和具有 年轻模量为2.5GPa以下。

公开(公告)号：US09287202B2

公开(公告)日：2016-03-15

申请号：US14444026

申请日：2014-07-28

申请人： Rohm Co., Ltd.

发明人： Yasumasa Kasuya ,  Motoharu Haga ,  Shoji Yasunaga

IPC分类号： H01L23/495 ,  H01L23/28 ,  H01L23/00

CPC分类号： H01L23/562 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/565 ,  H01L22/12 ,  H01L23/28 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49537 ,  H01L23/49555 ,  H01L23/49582 ,  H01L23/564 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/27013 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).

公开(公告)号：US09281291B2

公开(公告)日：2016-03-08

申请号：US14589539

申请日：2015-01-05

申请人： Renesas Electronics Corporation

发明人： Masami Koketsu ,  Toshiaki Sawada

IPC分类号： H01L21/78 ,  H01L21/46 ,  H01L23/00 ,  H01L23/544 ,  H01L23/58 ,  H01L29/78 ,  H01L23/535 ,  H01L27/12

CPC分类号： H01L23/544 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/535 ,  H01L23/585 ,  H01L24/13 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/78 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5448 ,  H01L2224/16 ,  H01L2224/8113 ,  H01L2224/8185 ,  H01L2224/83101 ,  H01L2224/838 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01054 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/04941 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/1433 ,  H01L2924/15788 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00

摘要： To provide a technique capable of positioning of a semiconductor chip and a mounting substrate with high precision by improving visibility of an alignment mark. In a semiconductor chip constituting an LCD driver, a mark is formed in an alignment mark formation region over a semiconductor substrate. The mark is formed in the same layer as that of an uppermost layer wiring (third layer wiring) in an integrated circuit formation region. Then, in the lower layer of the mark and a background region surrounding the mark, patterns are formed. At this time, the pattern P1a is formed in the same layer as that of a second layer wiring and the pattern P1b is formed in the same layer as that of a first layer wiring. Further, the pattern P2 is formed in the same layer as that of a gate electrode, and the pattern P3 is formed in the same layer as that of an element isolation region.

公开(公告)号：US09281280B2

公开(公告)日：2016-03-08

申请号：US13954649

申请日：2013-07-30

申请人： Robert Bosch GmbH

发明人： Christoph Schelling ,  David Borowsky

IPC分类号： H01L23/00 ,  H05K3/40 ,  H05K1/11 ,  B81B7/00

CPC分类号： H01L23/564 ,  B81B7/007 ,  B81C2201/019 ,  B81C2203/035 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11825 ,  H01L2224/13011 ,  H01L2224/13022 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13664 ,  H01L2224/13669 ,  H01L2224/27462 ,  H01L2224/2747 ,  H01L2224/2781 ,  H01L2224/27825 ,  H01L2224/29011 ,  H01L2224/29022 ,  H01L2224/29035 ,  H01L2224/29124 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29166 ,  H01L2224/29181 ,  H01L2224/29186 ,  H01L2224/29562 ,  H01L2224/2957 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29664 ,  H01L2224/29669 ,  H01L2224/32227 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8183 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/8383 ,  H01L2224/9211 ,  H01L2924/00013 ,  H01L2924/1461 ,  H05K1/111 ,  H05K3/4007 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01015 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01005 ,  H01L2924/01027 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/81205

摘要： A bonding pad for thermocompression bonding of a carrier material to a further carrier material includes a base layer and a top layer. The base layer is made of metal, is deformable, and is connected to the carrier material. The metal is nickel-based. The top layer is metallic and is connected directly to the base layer. The top layer is arranged at least on a side of the base layer which faces away from the carrier material. The top layer has a smaller layer thickness than the base layer. In at least one embodiment, the top layer has a greater oxidation resistance than the base layer.

摘要翻译： 用于将载体材料热压接合到另外的载体材料的接合焊盘包括基层和顶层。 基层由金属制成，可变形，并与载体材料连接。 金属为镍基。 顶层是金属的，并直接连接到基层。 顶层至少布置在基层的远离载体材料的一侧上。 顶层具有比基层更薄的层厚度。 在至少一个实施方案中，顶层具有比基层更高的抗氧化性。

公开(公告)号：US09278409B2

公开(公告)日：2016-03-08

申请号：US14613175

申请日：2015-02-03

申请人： Senju Metal Industry Co., Ltd.

发明人： Hiroyoshi Kawasaki ,  Shigeki Kondo ,  Atsushi Ikeda ,  Takahiro Roppongi ,  Daisuke Soma ,  Isamu Sato

IPC分类号： H01B5/00 ,  B32B15/04 ,  B23K35/02 ,  B23K35/26 ,  B23K35/30 ,  C22C9/00 ,  C22C13/00 ,  C22C13/02 ,  H01B1/02 ,  H01L23/00

CPC分类号： B23K35/025 ,  B23K35/0244 ,  B23K35/262 ,  B23K35/302 ,  C22C9/00 ,  C22C12/00 ,  C22C13/00 ,  C22C13/02 ,  C22F1/08 ,  H01B1/02 ,  H01L24/13 ,  H01L2224/13014 ,  H01L2224/13147 ,  H01L2224/13561 ,  H01L2224/13611 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2924/01015 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/0109 ,  H01L2924/01092 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/01028 ,  H01L2924/00011

摘要： A core ball wherein a junction melting temperature and a low alpha dose are set for suppressing a soft error generation and solving a mounting problem. A metallic powder as a core is a sphere. A pure degree of a Cu ball of the metallic powder is equal to or higher than 99.9% but equal to or less than 99.995%. A contained amount of one of Pb and Bi or a total contained amount of Pb and Bi is equal to or higher than 1 ppm. A sphericity of the Cu ball is at least 0.95. A solder plating film for coating the Cu ball comprises Sn—Bi based alloy. U contained in the solder plating film is equal to or less than 5 ppb and Th is equal to or less than 5 ppb. An alpha dose of the core ball is equal to or less than 0.0200 cph/cm2.

摘要翻译： 设置结熔融温度和低α剂量的芯球，以抑制软错误产生并解决安装问题。 作为核心的金属粉末是球体。 金属粉末的Cu球的纯度等于或高于99.9％但等于或小于99.995％。 Pb和Bi中的一种或Pb和Bi的总含量的含量等于或高于1ppm。 Cu球的球形度至少为0.95。 用于涂覆Cu球的焊料镀覆膜包括Sn-Bi基合金。 包含在焊料镀膜中的U等于或小于5ppb，Th等于或小于5ppb。 芯球的α剂量等于或小于0.0200cph / cm 2。

公开(公告)号：US09269708B2

公开(公告)日：2016-02-23

申请号：US13245675

申请日：2011-09-26

申请人： Jonathan M. Rothberg ,  Wolfgang Hinz ,  Kim L. Johnson ,  James Bustillo

发明人： Jonathan M. Rothberg ,  Wolfgang Hinz ,  Kim L. Johnson ,  James Bustillo

IPC分类号： G01N27/403 ,  H01L27/088 ,  C12Q1/68 ,  H01L29/78 ,  G01N27/414

CPC分类号： G01N27/4148 ,  C12Q1/6818 ,  C12Q1/6874 ,  G01N27/4145 ,  G01N33/54373 ,  G01N33/5438 ,  H01L27/088 ,  H01L29/42324 ,  H01L29/78 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01073 ,  H01L2924/14 ,  H01L2924/1433 ,  Y10T436/22 ,  C12Q2565/607 ,  C12Q2565/301 ,  C12Q2533/101

摘要： Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.

公开(公告)号：US20160035690A1

公开(公告)日：2016-02-04

申请号：US14878903

申请日：2015-10-08

申请人： FUJI ELECTRIC CO., LTD.

发明人： Kazumasa KIDO ,  Takashi SAITOU ,  Kyouhei FUKUDA ,  Shinji TADA ,  Fumihiko MOMOSE ,  Yoshitaka NISHIMURA

IPC分类号： H01L23/00 ,  B23K35/26 ,  B23K1/00 ,  B23K35/02 ,  C22C13/02 ,  B23K1/19

CPC分类号： H01L24/29 ,  B23K1/00 ,  B23K1/0008 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/012 ,  B23K1/19 ,  B23K1/203 ,  B23K35/0244 ,  B23K35/025 ,  B23K35/26 ,  B23K35/262 ,  B23K2101/42 ,  B23K2103/56 ,  C22C13/02 ,  H01L21/52 ,  H01L23/051 ,  H01L24/32 ,  H01L24/45 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/29111 ,  H01L2224/2932 ,  H01L2224/32225 ,  H01L2224/32501 ,  H01L2224/45124 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/83815 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/20107 ,  H01L2924/00 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01029 ,  H01L2924/01013 ,  H01L2924/01049 ,  H01L2924/01028 ,  H01L2924/01083 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01014 ,  H01L2924/01005 ,  H01L2924/01034 ,  H01L2924/01015 ,  H01L2924/0103 ,  H01L2924/01025 ,  H01L2924/01026 ,  H01L2924/01024 ,  H01L2924/01012 ,  H01L2924/01046 ,  H01L2924/01038 ,  H01L2924/01052 ,  H01L2924/013

摘要： A solder joint layer has a structure in which plural fine-grained second crystal sections (22) precipitate at crystal grain boundaries between first crystal sections (21) dispersed in a matrix. The first crystal sections (21) are Sn crystal grains containing tin and antimony in a predetermined proportion. The second crystal sections (22) are made up of a first portion containing a predetermined proportion of Ag atoms with respect to Sn atoms, or a second portion containing a predetermined proportion of Cu atoms with respect to Sn atoms, or both. The solder joint layer may have third crystal sections (23) which are crystal grains that contain a predetermined proportion of Sb atoms with respect to Sn atoms. As a result, solder joining is enabled at a low melting point, and a highly reliable solder joint layer having a substantially uniform metal structure can be formed.

摘要翻译： 焊接层具有多个细晶粒第二晶体部分（22）在分散在基体中的第一晶体部分（21）之间的晶界处析出的结构。 第一晶体部分（21）是以规定比例含有锡和锑的Sn晶粒。 第二晶体部分（22）由相对于Sn原子含有预定比例的Ag原子的第一部分或者相对于Sn原子含有预定比例的Cu原子的第二部分或两者组成。 焊接层可以具有相对于Sn原子含有规定比例的Sb原子的晶粒的第三晶体部（23）。 结果，可以在低熔点下进行焊料接合，并且可以形成具有基本上均匀金属结构的高可靠性焊接层。