公开(公告)号：US20180068982A1

公开(公告)日：2018-03-08

申请号：US15800127

申请日：2017-11-01

Applicant: Infineon Technologies AG

Inventor： Alexander Heinrich

IPC: H01L25/065 ,  H01L21/683

CPC classification number: H01L25/0655 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/4827 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/544 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68354 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/05687 ,  H01L2224/06183 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/29166 ,  H01L2224/29171 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/75265 ,  H01L2224/75303 ,  H01L2224/75753 ,  H01L2224/7598 ,  H01L2224/83002 ,  H01L2224/83005 ,  H01L2224/83007 ,  H01L2224/83024 ,  H01L2224/83055 ,  H01L2224/83065 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/83092 ,  H01L2224/83101 ,  H01L2224/83127 ,  H01L2224/83132 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83208 ,  H01L2224/83222 ,  H01L2224/83385 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83466 ,  H01L2224/83469 ,  H01L2224/8381 ,  H01L2224/83815 ,  H01L2224/8382 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83907 ,  H01L2224/83986 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15157 ,  H01L2924/157 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01026 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/01023 ,  H01L2924/01027

Abstract: A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

公开(公告)号：US09881900B2

公开(公告)日：2018-01-30

申请号：US15379437

申请日：2016-12-14

Applicant: ROHM CO., LTD.

Inventor： Hirofumi Takeda ,  Yoshihisa Takada

IPC: H01L23/24 ,  H01L25/065 ,  H01L25/00 ,  H01L23/13 ,  H01L23/14 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L25/0652 ,  G01C17/30 ,  H01L23/13 ,  H01L23/147 ,  H01L23/24 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/11618 ,  H01L2224/11825 ,  H01L2224/11826 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/13566 ,  H01L2224/13583 ,  H01L2224/13647 ,  H01L2224/13666 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06568 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/10158 ,  H01L2924/15156 ,  H01L2924/15157 ,  H01L2924/15321 ,  H01L2924/19102 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A semiconductor device is provided. The semiconductor device can be manufactured with a reduced cost. The semiconductor device (1D) includes, a substrate (100D), which includes a main surface (101D) and a recess (108D) depressed from the main surface (101D), and includes a semiconductor material; a wiring layer (200D) in which at least a portion thereof is formed on the substrate (100D); one or more first elements (370D) accommodated in the recess (108D); a sealing resin (400D) covering at least a portion of the one or more first elements (370D) and filled in the recess (108D); and a plurality of columnar conductive portions (230D) penetrating through the sealing resin (400D) in the depth direction of the recess (108D), and respectively connected with the portion of the wiring layer (200D) that is formed at the recess (108D).

公开(公告)号：US09408309B2

公开(公告)日：2016-08-02

申请号：US14305453

申请日：2014-06-16

Applicant: OLYMPUS CORPORATION

Inventor： Takanori Sekido

IPC: H05K7/00 ,  H05K1/18 ,  H05K1/02 ,  H05K1/14

CPC classification number: H05K1/183 ,  H01L2224/16227 ,  H01L2924/15156 ,  H01L2924/15157 ,  H01L2924/1627 ,  H05K1/0284 ,  H05K1/14 ,  H05K1/181 ,  H05K2201/047

Abstract: An electronic component mounting structure includes a three-dimensional substrate having a three-dimensional shape and including a hollow portion formed on at least one of side surfaces of the three-dimensional substrate, and an electronic component mounted on a bottom face of the hollow portion. The three-dimensional substrate includes an opening portion on a side surface different from a side surface on which the hollow portion is formed for allowing observation of a connection portion between the bottom face of the hollow portion and the electronic component from an outer periphery side of the three-dimensional substrate.

Abstract translation: 电子部件安装结构包括具有三维形状的三维基板，并且包括形成在三维基板的至少一个侧表面上的中空部分，以及安装在中空部分的底面上的电子部件 。 三维基板包括在与形成有中空部分的侧表面不同的侧表面上的开口部分，用于允许从中空部分的底面与电子部件之间的连接部分从外周侧观察到 三维基板。

公开(公告)号：US08436463B2

公开(公告)日：2013-05-07

申请号：US12230345

申请日：2008-08-28

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L23/12

CPC classification number: H05K1/185 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/05001 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/16225 ,  H01L2224/2402 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15157 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/114 ,  H05K3/06 ,  H05K3/28 ,  H05K2201/09563 ,  H05K2201/09845 ,  H05K2201/10674

Abstract: A packaging substrate structure with an electronic component embedded therein and a fabricating method thereof are disclosed. The packaging substrate structure comprises a core plate; a first built-up structure disposed on a surface of the core plate and comprising a first dielectric layer and a first circuit layer disposed on the first dielectric layer; a second built-up structure disposed on the first built-up structure, wherein a cavity is disposed in the second built-up structure to expose the first built-up structure; an electronic component disposed in the cavity, wherein the electronic component has an active surface having a plurality of electrode pads and an inactive surface facing the first built-up structure; and a solder mask disposed on the surfaces of the second built-up structure and the electronic component, and having a plurality of first openings to expose the electrode pads of the electronic component.

公开(公告)号：US08178957B2

公开(公告)日：2012-05-15

申请号：US12704146

申请日：2010-02-11

Applicant: Yuichi Taguchi ,  Akinori Shiraishi ,  Mitsutoshi Higashi ,  Kei Murayama

Inventor： Yuichi Taguchi ,  Akinori Shiraishi ,  Mitsutoshi Higashi ,  Kei Murayama

IPC: H01L29/72

CPC classification number: H01L23/13 ,  B81B7/007 ,  B81B2207/096 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0558 ,  H01L2224/05599 ,  H01L2224/05644 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73265 ,  H01L2224/81097 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/351 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of manufacturing an electronic component device, includes the steps of preparing a wiring substrate, which includes a silicon substrate, a concave portion provided on its upper surface side, a through hole formed to penetrate the silicon substrate on a bottom surface side of the concave portion, an insulating layer formed on the silicon substrate, a penetration electrode constructed by a lower conductor portion formed to a halfway position of a height direction from a bottom portion of the through hole and a connection metal member (indium layer) formed on the lower conductor portion in the through hole, and an electronic component having a terminal metal member (gold bump) on a lower surface side, and softening the connection metal member of the wiring substrate in a heating atmosphere and then sticking the terminal metal member of the electronic component into the connection metal member and connecting thereto.

Abstract translation: 一种电子部件装置的制造方法，其特征在于，包括：制作布线基板的步骤，所述布线基板包括硅基板，设置在其上表面侧的凹部，形成为贯通所述硅基板的通孔， 形成在硅基板上的绝缘层，由形成在通孔的底部的高度方向的中途位置的下部导体部分构成的贯通电极，以及形成在该基板上的连接金属部件（铟层） 通孔中的下导体部分和在下表面侧具有端子金属部件（金凸块）的电子部件，并且在加热气氛中软化接线基板的连接金属部件，然后将端子金属部件 电子部件插入连接金属部件并与其连接。

公开(公告)号：US07989927B2

公开(公告)日：2011-08-02

申请号：US12257626

申请日：2008-10-24

Applicant: Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

Inventor： Akinori Shiraishi ,  Kei Murayama ,  Yuichi Taguchi ,  Masahiro Sunohara ,  Mitsutoshi Higashi

IPC: H01L23/49

CPC classification number: H01L23/147 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/48 ,  H01L33/486 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/48091 ,  H01L2224/48235 ,  H01L2224/85455 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12043 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity.

Abstract translation: 在用于封装的硅衬底中，设置有通孔，其中填充有用于容纳电子器件的芯片的空腔的底表面的通孔到衬底的背面。 在空腔的底面侧的贯通电极的端部具有与形成包括电子器件的芯片的电路的布线的连接部。 用于封装的硅衬底的特征在于，（1）包括薄膜布线作为布线，并且连接部分被连接到薄膜布线的导体加强和/或（2）引线接合部分被包括为 通过在空腔的底面侧引线接合贯通电极的端部而形成布线和连接部。

公开(公告)号：US07957154B2

公开(公告)日：2011-06-07

申请号：US11611538

申请日：2006-12-15

Applicant: Sotaro Ito ,  Michimasa Takahashi ,  Yukinobu Mikado

Inventor： Sotaro Ito ,  Michimasa Takahashi ,  Yukinobu Mikado

IPC: H05K1/16

CPC classification number: H05K1/0218 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2402 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15331 ,  H01L2924/15788 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/183 ,  H05K1/185 ,  H05K3/4652 ,  H05K2201/09981 ,  H05K2203/0733 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A multilayer printed circuit board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein a electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.

Abstract translation: 一种多层印刷电路板，其中，在容纳半导体元件的树脂绝缘层，另一树脂绝缘层和导体电路上形成有通过通孔电连接的导体电路，其中电磁屏蔽层形成在 环绕用于容纳半导体元件的凹部或凹部的内壁面的树脂绝缘层，并且半导体元件嵌入在凹部中。

公开(公告)号：US20100159647A1

公开(公告)日：2010-06-24

申请号：US12611231

申请日：2009-11-03

Applicant: Sotaro ITO ,  Michimasa Takahashi ,  Yukinobu Mikado

Inventor： Sotaro ITO ,  Michimasa Takahashi ,  Yukinobu Mikado

IPC: H01L21/56

CPC classification number: H05K1/0218 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2402 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15331 ,  H01L2924/15788 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/183 ,  H05K1/185 ,  H05K3/4652 ,  H05K2201/09981 ,  H05K2203/0733 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A multilayer printed circuit board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein a electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.

Abstract translation: 一种多层印刷电路板，其中，在容纳半导体元件的树脂绝缘层，另一树脂绝缘层和导体电路上形成有通过通孔电连接的导体电路，其中电磁屏蔽层形成在 环绕用于容纳半导体元件的凹部或凹部的内壁面的树脂绝缘层，并且半导体元件嵌入在凹部中。

公开(公告)号：US07727804B2

公开(公告)日：2010-06-01

申请号：US11810937

申请日：2007-06-06

Applicant: John Stephen Smith

Inventor： John Stephen Smith

IPC: H01L21/50

CPC classification number: H01L24/95 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/02002 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/147 ,  H01L24/24 ,  H01L24/26 ,  H01L24/82 ,  H01L24/83 ,  H01L25/0655 ,  H01L25/50 ,  H01L29/0657 ,  H01L2221/68359 ,  H01L2224/24227 ,  H01L2224/83136 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/95085 ,  H01L2224/95092 ,  H01L2224/95122 ,  H01L2224/95136 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15155 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A method and apparatus for assembling microstructures onto a substrate through fluid transport. The microstructures being shaped blocks self-align into recessed regions located on a substrate such that the microstructure becomes integral with the substrate. The improved method includes a step of transferring the shaped blocks into a fluid to create a slurry. Such slurry is then dispensed evenly or circulated over the top surface of a substrate having recessed regions thereon. The microstructure via the shape and fluid tumbles onto the surface of the substrate, self-aligns, and engages into a recessed region.

Abstract translation: 一种用于通过流体输送将微结构组装在基底上的方法和装置。 被成形的微结构自行对准到位于基底上的凹陷区域，使得微结构与衬底成为一体。 改进的方法包括将成形块转移到流体中以产生浆料的步骤。 然后将这样的浆料均匀地分配或在其上具有凹陷区域的基底的顶表面上循环。 通过形状和流体的微观结构滚动到基底的表面上，自对准并接合到凹陷区域中。

公开(公告)号：US07615405B2

公开(公告)日：2009-11-10

申请号：US11872331

申请日：2007-10-15

Applicant: Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

Inventor： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

IPC: H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC classification number: H01L24/81 ,  H01L23/544 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/20109 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

Abstract translation: 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。