摘要:
A bump structure includes a first end, and a second end opposite the first end. The bump structure further includes a first side connected between the first end and the second end. The bump structure further includes a second side opposite the first side. The second side is connected between the first end and the second end, and the second side comprises a recess for a reflowed solder material to fill.
摘要:
A semiconductor package includes a semiconductor chip having a first surface, a second surface which faces away from the first surface, and through holes which pass through the first surface and the second surface; a dielectric layer formed on one or more of the first surface and the second surface and formed with grooves around the through holes on a fourth surface of the dielectric layer facing away from a third surface of the dielectric layer which is attached to the semiconductor chip; through-silicon vias filling the through holes; and bumps formed on the through-silicon vias and on portions of the dielectric layer around the through-silicon vias and filling the grooves.
摘要:
The present invention relates to a method for preparing three-dimensional actin structures having a well-defined shape and displaying improved mechanical rigidity. This method comprises the steps of (a) providing a polymerization solution comprising actin monomers, a branching agent and a capping agent, (b) providing at least one surface having thereon a pattern which is coated with a nucleating agent, and (c) contacting the at least one surface of step (b) with the polymerization solution of step (a) so as to induce the polymerization of actin and obtain the said desired three-dimensional actin structure. Applications of the present invention in various technological fields such as microelectronics are also provided.
摘要:
A system and method for forming a semiconductor die contact structure is disclosed. An embodiment comprises a top level metal contact, such as copper, with a thickness large enough to act as a buffer for underlying low-k, extremely low-k, or ultra low-k dielectric layers. A contact pad or post-passivation interconnect may be formed over the top level metal contact, and a copper pillar or solder bump may be formed to be in electrical connection with the top level metal contact.
摘要:
Embodiments concern Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures. According to an embodiment, a structure includes a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.
摘要:
Embodiments of mechanisms for forming a semiconductor die are provided. The semiconductor die includes a semiconductor substrate and a protection layer formed over the semiconductor substrate. The semiconductor die also includes a conductive layer conformally formed over the protection layer, and a recess is formed in the conductive layer. The recess surrounds a region of the conductive layer. The semiconductor die further includes a solder bump formed over the region of the conductive layer surrounded by the recess.
摘要:
The bump structure includes a metal pattern disposed on an electrode pad to have a vertical sidewall and a recessed region surrounded by the vertical sidewalls, a metal post including a lower portion inserted into the recessed region and a protruded portion upwardly extending from the lower portion, and a passivation spacer on a sidewall of the metal post. The metal post is electrically connected to the electrode pad.
摘要:
Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular, or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.
摘要:
A TSV exposing process is provided, including: performing a mechanical grinding process on the substrate back surface of a substrate with a TSV conductive column, a liner between the substrate and the TSV conductive column; performing a first and a second chemical mechanical polishing process on the grinded substrate back surface; then performing an etching on the substrate back surface, and making the TSV backside reveal more than 10 μm.
摘要:
An embodiment is an integrated circuit structure including a first die having a bump structure, and a second die having a pad structure. The first die is attached to the second die by bonding the bump structure and the pad structure. The bump structure includes a metal pillar, a metal cap layer on the metal pillar, a metal insertion layer on the metal cap layer, and a solder layer on the metal insertion layer. The pad structure includes at least one of a nickel (Ni) layer, a palladium (Pd) layer or a gold (Au) layer.