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    CONTROLLER OF STORAGE DEVICE
    2.
    发明公开
    CONTROLLER OF STORAGE DEVICE 审中-公开

    公开(公告)号：US20240362164A1

    公开(公告)日：2024-10-31

    申请号：US18486165

    申请日：2023-10-13

    申请人： SK hynix Inc.

    发明人： Hyun Jin Chung ,  Hee Cheol KIM

    IPC分类号： G06F12/0815 ,  G06F12/02

    CPC分类号： G06F12/0815 ,  G06F12/0215

    摘要： A controller of a storage device includes a memory configured to serve as a lookahead cache; a read request storage configured to store therein read requests; and a cache manager configured to perform a bottleneck check operation when a process for a cache hit read request stored in the read request storage is completed, and selectively deactivate the lookahead cache based on a check result in bottleneck check operations.

    BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIPS
    3.
    发明公开
    BUFFER CHIP, AND SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIPS 审中-公开

    公开(公告)号：US20240361954A1

    公开(公告)日：2024-10-31

    申请号：US18520228

    申请日：2023-11-27

    申请人： SK hynix Inc.

    发明人： Seong Ju LEE

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0656 ,  G06F3/0604 ,  G06F3/0673

    摘要： A buffer chip includes a chip select signal reception circuit for receiving one or more system chip select signals transmitted from a memory controller and a chip ID reception circuit for receiving chip ID information transmitted from the memory controller. The buffer chip also includes a chip select signal generation circuit that generates memory chip select signals by using the one or more system chip select signals and the chip ID information and a chip select signal transmission circuit that transmits the memory chip select signals to a plurality of memory chips.

    Semiconductor memory device and manufacturing method of semiconductor memory device
    5.
    发明授权
    Semiconductor memory device and manufacturing method of semiconductor memory device 有权

    公开(公告)号：US12133379B2

    公开(公告)日：2024-10-29

    申请号：US17235577

    申请日：2021-04-20

    申请人： SK hynix Inc.

    发明人： Nam Jae Lee

    IPC分类号： H10B41/27 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

    CPC分类号： H10B41/27 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

    摘要： There are provided a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes: a channel structure including a first pillar part and a second pillar part extending from the first pillar part; a blocking insulating layer surrounding a sidewall of the first pillar part; a data storage layer disposed between the first pillar part and the blocking insulating layer; an upper select line overlapping with an end portion of the blocking insulating layer and an end portion of the data storage layer, which face in an extending direction of the second pillar part, the upper select line surrounding a sidewall of the second pillar part; and a tunnel insulating layer disposed between the first pillar part and the data storage layer, the tunnel insulating layer extending between the second pillar part and the upper select line.

    Image sensor and method of operating the image sensor
    6.
    发明授权
    Image sensor and method of operating the image sensor 有权

    公开(公告)号：US12133012B2

    公开(公告)日：2024-10-29

    申请号：US17982952

    申请日：2022-11-08

    申请人： SK hynix Inc.

    发明人： Yu Jin Park ,  Han Sol Park

    IPC分类号： H04N25/778 ,  H01L27/146 ,  H04N25/78

    CPC分类号： H04N25/778

    摘要： The present technology relates to an image sensor. The image sensor according to an embodiment may include a pixel array in which a plurality of pixels are connected through common lines, an internal amplifier configured to amplify a signal of a target pixel selected from among the plurality of pixels, switches configured to control a connection between the target pixel and floating diffusion nodes of candidate pixels having the same column address as the target pixel among the plurality of pixels, and a controller configured to output control signals for controlling the switches.

    Image sensing device
    7.
    发明授权
    Image sensing device 有权

    公开(公告)号：US12132068B2

    公开(公告)日：2024-10-29

    申请号：US17525207

    申请日：2021-11-12

    申请人： SK hynix Inc.

    发明人： Ho Young Kwak

    IPC分类号： H01L27/146

    CPC分类号： H01L27/14685 ,  H01L27/14603 ,  H01L27/14612

    摘要： An image sensing device includes a first substrate layer including first conductive impurities and structured to produce photocharges based on the incident light and capture the photocharges using a voltage difference induced in response to a demodulation control signal; a second substrate layer including second conductive impurities having characteristics opposite to those of the first conductive impurities, and structured to be bonded to the first substrate layer; and a depletion layer formed between the first substrate layer and the second substrate layer.

    Semiconductor system including semiconductor device for performing defective analysis
    8.
    发明授权
    Semiconductor system including semiconductor device for performing defective analysis 有权

    公开(公告)号：US12131791B2

    公开(公告)日：2024-10-29

    申请号：US18070606

    申请日：2022-11-29

    申请人： SK hynix Inc.

    发明人： Byung Goo Cho

    IPC分类号： G11C29/44 ,  G11C29/18 ,  G11C29/52

    CPC分类号： G11C29/4401 ,  G11C29/18 ,  G11C29/52 ,  G11C2029/1802

    摘要： A semiconductor system includes a controller configured to: select a plurality of fail points based on defect analysis information collected in a process stage, and provide an address designating at least one of the fail points together with a partial reset command; and a semiconductor device including a plurality of functional regions each including one or more of the fail points, the semiconductor device configured to reset, in response to the partial reset command, a sequential circuit disposed in a target functional region corresponding to the address among the functional regions.

    Vertical memory device with a double word line structure
    9.
    发明授权
    Vertical memory device with a double word line structure 有权

    公开(公告)号：US12131774B2

    公开(公告)日：2024-10-29

    申请号：US17968082

    申请日：2022-10-18

    申请人： SK hynix Inc.

    发明人： Seung-Hwan Kim ,  Su-Ock Chung ,  Seon-Yong Cha

    IPC分类号： G11C11/4097 ,  G11C7/18 ,  G11C11/401 ,  H10B12/00

    CPC分类号： G11C11/4097 ,  G11C7/18 ,  G11C11/401 ,  H10B12/30

    摘要： A memory device includes: a substrate; a bit line which is vertically oriented from the substrate; a plate line which is vertically oriented from the substrate; and a memory cell provided with a transistor and a capacitor that are positioned in a lateral arrangement between the bit line and the plate line, wherein the transistor includes: an active layer which is laterally oriented to be parallel to the substrate between the bit line and the capacitor; and a line-shaped lower word line and a line-shaped upper word line vertically stacked with the active layer therebetween and oriented to intersect with the active layer.

    Memory system for optimizing parameter values according to workload class and data processing system including the same
    10.
    发明授权
    Memory system for optimizing parameter values according to workload class and data processing system including the same 有权

    公开(公告)号：US12131070B2

    公开(公告)日：2024-10-29

    申请号：US18070610

    申请日：2022-11-29

    申请人： SK hynix Inc.

    发明人： In Ho Jung ,  Ki Tae Kim ,  Seon Ju Lee

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0659 ,  G06F3/0611 ,  G06F3/0629 ,  G06F3/0679

    摘要： A memory system comprising: a memory device having a nonvolatile specific storage space configured to store workload information including groups of parameter values, grouped respectively corresponding to a plurality of workload classes in a table form, and a controller configured to detect a ratio of a set command inputted from an outside in a set operation mode, select one of the workload classes as a detected class, load, from the specific storage space, one of the groups corresponding to the detected class, process the set command under an execution condition determined by applying the loaded group, and update the group corresponding to the detected class with parameter values inputted from the outside.