公开(公告)号：US09455237B2

公开(公告)日：2016-09-27

申请号：US14754293

申请日：2015-06-29

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/498 ,  H01L21/768 ,  H01L21/48 ,  H01L21/3213

CPC分类号： H01L24/11 ,  H01L21/3213 ,  H01L21/32139 ,  H01L21/4853 ,  H01L21/76885 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/0348 ,  H01L2224/0362 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05164 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05564 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05578 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05664 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11013 ,  H01L2224/1111 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1182 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/81815 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00

摘要： An apparatus relating generally to a substrate is disclosed. In this apparatus, a first metal layer is on the substrate. The first metal layer has an opening. The opening of the first metal layer has a bottom and one or more sides extending from the bottom. A second metal layer is on the first metal layer. The first metal layer and the second metal layer provide a bowl-shaped structure. An inner surface of the bowl-shaped structure is defined responsive to the opening of the first metal layer and the second metal layer thereon. The opening of the bowl-shaped structure is configured to receive and at least partially retain a bonding material during a reflow process.

公开(公告)号：US20160276257A1

公开(公告)日：2016-09-22

申请号：US15159323

申请日：2016-05-19

申请人： DAI NIPPON PRINTING CO., LTD.

发明人： Satoru KURAMOCHI ,  Sumio KOIWA ,  Hidenori YOSHIOKA

IPC分类号： H01L23/498

CPC分类号： H01L23/49827 ,  H01L23/13 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/065 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16165 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81805 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H05K1/115 ,  H05K3/28 ,  H05K3/445 ,  H05K2201/09154 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09854 ,  H05K2203/0594 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/0665 ,  H01L2924/07025

摘要： A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

摘要翻译： 通孔电极基板包括基板，该基板包括从第一表面的第一孔到第二表面的第二孔延伸的通孔，第二孔的面积大于第一孔的面积， 所述孔在所述第一孔和所述第二孔之间具有最小孔径部分，其中在平面视图中，所述通孔中的所述最小孔径部分的面积在所述通孔的多个区域中最小， 并且与暴露于第一表面和第二表面之一的填料接触的至少一个气体排出构件。

公开(公告)号：US09449937B2

公开(公告)日：2016-09-20

申请号：US14402221

申请日：2013-08-02

申请人： Panasonic Intellectual Property Management Co., Ltd.

发明人： Koji Kawakita ,  Susumu Sawada ,  Seiichi Nakatani ,  Yoshihisa Yamashita

IPC分类号： H01L23/00 ,  H01L33/64 ,  H01L23/367 ,  H01L33/60

CPC分类号： H01L24/32 ,  H01L23/3677 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/27 ,  H01L24/83 ,  H01L24/94 ,  H01L24/96 ,  H01L33/60 ,  H01L33/647 ,  H01L2224/0346 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05567 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/14 ,  H01L2224/2746 ,  H01L2224/2784 ,  H01L2224/32113 ,  H01L2224/3224 ,  H01L2224/3226 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48639 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/49107 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/2064 ,  H01L2924/2075 ,  H01L2924/351 ,  H01L2933/0058 ,  H01L2933/0066 ,  H01L2933/0075 ,  H01L2924/00 ,  H01L2224/82 ,  H01L2224/03 ,  H01L2924/00015 ,  H01L2224/05552 ,  H01L2924/00012

摘要： There is provided a semiconductor device. The semiconductor device of the present invention includes a semiconductor element and a metal buffer layer in an electrical connection to the semiconductor element. The metal buffer layer and the semiconductor element are in a connection with each other by mutual surface contact of the metal buffer layer and the semiconductor element. The metal buffer layer is an external connection terminal used for a mounting with respect to a secondary mount substrate, and the metal buffer layer serves as a buffer part having a stress-relaxation effect between the semiconductor element and the secondary mount substrate.

摘要翻译： 提供了一种半导体器件。 本发明的半导体器件包括与半导体元件电连接的半导体元件和金属缓冲层。 金属缓冲层和半导体元件通过金属缓冲层和半导体元件的相互表面接触而彼此连接。 金属缓冲层是用于相对于辅助安装基板的安装的外部连接端子，并且金属缓冲层用作在半导体元件和辅助安装基板之间具有应力松弛效应的缓冲部分。

公开(公告)号：US09443760B2

公开(公告)日：2016-09-13

申请号：US14543557

申请日：2014-11-17

申请人： Infineon Technologies AG

发明人： Joachim Mahler ,  Thomas Bemmerl ,  Anton Prueckl

IPC分类号： H01L21/00 ,  H01L21/768 ,  H01L23/13 ,  H01L23/433 ,  H01L23/495 ,  H01L23/00 ,  H01L23/498 ,  H01L25/07 ,  H01L25/00 ,  H01L23/31

CPC分类号： H01L21/76877 ,  H01L21/76816 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49833 ,  H01L24/05 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/82 ,  H01L24/92 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/224 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24105 ,  H01L2224/24155 ,  H01L2224/24175 ,  H01L2224/244 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29311 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/35 ,  H01L2224/352 ,  H01L2224/3701 ,  H01L2224/37113 ,  H01L2224/37118 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/3716 ,  H01L2224/37164 ,  H01L2224/37169 ,  H01L2224/40095 ,  H01L2224/40155 ,  H01L2224/40175 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/41171 ,  H01L2224/48155 ,  H01L2224/48175 ,  H01L2224/49171 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82104 ,  H01L2224/82105 ,  H01L2224/82106 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84447 ,  H01L2224/92244 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/07811 ,  H01L2924/01028 ,  H01L2924/00012 ,  H01L2924/01023 ,  H01L2224/45099

摘要： An electronic device includes a first chip carrier and a second chip carrier isolated from the first chip carrier. A first power semiconductor chip is mounted on and electrically connected to the first chip carrier. A second power semiconductor chip is mounted on and electrically connected to the second chip carrier. An electrically insulating material is configured to at least partially surround the first power semiconductor chip and the second power semiconductor chip. An electrical interconnect is configured to electrically connect the first power semiconductor chip to the second power semiconductor chip, wherein the electrical interconnect has at least one of a contact clip and a galvanically deposited conductor.

摘要翻译： 电子设备包括与第一芯片载体隔离的第一芯片载体和第二芯片载体。 第一功率半导体芯片安装在电连接到第一芯片载体上。 第二功率半导体芯片安装在第二芯片载体上并电连接到第二芯片载体。 电绝缘材料被配置为至少部分地围绕第一功率半导体芯片和第二功率半导体芯片。 电互连被配置为将第一功率半导体芯片电连接到第二功率半导体芯片，其中电互连具有接触夹和电沉积导体中的至少一个。

公开(公告)号：US09437791B2

公开(公告)日：2016-09-06

申请号：US14105439

申请日：2013-12-13

申请人： LG INNOTEK CO., LTD.

发明人： Byung Mok Kim ,  Young Jin No ,  Bo Hee Kang ,  Hiroshi Kodaira

IPC分类号： H01L31/12 ,  H01L27/32 ,  H01L33/00 ,  H01L33/62 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

CPC分类号： H01L33/62 ,  H01L23/3677 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48455 ,  H01L2224/48997 ,  H01L2224/73265 ,  H01L2224/85951 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/15183 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Disclosed is a light emitting device package including a package body including at least one electrode pad disposed on a surface thereof, a light emitting device disposed on the package body, the light emitting device being electrically connected to the electrode pad through a wire, and a via hole electrode passing through the package body, wherein the wire forms a stitch on at least one of the light emitting device and the electrode pad, the light emitting device package further includes a bonding ball disposed on the stitch, and the via hole electrode non-overlaps the stitch and the bonding ball in a vertical direction.

摘要翻译： 公开了一种发光器件封装，其包括：封装体，其包括设置在其表面上的至少一个电极焊盘;发光器件，其布置在封装主体上，所述发光器件通过导线电连接到所述电极焊盘;以及 通孔电极通过封装体，其中，所述线在所述发光器件和所述电极焊盘中的至少一个上形成针迹，所述发光器件封装还包括设置在所述线圈上的接合球，并且所述通孔电极非 在垂直方向上重新缝合线圈和接合球。

公开(公告)号：US09437508B2

公开(公告)日：2016-09-06

申请号：US14381133

申请日：2013-03-06

申请人： Panasonic Corporation

发明人： Zyunya Tanaka ,  Masanori Minamio

IPC分类号： H01L23/48 ,  H01L23/04 ,  H01L23/433 ,  H01L23/495 ,  H01L25/11 ,  H01L21/52 ,  H01L23/31 ,  H01L23/00 ,  H01L21/60

CPC分类号： H01L23/041 ,  H01L21/52 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/09 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/115 ,  H01L2021/60015 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/29111 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/80801 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01047

摘要： In a method for manufacturing a semiconductor device according to the present invention, as shown in FIG. 2(A), a case (2) including a first terminal (1) is placed on a working table (3) with an opening (30) formed at the bottom of the case (2). Subsequently, as shown in FIG. 2(B), a plurality of packages (6,6,6) including second terminals (4) are placed on the working table (3) through the opening (30) of the case (2), forming a clearance (31) between the first terminal (1) and the second terminal (4). As shown in FIG. 2(C), a bonding material (7) is disposed in the clearance (31) so as to electrically connect the first terminal (1) and the second terminal (4). Thus, the exposed surfaces of the packages (6,6,6) in the opening (30) of the case (2) are aligned at the same height, thereby reducing variations in thermal resistance among the packages (6,6,6).

摘要翻译： 在本发明的半导体装置的制造方法中，如图1所示， 如图2（A）所示，包括第一端子（1）的壳体（2）被放置在工作台（3）上，开口（30）形成在壳体（2）的底部。 随后，如图3所示。 如图2（B）所示，包括第二端子（4）的多个包装件（6,6,6）通过壳体（2）的开口（30）放置在工作台（3）上，形成间隙（31） 在第一端子（1）和第二端子（4）之间。 如图所示。 如图2（C）所示，在间隙（31）中设置接合材料（7），以使第一端子（1）和第二端子（4）电连接。 因此，壳体（2）的开口（30）中的包装（6,6,6）的暴露表面以相同的高度排列，从而减少包装（6,6,6）之间的热阻变化， 。

公开(公告)号：US20160254744A1

公开(公告)日：2016-09-01

申请号：US15072675

申请日：2016-03-17

申请人： International Business Machines Corporation

发明人： Paul S. Andry ,  Leland Chang ,  Evan G. Colgan ,  John U. Knickerbocker ,  Bucknell C. Webb ,  Robert Wisnieff

IPC分类号： H02M3/156 ,  G06F1/26 ,  H01L25/065 ,  H01L23/64 ,  H01L23/00

CPC分类号： H02M3/156 ,  G05F3/02 ,  G06F1/26 ,  G06F1/263 ,  G06F1/266 ,  H01L23/5286 ,  H01L23/64 ,  H01L23/642 ,  H01L23/645 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L25/065 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19103 ,  H02M1/08 ,  H05K1/00 ,  Y10T29/49117 ,  H01L2224/11 ,  H01L2924/014

摘要： A switching power supply in an integrated circuit, an integrated circuit comprising a switching power supply, and a method of assembling a switching power supply in an integrated circuit are disclosed. In one embodiment, the invention provides a three-dimensional switching power supply in an integrated circuit comprising a device layer. The switching power supply comprises three distinct strata arranged in series with the device layer, the three distinct strata including a switching layer including switching circuits, a capacitor layer including banks of capacitors, and an inductor layer including inductors. This switching power supply further comprises a multitude of connectors electrically and mechanically connecting together the device layer, the switching layer, the capacitor layer, and the inductor layer. The switching circuits, the capacitors and the inductors form a switching power supply for supplying power to the device layer.

公开(公告)号：US09425373B2

公开(公告)日：2016-08-23

申请号：US14774207

申请日：2014-03-11

申请人： PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

发明人： Takanori Aketa ,  Yoshiharu Sanagawa ,  Mitsuhiko Ueda ,  Takaaki Yoshihara ,  Shintaro Hayashi ,  Toshihiko Sato

IPC分类号： H01L33/64 ,  H01L33/62 ,  H01L23/00 ,  H01L27/15 ,  H01L33/38 ,  H01L33/40 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60

CPC分类号： H01L33/647 ,  H01L24/32 ,  H01L27/156 ,  H01L33/387 ,  H01L33/40 ,  H01L33/54 ,  H01L33/56 ,  H01L33/60 ,  H01L33/62 ,  H01L33/64 ,  H01L33/641 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2924/00014 ,  H01L2924/00

摘要： A light emitting module includes: a first substrate including a resin having insulation properties, and a copper component embedded in the resin; a second substrate placed above the copper component of the first substrate, and soldered to the copper component; a mounting electrode formed above the second substrate; and an LED placed above the second substrate, and gold-tin soldered to the mounting electrode.

摘要翻译： 发光模块包括：包括具有绝缘性的树脂的第一基板和嵌入树脂中的铜成分; 位于第一基板的铜部件上方的第二基板，并焊接到铜部件上; 形成在所述第二基板上方的安装电极; 以及放置在第二基板上方的LED，并将金锡焊接到安装电极。

公开(公告)号：US20160233190A1

公开(公告)日：2016-08-11

申请号：US15131171

申请日：2016-04-18

申请人： International Business Machines Corporation

发明人： William E. Bernier ,  Bing Dang ,  Mario J. Interrante ,  John U. Knickerbocker ,  Son K. Tran

IPC分类号： H01L23/00 ,  H01L23/367 ,  H01L25/065 ,  H01L23/60 ,  H01L23/552 ,  H01L23/498

CPC分类号： H01L24/81 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/552 ,  H01L23/60 ,  H01L24/09 ,  H01L25/0655 ,  H01L2224/08238 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15738 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/19105 ,  H01L2924/00

摘要： A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

摘要翻译： 插入器夹层结构包括顶部插入器和封装集成电路电子器件的底部插入器，其包括用于将器件附接到底部插入器的装置，以及将顶部插入件连接到底部插入器的互连结构。 除了底部插入器之外，顶部插入器还可以直接连接到芯片载体。 该结构提供了在小型化3D封装中防止静电放电（ESD），电磁干扰（EMI）和电磁导电（EMC））的器件的屏蔽和保护。

公开(公告)号：US09412702B2

公开(公告)日：2016-08-09

申请号：US13830126

申请日：2013-03-14

申请人： Intel Corporation

发明人： Danish Faruqui ,  Edward R. Prack ,  Sergei L. Voronov ,  David K. Wilkinson ,  Tony Dambrauskas ,  Lars D. Skoglund ,  Yoshihiro Tomita ,  Mihir A. Oka ,  Rajen C. Dias

IPC分类号： H01L23/00 ,  H01L23/538 ,  H01L23/544 ,  H01L21/56

CPC分类号： H01L24/83 ,  H01L21/56 ,  H01L21/568 ,  H01L21/76898 ,  H01L23/49816 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29323 ,  H01L2224/29324 ,  H01L2224/29347 ,  H01L2224/29366 ,  H01L2224/29387 ,  H01L2224/29393 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/81132 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83224 ,  H01L2224/92125 ,  H01L2224/92143 ,  H01L2224/9222 ,  H01L2224/94 ,  H01L2225/06541 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10328 ,  H01L2924/10329 ,  H01L2924/10332 ,  H01L2924/10335 ,  H01L2924/10525 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/27 ,  H01L2924/0535 ,  H01L2924/01023 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed to die adhesive films for integrated circuit (IC) packaging, as well as methods for forming and removing die adhesive films and package assemblies and systems incorporating such die adhesive films. A die adhesive film may be transparent to a first wavelength of light and photoreactive to a second wavelength of light. In some embodiments, the die adhesive film may be applied to a back or “inactive” side of a die, and the die surface may be detectable through the die adhesive film. The die adhesive film may be cured and/or marked with laser energy having the second wavelength of light. The die adhesive film may include a thermochromic dye and/or nanoparticles configured to provide laser mark contrast. UV laser energy may be used to remove the die adhesive film in order to expose underlying features such as TSV pads.

摘要翻译： 本公开的实施例涉及用于集成电路（IC）封装的芯片粘合膜，以及用于形成和去除模具粘合剂膜和封装组件的方法以及结合这种模具粘合剂膜的系统。 模具粘合剂膜可以对第一波长的光是透明的，并且对第二波长的光进行光反应。 在一些实施例中，模具粘合剂膜可以施加到模具的背面或“非活性”侧，并且模具表面可以通过模具粘合剂膜检测。 模具粘合剂膜可以用具有第二波长的光的激光能量固化和/或标记。 模具粘合剂膜可以包括被配置为提供激光标记对比度的热变色染料和/或纳米颗粒。 可以使用UV激光能量去除模具粘合剂膜以暴露诸如TSV焊盘之类的底层特征。