公开(公告)号：US20230369279A1

公开(公告)日：2023-11-16

申请号：US18144347

申请日：2023-05-08

申请人： STMicroelectronics S.r.l.

发明人： Thomas GOTTARDI ,  Nicoletta MODARELLI ,  Guendalina CATALANO

IPC分类号： H01L23/00 ,  H01L23/495

CPC分类号： H01L24/40 ,  H01L23/49582 ,  H01L24/32 ,  H01L24/37 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L23/49513 ,  H01L2224/32245 ,  H01L2224/37013 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2924/01029 ,  H01L2924/01047

摘要： A semiconductor die is attached on a die-attachment portion of a planar substrate. A planar electrically conductive clip in mounted onto the semiconductor die. The semiconductor die is sandwiched between the die-attachment portion and the electrically conductive clip. A distal portion of the electrically conductive clip extending away from the semiconductor die is spaced from an electrically conductive lead of the planar substrate by a gap. This gap is filled by a mass of gap-filling material transferred to an upper surface of the electrically conductive lead via Laser Induced Forward Transfer (LIFT) processing. A mass of the gap-filling material is sized and dimensioned to substantially fill the gap.

公开(公告)号：US20180007777A1

公开(公告)日：2018-01-04

申请号：US15332060

申请日：2016-10-24

申请人： Hyundai Motor Company

发明人： Jeong Min Son ,  Sung Won Park

IPC分类号： H05K1/02 ,  H05K3/32 ,  H05K1/05 ,  H05K3/46 ,  H05K1/18

CPC分类号： H05K1/0203 ,  H01L23/29 ,  H01L23/3135 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/06181 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40247 ,  H01L2224/48095 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/8384 ,  H01L2224/8492 ,  H01L2224/8592 ,  H01L2224/92244 ,  H01L2224/92246 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1815 ,  H05K1/05 ,  H05K1/185 ,  H05K3/32 ,  H05K3/46 ,  H05K2201/10931 ,  H05K2201/10977 ,  H01L2924/00012

摘要： A power module is provided. The power module includes a substrate, a power conversion chip that is disposed on the substrate and an insulating film that is formed on a structure in which the power conversion chip is disposed on the substrate. Additionally, the power module includes a metal mold that encases the structure that is coated with the insulating film. Additionally, the power module provides a simplified structure and improved heat dissipation performance compared to conventional power modules.

公开(公告)号：US09704832B1

公开(公告)日：2017-07-11

申请号：US15056818

申请日：2016-02-29

申请人： IXYS Corporation

发明人： Elmar Wisotzki ,  Frank Ettingshausen

IPC分类号： H01L29/167 ,  H01L25/07 ,  H01L23/00 ,  H01L23/498 ,  H01L23/58 ,  H01L23/31 ,  H01L21/78 ,  H01L25/00 ,  H01L29/06

CPC分类号： H01L25/074 ,  H01L21/78 ,  H01L23/3171 ,  H01L23/49838 ,  H01L23/585 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L29/0615 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0834 ,  H01L29/167 ,  H01L29/41716 ,  H01L29/74 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/056 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/13339 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/27334 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/33181 ,  H01L2224/40091 ,  H01L2224/40227 ,  H01L2224/41112 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49112 ,  H01L2224/73203 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/8184 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2224/84447 ,  H01L2224/85447 ,  H01L2224/92 ,  H01L2224/92242 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/1301 ,  H01L2924/19107 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/84 ,  H01L2924/00

摘要： A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.

公开(公告)号：US09653424B2

公开(公告)日：2017-05-16

申请号：US14526518

申请日：2014-10-29

申请人： Alpha & Omega Semiconductor, Incorporated

发明人： Xiaotian Zhang ,  Jun Lu ,  Kai Lu

IPC分类号： H01L23/495 ,  H01L23/00

CPC分类号： H01L24/83 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29015 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32013 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/40499 ,  H01L2224/45144 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48247 ,  H01L2224/49175 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83048 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/84203 ,  H01L2224/84862 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/06 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： This invention discloses a semiconductor package with adhesive material pre-printed on the lead frame and chip, and the manufacturing method. The adhesive material is applied onto the chip carrier and the pin of the lead frame and also on the front electrode of the semiconductor chip via pre-printing. The back of the semiconductor chip is adhered on the chip carrier, and the front electrode of the semiconductor chip and the pin are connected respectively with a metal connector. The size, shape and thickness of the adhesive material are applied according to different application requirements according to size and shapes of the contact zone of the semiconductor chip and the metal connector. Particularly, the adhesive zones are formed by pre-printing the adhesive material thus significantly enhance the quality and performance of semiconductor products, and improves the productivity.

公开(公告)号：US20170117211A1

公开(公告)日：2017-04-27

申请号：US15094022

申请日：2016-04-08

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Chee Hiong CHEW ,  Atapol PRAJUCKAMOL ,  Yushuang YAO

IPC分类号： H01L23/495 ,  H01L29/739 ,  H01L23/00

CPC分类号： H01L24/83 ,  H01L23/49524 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/84 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/27312 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/291 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37012 ,  H01L2224/37111 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/3716 ,  H01L2224/40139 ,  H01L2224/40175 ,  H01L2224/40499 ,  H01L2224/45124 ,  H01L2224/73263 ,  H01L2224/83101 ,  H01L2224/83193 ,  H01L2224/83385 ,  H01L2224/83438 ,  H01L2224/83447 ,  H01L2224/8384 ,  H01L2224/84385 ,  H01L2224/84438 ,  H01L2224/84447 ,  H01L2224/8484 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/0103 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2924/01014

摘要： A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.

公开(公告)号：US20170047315A1

公开(公告)日：2017-02-16

申请号：US15338018

申请日：2016-10-28

申请人： Infineon Technologies Austria AG

发明人： Ralf Otremba ,  Josef Hoeglauer ,  Xaver Schloegel ,  Chooi Mei Chong

IPC分类号： H01L25/00 ,  H01L23/00 ,  H01L23/495 ,  H01L25/18 ,  H01L23/31

CPC分类号： H01L25/50 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/18 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/8321 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1431 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

摘要： A method of manufacturing a semiconductor device includes mounting a first semiconductor power chip on a first carrier, mounting a second semiconductor power chip on a second carrier, bonding a contact clip to the first semiconductor power chip and to the second semiconductor power chip, and mounting a third semiconductor chip over the contact clip.

摘要翻译： 一种制造半导体器件的方法包括将第一半导体功率芯片安装在第一载体上，将第二半导体功率芯片安装在第二载体上，将接触夹接合到第一半导体功率芯片和第二半导体功率芯片，以及安装 接触夹子上的第三半导体芯片。

公开(公告)号：US20170042053A1

公开(公告)日：2017-02-09

申请号：US15200890

申请日：2016-07-01

申请人： FUJI ELECTRIC CO., LTD.

发明人： Shin SOYANO

IPC分类号： H05K7/02 ,  H05K1/02 ,  H05K5/00 ,  H05K1/18 ,  H05K1/14

CPC分类号： H05K7/026 ,  H01L23/3142 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/07 ,  H01L2224/291 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/3701 ,  H01L2224/37011 ,  H01L2224/37599 ,  H01L2224/401 ,  H01L2224/40137 ,  H01L2224/40155 ,  H01L2224/40499 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/9221 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15159 ,  H01L2924/15162 ,  H05K1/0263 ,  H05K1/0298 ,  H05K1/142 ,  H05K1/181 ,  H05K5/0004 ,  H05K5/0069 ,  H05K2201/049 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2201/10363 ,  H05K2201/10522 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/37099

摘要： In a semiconductor device, a multilayer substrate includes an insulating substrate, a first circuit board having a first semiconductor chip disposed thereon, and a second circuit board having a second semiconductor chip disposed thereon. On the multilayer substrate of the semiconductor device, a plate portion of a resin plate including a first positioning portion that regulates the position of each semiconductor chip is sandwiched between a first jumper terminal, which includes a first terminal connected to the first semiconductor chip and a first plate member perpendicular to the first terminal, and a second jumper terminal, which includes a second terminal connected to the second semiconductor chip and a second plate member perpendicular to the second terminal.

摘要翻译： 在半导体器件中，多层基板包括绝缘基板，具有设置在其上的第一半导体芯片的第一电路板和设置在其上的第二半导体芯片的第二电路板。 在半导体装置的多层基板上，包括调整各半导体芯片的位置的第一定位部的树脂板的板部夹在包括与第一半导体芯片连接的第一端子的第一跨接端子和 垂直于第一端子的第一板构件和第二跨接端子，其包括连接到第二半导体芯片的第二端子和垂直于第二端子的第二板构件。

公开(公告)号：US20160372439A1

公开(公告)日：2016-12-22

申请号：US15252866

申请日：2016-08-31

申请人： Infineon Technologies Austria AG

发明人： Ralf Otremba ,  Klaus Schiess ,  Oliver Häberlen

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L23/495

CPC分类号： H01L24/40 ,  H01L21/4825 ,  H01L21/50 ,  H01L23/48 ,  H01L23/49513 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49575 ,  H01L24/36 ,  H01L24/41 ,  H01L24/84 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/41051 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/92246 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/37099

摘要： A method of manufacturing an electronic component includes applying solder paste to at least one electrically conductive portion of a package, applying a high-voltage depletion-mode transistor onto the solder paste, applying a low-voltage enhancement-mode transistor onto the solder paste, applying solder paste onto the high-voltage depletion-mode transistor, applying solder paste onto the low-voltage enhancement-mode transistor, applying an electrically conductive member onto the solder paste on the high-voltage depletion-mode transistor and onto the solder paste on the low-voltage enhancement-mode transistor to form an assembly, and heat treating the assembly to produce an electrical connection between the high-voltage depletion-mode transistor and the low-voltage enhancement-mode transistor via the electrically conductive member.

摘要翻译： 一种制造电子部件的方法包括将焊膏施加到封装的至少一个导电部分，将高电压耗尽型晶体管施加到焊膏上，将低电压增强型晶体管施加到焊膏上， 将焊膏施加到高电压耗尽型晶体管上，将焊膏施加到低电压增强型晶体管上，将导电构件施加到高电压耗尽型晶体管上的焊膏上， 所述低电压增强型晶体管形成组件，以及对所述组件进行热处理，以经由所述导电构件在所述高电压耗尽型晶体管和所述低电压增强型晶体管之间产生电连接。

公开(公告)号：US20160365305A1

公开(公告)日：2016-12-15

申请号：US14735229

申请日：2015-06-10

申请人： Vishay General Semiconductor LLC

发明人： Hui-Ying Ding ,  Pengnian Wang ,  Tao Yu ,  Jun-Feng Liu ,  Jun-Kai Bai ,  Chih-Ping Peng

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L21/52 ,  H01L23/31

CPC分类号： H01L23/49575 ,  H01L21/52 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L2021/6027 ,  H01L2021/60277 ,  H01L2224/04026 ,  H01L2224/05644 ,  H01L2224/291 ,  H01L2224/32145 ,  H01L2224/33 ,  H01L2224/33181 ,  H01L2224/37012 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/37166 ,  H01L2224/40105 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83466 ,  H01L2224/83815 ,  H01L2224/84345 ,  H01L2224/84385 ,  H01L2224/92246 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

摘要： A semiconductor assembly includes a semiconductor die comprising lower and upper electrical contacts. A lead frame having a lower die pad is electrically and mechanically connected to the lower electrical contact of the die. An upper conductive member has a first portion electrically and mechanically connected to the upper electrical contact of the die. A lead terminal has a surface portion electrically and mechanically connected to a second portion of the conductive member. The surface portion of the lead terminal and/or the second portion of the conductive member has a series of grooves disposed therein. Packaging material encapsulates the semiconductor die, at least a portion of the lead frame, at least a portion of the upper conducive member and at least a portion of the lead terminal.

摘要翻译： 半导体组件包括包括下电极和上电触头的半导体管芯。 具有下管芯焊盘的引线框架电连接和机械连接到管芯的下电触头。 上导电构件具有电和机械地连接到管芯的上电接触件的第一部分。 引线端子具有电气和机械连接到导电构件的第二部分的表面部分。 引线端子的表面部分和/或导电部件的第二部分具有设置在其中的一系列凹槽。 包装材料封装半导体管芯，引线框架的至少一部分，上部导电构件的至少一部分和引线端子的至少一部分。

公开(公告)号：US09437587B2

公开(公告)日：2016-09-06

申请号：US14158830

申请日：2014-01-19

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Xiaotian Zhang ,  Hamza Yilmaz ,  Jun Lu ,  Xiaoguang Zeng ,  Ming-Chen Lu

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L21/78 ,  H01L25/16 ,  H01L23/495 ,  H01L25/07

CPC分类号： H01L25/50 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L25/072 ,  H01L25/165 ,  H01L2224/0401 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/06135 ,  H01L2224/16245 ,  H01L2224/29139 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/4103 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48195 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73221 ,  H01L2224/73253 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83805 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92157 ,  H01L2224/92225 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599

摘要： A semiconductor device package comprises a lead frame having a die paddle comprising a first chip installation area and a second chip installation area, a recess area formed in the first chip installation area, and multiple metal pillars formed in the recess area, a notch divides the first chip installation area into a transverse base extending transversely and a longitudinal base extending longitudinally, and separates the recess area into a transverse recess part formed in the transverse base and a longitudinal recess part formed in longitudinal base; a portion of a transverse extending part connecting to an external pin extends into a portion inside of the notch.

摘要翻译： 一种半导体器件封装，包括具有包括第一芯片安装区域和第二芯片安装区域的模板的引线框架，形成在第一芯片安装区域中的凹部区域和形成在凹部区域中的多个金属柱，凹口将 第一芯片安装区域横向延伸的横向基部和纵向延伸的纵向基部，并且将凹部区域分离成形成在横向基部中的横向凹部和形成在纵向基部中的纵向凹部; 连接到外部销的横向延伸部分的一部分延伸到凹口内部的一部分。