公开(公告)号：US20240128167A1

公开(公告)日：2024-04-18

申请号：US18486232

申请日：2023-10-13

申请人： Littelfuse Semiconductor (Wuxi) Co., Ltd.

发明人： Glenda Zhang ,  Lei She ,  Chao Gao

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/62

CPC分类号： H01L23/49541 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49531 ,  H01L23/49575 ,  H01L23/62 ,  H01L24/37 ,  H01L24/84 ,  H01L2224/37118 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37147 ,  H01L2224/84

摘要： A multiple-channel protection device and associated methods thereof. The device includes a first lead having a first chip attachment portion and a second chip attachment portion, a second lead having a third chip attachment portion, and a third lead having a fourth chip attachment portion. A first semiconductor chip is configured to be conductively coupled to the first chip attachment portion and the third chip attachment portion. A second semiconductor chip is configured to be conductively coupled to the second chip attachment portion and the fourth chip attachment portion.

公开(公告)号：US20230154883A1

公开(公告)日：2023-05-18

申请号：US17990230

申请日：2022-11-18

申请人： NEXPERIA B.V.

发明人： Ricardo Yandoc ,  Adam Brown ,  Haibo Fan

IPC分类号： H01L23/00

CPC分类号： H01L24/40 ,  H01L24/37 ,  H01L24/05 ,  H01L24/84 ,  H01L2224/04034 ,  H01L2224/40225 ,  H01L2224/37005 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2224/84

摘要： A semiconductor package including a semiconductor die having multiple bond pads is provided. The package further includes an electrically conducting clip including, at a first side thereof, at least one pin for mounting the package to an external board and includes, at a second side opposite to the first side, a connecting portion connecting the clip to at least two bond pads of the multiple bond pads. The connection portion includes at least two elongated connecting strips spaced apart from each other at a distance in such a manner that each strip extends over at least one of the at least two bond pads and is connected thereto.

公开(公告)号：US09978711B2

公开(公告)日：2018-05-22

申请号：US15378993

申请日：2016-12-14

申请人： Infineon Technologies AG

发明人： Gopalakrishnan Trichy Rengarajan ,  Christian Stahlhut

IPC分类号： H01L23/00 ,  H01L21/48

CPC分类号： H01L24/83 ,  H01L21/4825 ,  H01L21/4853 ,  H01L23/3735 ,  H01L23/488 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/05624 ,  H01L2224/06131 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2747 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29163 ,  H01L2224/29169 ,  H01L2224/29173 ,  H01L2224/29176 ,  H01L2224/29178 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/40137 ,  H01L2224/40177 ,  H01L2224/40195 ,  H01L2224/40245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48177 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48472 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/75301 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83469 ,  H01L2224/83473 ,  H01L2224/83476 ,  H01L2224/83478 ,  H01L2224/83895 ,  H01L2224/85181 ,  H01L2224/92246 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/27 ,  H01L2924/01076 ,  H01L2224/45099 ,  H01L2224/37099 ,  H01L2224/84 ,  H01L2224/32225 ,  H01L2224/48247

摘要： A semiconductor chip includes a semiconductor body having a lower side with a lower chip metallization applied thereto. A first contact metallization layer is produced on the lower chip metallization. A second contact metallization layer is produced on a metal surface of a substrate. The semiconductor chip and the substrate are pressed onto one another for a pressing time so that the first and second contact metallization layers bear directly and extensively on one another. During the pressing time, the first contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the first contact metallization layer. The second contact metallization layer is kept continuously at temperatures which are lower than the melting temperature of the second contact metallization layer during the pressing time. After the pressing together, the first and second contact metallization layers have a total thickness less than 1000 nm.

公开(公告)号：US20180108600A1

公开(公告)日：2018-04-19

申请号：US15520553

申请日：2016-03-11

申请人： SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.

发明人： Yoshihiro KAMIYAMA

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L23/49568 ,  H01L21/4825 ,  H01L21/4842 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49531 ,  H01L23/49541 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49589 ,  H01L24/06 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/49111 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/37099 ,  H01L2224/84 ,  H01L2924/00

摘要： A semiconductor device of the present invention includes: a plurality of wiring boards disposed separately from one another; a plurality of semiconductor elements disposed on first main surfaces of the wiring boards and electrically connected to the wiring boards; a plurality of terminals electrically connected to the wiring boards; a sealing resin sealing the wiring boards and the semiconductor elements so that second main surfaces of the wiring boards are exposed.

公开(公告)号：US09837380B2

公开(公告)日：2017-12-05

申请号：US14165720

申请日：2014-01-28

申请人： Infineon Technologies Austria AG

发明人： Tian San Tan ,  Theng Chao Long

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01R4/00 ,  H01L25/07 ,  H01L23/433 ,  H01L23/495

CPC分类号： H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/48 ,  H01L24/70 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/89 ,  H01L24/97 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/05554 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37026 ,  H01L2224/3719 ,  H01L2224/40227 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83143 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/84143 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/84825 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/84855 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/14252 ,  H01L2924/14253 ,  H01L2924/181 ,  H01R4/00 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/83 ,  H01L2224/84

摘要： A semiconductor device includes a device carrier, a first semiconductor chip mounted on the device carrier and a second semiconductor chip mounted on the device carrier. Further, the semiconductor device includes a first contact clip bonded to a first electrode of the first semiconductor chip, a second contact clip bonded to a first electrode of the second semiconductor chip and an insulating connector configured to hold the first contact clip and the second contact clip together.

公开(公告)号：US20170325329A1

公开(公告)日：2017-11-09

申请号：US15658165

申请日：2017-07-24

申请人： STMICROELECTRONICS S.R.L.

发明人： Federico Giovanni Ziglioli

IPC分类号： H05K1/02 ,  H05K7/02 ,  H01L23/552 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L21/56

CPC分类号： H05K1/0237 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/552 ,  H01L24/06 ,  H01L24/32 ,  H01L24/37 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/06135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37624 ,  H01L2224/37647 ,  H01L2224/45014 ,  H01L2224/45032 ,  H01L2224/45099 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48464 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2924/00 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01034 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19107 ,  H05K7/02 ,  H01L2224/84 ,  H01L2924/206

摘要： A packaged device has a die of semiconductor material bonded to a support. An electromagnetic shielding structure surrounds the die and is formed by a grid structure of conductive material extending into the support and an electromagnetic shield, coupled together. A packaging mass embeds both the die and the electromagnetic shield. The electromagnetic shield is formed by a plurality of metal ribbon sections overlying the die and embedded in the packaging mass. Each metal ribbon section has a thickness-to-width ratio between approximately 1:2 and approximately 1:50.

公开(公告)号：US09633967B2

公开(公告)日：2017-04-25

申请号：US14910355

申请日：2014-10-06

申请人： NSK Ltd.

发明人： Takashi Sunaga ,  Noboru Kaneko ,  Osamu Miyoshi ,  Ryoichi Suzuki

IPC分类号： H01L29/66 ,  H01L27/08 ,  H01L23/00 ,  H01L25/07 ,  H01L25/18 ,  H01L23/373 ,  H01L23/498 ,  H01L23/492 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L24/41 ,  H01L23/3735 ,  H01L23/492 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L25/07 ,  H01L25/072 ,  H01L25/18 ,  H01L29/7393 ,  H01L29/78 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/2732 ,  H01L2224/29101 ,  H01L2224/32227 ,  H01L2224/32238 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/35847 ,  H01L2224/3701 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37611 ,  H01L2224/4001 ,  H01L2224/40095 ,  H01L2224/40227 ,  H01L2224/40475 ,  H01L2224/40499 ,  H01L2224/4099 ,  H01L2224/4112 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/8321 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/84138 ,  H01L2224/8421 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/9221 ,  H01L2924/00015 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/19105 ,  H01L2924/35121 ,  H01L2924/365 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/291 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/48 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/01029 ,  H01L2924/013 ,  H01L2924/00013

摘要： To provide a semiconductor module that has high reliability of electric connection by a solder and is inexpensive. A joint surface of an electrode jointing portion that is opposed to a surface to be jointed of a gate electrode of a bare-chip FET and a joint surface of a substrate jointing portion that is opposed to a surface to be jointed of another wiring pattern include an outgas releasing mechanism that makes outgas generated from a molten solder during solder jointing of a metal plate connector be released from solders interposed between the joint surfaces and the surfaces to be jointed.

公开(公告)号：US20170053871A1

公开(公告)日：2017-02-23

申请号：US15205596

申请日：2016-07-08

申请人： FUJI ELECTRIC CO., LTD.

发明人： Tsunehiro NAKAJIMA ,  Yoshikazu TAKAHASHI ,  Norihiro NASHIDA

IPC分类号： H01L23/528 ,  H01L23/532 ,  H01L21/321 ,  H01L25/00 ,  H01L21/283 ,  H01L23/492 ,  H01L25/065

CPC分类号： H01L21/32115 ,  H01L21/02002 ,  H01L21/283 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3735 ,  H01L23/482 ,  H01L23/492 ,  H01L23/49811 ,  H01L24/24 ,  H01L24/34 ,  H01L24/37 ,  H01L25/0652 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/24137 ,  H01L2224/371 ,  H01L2224/37166 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2224/84

摘要： Provided are a semiconductor device manufacturing method and semiconductor device such that manufacturing can be simplified and the thickness of the semiconductor device can be reduced. The semiconductor device includes an insulated circuit substrate having on one main surface thereof a first metal layer and a second metal layer, a metal plate conductively connected to the first metal layer, a first semiconductor element including on front and rear surfaces thereof a plurality of metal electrodes, a first insulating member disposed on a side surface of the first semiconductor element, a second insulating member disposed on the first insulating member and on the first semiconductor element, and a third metal layer, in which at least one portion thereof is disposed on the second insulating member and which conductively connects the metal electrode of the first semiconductor element and the second metal layer on the insulated circuit substrate.

摘要翻译： 提供一种半导体器件制造方法和半导体器件，使得可以简化制造并且可以减小半导体器件的厚度。 半导体器件包括绝缘电路基板，其一个主表面上具有第一金属层和第二金属层，导电连接到第一金属层的金属板，在其前表面和后表面上包括多个金属的第一半导体元件 电极，设置在第一半导体元件的侧表面上的第一绝缘构件，设置在第一绝缘构件上和第一半导体元件上的第二绝缘构件，以及第三金属层，其中至少一部分设置在第一绝缘构件上 所述第二绝缘构件将所述第一半导体元件的金属电极与所述绝缘电路基板上的所述第二金属层导电连接。

公开(公告)号：US09543260B2

公开(公告)日：2017-01-10

申请号：US13958276

申请日：2013-08-02

申请人： Infineon Technologies AG

发明人： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum

IPC分类号： H01L23/538 ,  H01L23/00

CPC分类号： H01L24/06 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/70 ,  H01L24/73 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05578 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06133 ,  H01L2224/06153 ,  H01L2224/09133 ,  H01L2224/09153 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45176 ,  H01L2224/45181 ,  H01L2224/45184 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48153 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73221 ,  H01L2224/73271 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/053 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12031 ,  H01L2924/12032 ,  H01L2924/1205 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/37099 ,  H01L2224/84

摘要： In accordance with an embodiment of the present invention, a semiconductor device includes a first bond pad disposed at a first side of a substrate. The first bond pad includes a first plurality of pad segments. At least one pad segment of the first plurality of pad segments is electrically isolated from the remaining pad segments of the first plurality of pad segments.

摘要翻译： 根据本发明的实施例，半导体器件包括设置在衬底的第一侧的第一接合焊盘。 第一接合焊盘包括第一多个焊盘段。 第一多个焊盘段的至少一个焊盘段与第一多个焊盘段的其余焊盘段电隔离。

公开(公告)号：US20160365295A1

公开(公告)日：2016-12-15

申请号：US15149207

申请日：2016-05-09

申请人： Infineon Technologies AG

发明人： Juergen HOEGERL ,  Edward FUERGUT

IPC分类号： H01L23/31 ,  H01L23/04 ,  H01L23/10 ,  H01L21/56 ,  H01L23/492

CPC分类号： H01L23/31 ,  H01L21/561 ,  H01L21/566 ,  H01L21/568 ,  H01L23/04 ,  H01L23/10 ,  H01L23/142 ,  H01L23/295 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/492 ,  H01L23/4924 ,  H01L23/4928 ,  H01L23/49562 ,  H01L23/49877 ,  H01L23/5386 ,  H01L23/544 ,  H01L24/06 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/48 ,  H01L24/50 ,  H01L24/66 ,  H01L24/69 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/86 ,  H01L24/89 ,  H01L24/92 ,  H01L24/97 ,  H01L29/7393 ,  H01L29/868 ,  H01L2223/54486 ,  H01L2224/04026 ,  H01L2224/06181 ,  H01L2224/24137 ,  H01L2224/2732 ,  H01L2224/291 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29318 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/29499 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/40137 ,  H01L2224/48137 ,  H01L2224/73201 ,  H01L2224/73213 ,  H01L2224/73215 ,  H01L2224/73217 ,  H01L2224/73219 ,  H01L2224/73251 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/92142 ,  H01L2224/92144 ,  H01L2224/92147 ,  H01L2224/92148 ,  H01L2224/92242 ,  H01L2224/92244 ,  H01L2224/92248 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10155 ,  H01L2924/1016 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/1032 ,  H01L2924/10329 ,  H01L2924/10331 ,  H01L2924/10332 ,  H01L2924/10335 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15162 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/0103 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/85 ,  H01L2224/32 ,  H01L2224/69 ,  H01L2224/89 ,  H01L2224/82 ,  H01L2224/86 ,  H01L2224/45099

摘要： A semiconductor arrangement is provided. The semiconductor arrangement may include an electrically conductive plate having a surface, a plurality of power semiconductor devices arranged on the surface of the electrically conductive plate, wherein a first controlled terminal of each power semiconductor device of the plurality of power semiconductor devices may be electrically coupled to the electrically conductive plate, a plurality of electrically conductive blocks, wherein each electrically conductive block may be electrically coupled with a respective second controlled terminal of each power semiconductor device of the plurality of power semiconductor devices; and encapsulation material encapsulating the plurality of power semiconductor devices, wherein at least one edge region of the surface of the electrically conductive plate may be free from the encapsulation material.

摘要翻译： 提供了半导体布置。 半导体布置可以包括具有表面的导电板，布置在导电板的表面上的多个功率半导体器件，其中多个功率半导体器件中的每个功率半导体器件的第一受控端可以电耦合 导电板，多个导电块，其中每个导电块可以与多个功率半导体器件中的每个功率半导体器件的相应的第二受控端电耦合; 以及封装所述多个功率半导体器件的封装材料，其中所述导电板的表面的至少一个边缘区域可以不含所述封装材料。