公开(公告)号：US20240332271A1

公开(公告)日：2024-10-03

申请号：US18742606

申请日：2024-06-13

申请人： ROHM CO., LTD.

发明人： Hiroto SAKAI ,  Yuta OKAWAUCHI ,  Tetsuo TATEISHI

IPC分类号： H01L25/16 ,  H01L23/00 ,  H01L23/049 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/07

CPC分类号： H01L25/16 ,  H01L23/049 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3735 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/48225 ,  H01L2924/10272 ,  H01L2924/1207 ,  H01L2924/13091 ,  H01L2924/30101 ,  H01L2924/30107

摘要： A semiconductor device includes two semiconductor elements with a respective switching operation being controlled depending on a first driving signal input to a third electrode. A first conductor and a second conductor are electrically interposed between the third electrodes of the two semiconductor elements. The first conductor is electrically connected to a signal terminal. The electrical connection between the third electrodes of the two semiconductor elements includes a first conduction path through the first conductor and a second conduction path through the second conductor. An inductance value of the second conduction path is smaller than an inductance value of the first conduction path. A resistance value of the second conduction path is larger than a resistance value of the first conduction path.

公开(公告)号：US20240321801A1

公开(公告)日：2024-09-26

申请号：US18614053

申请日：2024-03-22

申请人： BEIJING YOUZHUJU NETWORK TECHNOLOGY CO., LTD.

发明人： Haiying CHEN ,  Lin LIU ,  Meng MEI ,  Jifeng LI ,  Jian WANG

IPC分类号： H01L23/00

CPC分类号： H01L24/16 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/117 ,  H01L2224/1183 ,  H01L2224/13022 ,  H01L2224/1414 ,  H01L2224/16055 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/30107

摘要： Embodiments of the present disclosure provides a chip and a method of forming the same and a package structure, the chip includes a base substrate and conductive bumps located on the base substrate, a planar shape of each bump has a long axis and a short axis extending through a center of the bump, a length of the long axis is greater than that of the short axis, the conductive bumps include bump unit rows each of which includes initial bump units arranged along a first direction and a first expanded bump unit located between adjacent initial bump units; the bump unit rows are arranged in a second direction, with a second expanded bump unit disposed between adjacent bump unit rows, the conductive bumps include a first pattern, a second pattern and an additional pattern formed by corresponding bumps, and each having bumps with different rotation angles.

公开(公告)号：US20240274513A1

公开(公告)日：2024-08-15

申请号：US18645947

申请日：2024-04-25

申请人： Rohm Co., Ltd.

发明人： Koshun SAITO ,  Hiroyuki SAKAIRI ,  Yasufumi MATSUOKA ,  Kenichi YOSHIMOCHI

IPC分类号： H01L23/495 ,  H01L23/00

CPC分类号： H01L23/49575 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49562 ,  H01L24/48 ,  H01L2224/48245 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/1067 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/30101 ,  H01L2924/30107

摘要： A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

公开(公告)号：US12062618B2

公开(公告)日：2024-08-13

申请号：US18524118

申请日：2023-11-30

申请人： Ping-Jung Yang

发明人： Ping-Jung Yang

IPC分类号： H01L23/538 ,  H01L23/15 ,  H01L23/498 ,  H10K77/10 ,  H01L23/00 ,  H01L25/16

CPC分类号： H01L23/5384 ,  H01L23/15 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H10K77/10 ,  C09K2323/00 ,  C09K2323/03 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/16 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/13005 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  Y02E10/549 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/1308 ,  H01L2924/00014 ,  H01L2224/05124 ,  H01L2924/00014 ,  H01L2224/05147 ,  H01L2924/00014 ,  H01L2224/2919 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/15311 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/15311 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2224/48465 ,  H01L2224/48091 ,  H01L2924/00012 ,  H01L2224/48465 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2224/13109 ,  H01L2924/014 ,  H01L2224/13111 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2224/13005 ,  H01L2924/206 ,  H01L2224/13005 ,  H01L2924/207 ,  H01L2224/03462 ,  H01L2924/00014 ,  H01L2224/1146 ,  H01L2924/00014 ,  H01L2224/11334 ,  H01L2924/00014 ,  H01L2224/11462 ,  H01L2924/00014 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/45144 ,  H01L2924/01029 ,  H01L2224/45139 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2224/48465 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/48465 ,  H01L2224/48091 ,  H01L2924/00 ,  H01L2924/15311 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2224/45124 ,  H01L2924/00014

摘要： A display device comprises a display panel substrate and a glass substrate over said display panel substrate, wherein said display panel substrate comprises multiple contact pads, a display area, a first boundary, a second boundary, a third boundary and a fourth boundary, wherein said display area comprises a first edge, a second edge, a third edge and a fourth edge, wherein said first boundary is parallel to said third boundary and said first and third edges, wherein said second boundary is parallel to said fourth boundary and said second and fourth edges, wherein a first least distance between said first boundary and said first edge, wherein a second least distance between said second boundary and said second edge, a third least distance between said third boundary and said third edge, a fourth distance between said fourth boundary and said fourth edge, and wherein said first, second, third and fourth least distances are smaller than 100 micrometers, and wherein said glass substrate comprising multiple metal conductors through in said glass substrate and multiple metal bumps are between said glass substrate and said display panel substrate, wherein said one of said metal conductors is connected to one of said contact pads through one of said metal bumps.

公开(公告)号：US20240266315A1

公开(公告)日：2024-08-08

申请号：US18500993

申请日：2023-11-02

申请人： Mitsubishi Electric Corporation

发明人： Kazuya OKADA

IPC分类号： H01L23/00 ,  H01L25/07

CPC分类号： H01L24/48 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48139 ,  H01L2924/13091 ,  H01L2924/30107

摘要： An object is to provide a technique capable of reducing variations in gate-source voltage among a plurality of semiconductor elements. The semiconductor device includes the plurality of semiconductor elements, a metal electrode, and a control wire. Each of the plurality of semiconductor elements has a control electrode configured to control a main current. The main current of the plurality of semiconductor element flows through the metal electrode. The control wire connects each of the control electrodes of the plurality of semiconductor elements in series, and interlinks with a magnetic field generated when the main current flows through the metal electrode.

公开(公告)号：US12027465B2

公开(公告)日：2024-07-02

申请号：US17952838

申请日：2022-09-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Christopher Wyland

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L23/522 ,  H01L23/66 ,  H01P1/04 ,  H05K1/02

CPC分类号： H01L23/5383 ,  H01L23/5226 ,  H01L23/5387 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/50 ,  H01L24/86 ,  H01L24/91 ,  H01P1/047 ,  H05K1/0243 ,  H01L24/45 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4805 ,  H01L2224/48091 ,  H01L2224/48135 ,  H01L2224/48472 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49052 ,  H01L2224/49111 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1903 ,  H01L2924/19032 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/3025 ,  H05K2203/049 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2224/45144 ,  H01L2924/00014 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/20755 ,  H01L2224/45015 ,  H01L2924/20754 ,  H01L2224/45015 ,  H01L2924/20753 ,  H01L2224/45015 ,  H01L2924/20752 ,  H01L2224/45015 ,  H01L2924/20751 ,  H01L2224/49111 ,  H01L2224/48472 ,  H01L2924/00 ,  H01L2224/48472 ,  H01L2224/48091 ,  H01L2924/00 ,  H01L2924/01015 ,  H01L2924/00 ,  H01L2924/30111 ,  H01L2924/00 ,  H01L2224/85207 ,  H01L2924/00 ,  H01L2224/49175 ,  H01L2224/48472 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/45014 ,  H01L2924/206

摘要： A method of improving electrical interconnections between two electrical elements is made available by providing a meta-material overlay in conjunction with the electrical interconnection. The meta-material overlay is designed to make the electrical signal propagating via the electrical interconnection to act as though the permittivity and permeability of the dielectric medium within which the electrical interconnection is formed are different than the real component permittivity and permeability of the dielectric medium surrounding the electrical interconnection. In some instances the permittivity and permeability resulting from the meta-material cause the signal to propagate as if the permittivity and permeability have negative values. Accordingly the method provides for electrical interconnections possessing enhanced control and stability of impedance, reduced noise, and reduced loss. Alternative embodiments of the meta-material overlay provide, the enhancements for conventional discrete wire bonds whilst also facilitating single integrated designs compatible with tape implementation.

公开(公告)号：US20240145424A1

公开(公告)日：2024-05-02

申请号：US18355111

申请日：2023-07-19

申请人： Western Digital Technologies, Inc.

发明人： John Contreras ,  Nagesh Vodrahalli ,  Md. Sayed Mobin

IPC分类号： H01L23/00 ,  G11C11/56 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L24/48 ,  G11C11/5628 ,  H01L23/49816 ,  H01L24/08 ,  H01L25/0657 ,  G11C2211/5641 ,  H01L2224/08225 ,  H01L2224/48132 ,  H01L2224/48157 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/30107

摘要： A storage device includes a substrate of a memory package that includes a first pin pad, a controller mounted on the substrate and electrically connected to the first pin pad, the controller being configured to manage data communications on a data channel, and a first memory die. The first memory die includes a front pin pad electrically connected to the first pin pad of the substrate by way of a first bond wire, a rear pin pad, a conductor segment electrically connecting the front pin pad and the rear pin pad of the first memory die, and a plurality of memory cells configured to provide non-volatile storage accessible by way of the data channel.

公开(公告)号：US20240120308A1

公开(公告)日：2024-04-11

申请号：US17960871

申请日：2022-10-06

申请人： Texas Instruments Incorporated

发明人： Kwang-Soo Kim ,  Makoto Shibuya ,  Woochan Kim ,  Vivek Arora

IPC分类号： H01L23/00 ,  H01L25/16

CPC分类号： H01L24/40 ,  H01L24/41 ,  H01L24/48 ,  H01L24/73 ,  H01L24/84 ,  H01L25/16 ,  H01L2224/4001 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/4103 ,  H01L2224/41052 ,  H01L2224/41175 ,  H01L2224/48157 ,  H01L2224/73221 ,  H01L2224/84815 ,  H01L2924/1033 ,  H01L2924/1426 ,  H01L2924/19041 ,  H01L2924/30107

摘要： An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.

公开(公告)号：US20240006273A1

公开(公告)日：2024-01-04

申请号：US17854526

申请日：2022-06-30

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Kumar Anurag SHRIVASTAVA ,  Arushi AGRAWAL

IPC分类号： H01L23/495 ,  H01L21/48 ,  H01L23/00

CPC分类号： H01L23/49541 ,  H01L23/49575 ,  H01L21/4821 ,  H01L24/48 ,  H01L2224/48245 ,  H01L2924/1431 ,  H01L2924/30107

摘要： An example packaged IC includes a lead frame having a supply pin and a ground pin. The supply pin includes first and second supply leads extending from a proximal portion of the supply pin. The ground pin includes first and second ground leads extending from a proximal portion of the ground pin. A first IC network has a first supply terminal coupled to the first supply lead via a first conductor (e.g., bond wire or bump bond). The first IC network also has a first ground terminal coupled to the first ground lead via a second conductor. A second IC network has a second supply terminal coupled to the second supply lead via a third conductor. The second IC network also has a second ground terminal coupled to the second ground lead via a fourth conductor.

公开(公告)号：US20230402416A1

公开(公告)日：2023-12-14

申请号：US17839469

申请日：2022-06-13

申请人： Airoha Technology (HK) Limited

发明人： Huan-Sheng Chen ,  Ming-Yin Ko ,  Chun-Wei Chen

IPC分类号： H01L23/00 ,  H01F17/00

CPC分类号： H01L24/09 ,  H01L24/48 ,  H01F17/0006 ,  H01L2924/30107 ,  H01L2224/0901 ,  H01L2224/0912 ,  H01L2924/19042 ,  H01L2224/48227 ,  H01L2924/30105 ,  H01F2017/0086

摘要： A semiconductor die includes a processing circuit, a first bond pad, and a second bond pad. The first bond pad is electrically connected to a first node of the processing circuit and a first bond wire. The second bond pad is electrically connected to a second node of the processing circuit and a second bond wire. The first bond wire and the second bond wire are magnetically coupled to form a first bond wire T-coil circuit with equivalent negative inductance.