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公开(公告)号：US20240305284A1
公开(公告)日：2024-09-12
申请号：US18597096
申请日：2024-03-06
发明人： Junyan GUO , Mingming ZHANG , An ZHAO , Junmou ZHANG , Chuang ZHANG , Shan LU , Jian WANG
CPC分类号： H03K5/084 , H03K5/133 , H03K5/15033
摘要： Embodiments of the present disclosure provide an apparatus and a method for generating a circuit clock signal. The apparatus comprises: a clock buffer configured to buffer an original clock signal to obtain a buffered clock signal; a clock delay unit configured to delay the original clock signal to obtain a plurality of delayed clock signals, the plurality of delayed clock signals being respectively delayed by different amounts of time relative to the original clock signal; a broadened clock generator configured to generate a broadened clock signal based on the original clock signal and the plurality of delayed clock signals, the frequency of the broadened clock signal being lower than that of the original clock signal; and a clock selector configured to select one of the buffered clock signal and the broadened clock signal as the circuit clock signal based on a selection signal.
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2.发明公开公开(公告)号：US20240106793A1
公开(公告)日：2024-03-28
申请号：US18474084
申请日：2023-09-25
发明人： Jie SU , Kaiyu ZHENG , Xue LIU , Jieke WU , Jian WANG
IPC分类号： H04L61/3015 , H04L41/0816 , H04L47/2408 , H04L61/4511
CPC分类号： H04L61/3025 , H04L41/0816 , H04L47/2408 , H04L61/4511
摘要： A traffic scheduling method, apparatus and system, a terminal device and a readable storage medium are provided. The method includes: acquiring scheduling configuration information, where the scheduling configuration information indicates a traffic scheduling strategy for a target domain name; modifying the target domain name into a standardized domain name matching the traffic scheduling strategy, in a preset domain naming manner; the standardized domain name at least includes a computer room identifier used to indicate the target computer room after traffic scheduling; and initiating an access request to the target computer room, based on the standardized domain name.
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3.发明公开公开(公告)号：US20240354368A1
公开(公告)日：2024-10-24
申请号：US18643872
申请日：2024-04-23
发明人： Longfei BAI , Qi CHEN , Zhitao YANG , Zhilin XU , Yimin CHEN , Shan LU , Jian WANG
IPC分类号： G06F17/16
CPC分类号： G06F17/16
摘要： A method and a system for performing a matrix multiplication operator using a unit supporting convolution operator operation, an electronic device, and a non-transitory storage medium are provided. The method includes: transforming a first matrix of the matrix multiplication operator to an input data matrix of a convolution operator; transforming a second matrix of the matrix multiplication operator to a weight matrix of the convolution operator, matrix multiplication being performed on the first matrix and the second matrix; and performing a convolution operation on the input data matrix and the weight matrix, which are obtained through transforming, of the convolution operator using the unit supporting convolution operator operation to obtain an operation result of the matrix multiplication operator.
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公开(公告)号：US20240345620A1
公开(公告)日：2024-10-17
申请号：US18634421
申请日：2024-04-12
发明人： Weifeng DONG , Jincai YE , Yuanlin CHENG , Pengfei LIU , Xinxia JIA , Shan LU , Jian WANG
IPC分类号： G06F1/12
CPC分类号： G06F1/12
摘要： A chip, a chip system, and a timestamp synchronization method. The chip is configured to be in communication connection to another chip, and includes a signal generating module, a first signal response module and a first delay module. The signal generating module is configured to generate a synchronization request signal and transmit the synchronization request signal to the first signal response module and the another chip, so that the another chip records a second timestamp of the another chip in response to receiving the synchronization request signal. The first delay module is configured to perform delay processing on the synchronization request signal to obtain a delayed synchronization request signal. The first signal response module is configured to record a first timestamp of the chip in response to receiving the delayed synchronization request signal, wherein the first timestamp and the second timestamp are used for performing a timestamp synchronization operation.
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公开(公告)号：US20240321801A1
公开(公告)日：2024-09-26
申请号：US18614053
申请日：2024-03-22
发明人： Haiying CHEN , Lin LIU , Meng MEI , Jifeng LI , Jian WANG
IPC分类号： H01L23/00
CPC分类号： H01L24/16 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/32 , H01L24/73 , H01L2224/117 , H01L2224/1183 , H01L2224/13022 , H01L2224/1414 , H01L2224/16055 , H01L2224/32225 , H01L2224/73204 , H01L2924/30107
摘要： Embodiments of the present disclosure provides a chip and a method of forming the same and a package structure, the chip includes a base substrate and conductive bumps located on the base substrate, a planar shape of each bump has a long axis and a short axis extending through a center of the bump, a length of the long axis is greater than that of the short axis, the conductive bumps include bump unit rows each of which includes initial bump units arranged along a first direction and a first expanded bump unit located between adjacent initial bump units; the bump unit rows are arranged in a second direction, with a second expanded bump unit disposed between adjacent bump unit rows, the conductive bumps include a first pattern, a second pattern and an additional pattern formed by corresponding bumps, and each having bumps with different rotation angles.
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公开(公告)号：US20240256373A1
公开(公告)日：2024-08-01
申请号：US18417955
申请日：2024-01-19
发明人： Ligen YAN , Shijian GE , Zihao LV , Liang PENG , Yu ZHANG , Jian WANG , Haitao NIE , Chenchen LI
IPC分类号： G06F11/07
CPC分类号： G06F11/0751 , G06F11/0724
摘要： Embodiments of the present disclosure relate to a coprocessor, a host processor, a crash detection method and an electronic device. In this method, the coprocessor sends a handshake request to the host processor capable of running an operating system. The host processor performs an operation triggered by the handshake request. The host processor sends a positive response to the handshake request to the coprocessor if the operation is performed successfully; and the host processor sends, to the coprocessor, a negative response to the handshake request or no response if the operation is performed successfully. The coprocessor monitors a response to the handshake request from the host processor and determines a detection result of hardware crash associated with the operating system at least based on a monitoring result of this response.
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公开(公告)号：US20240168516A1
公开(公告)日：2024-05-23
申请号：US18513433
申请日：2023-11-17
发明人： Jincai YE , Yuanlin CHENG , Shan LU , Jian WANG
IPC分类号： G06F1/12
CPC分类号： G06F1/12
摘要： A clock synchronization method and apparatus, an electronic device and a storage medium are provided. The clock synchronization method includes: sending a trigger signal to a second processing module and recording a current count value of the first timer upon sending the trigger signal as a first count value; and reading a second count value from the second processing module, the second count value is a current count value of a second timer of the second processing module upon the second processing module receiving the trigger signal, and a count value of the second timer is used as a timing reference of the second processing module and sequentially increasing; the first count value and the second count value are used for a clock compensation to synchronize a first clock domain where the first processing module is located with a second clock domain where the second processing module is located.
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8.发明公开公开(公告)号：US20240146735A1
公开(公告)日：2024-05-02
申请号：US18498805
申请日：2023-10-31
发明人： Jiawei LIU , Zhihua CAO , Cai XU , Ziqi YANG , Yisheng JIANG , Jian WANG
摘要： A method and an apparatus for processing a multi-cloud service, an electronic device, a storage medium and a system are provided. The method includes acquiring a target multi-cloud scheduling instruction, where the target multi-cloud scheduling instruction includes a multi-cloud scheduling demand and description of schedule-required information; transmitting an application for the schedule-required information to a target user in a trusted environment based on the description of the schedule-required information, to obtain the schedule-required information; generating a scheduling strategy in the trusted environment based on the target multi-cloud scheduling instruction and the schedule-required information; and initiating scheduling to a target cloud vendor based on the scheduling strategy to obtain a scheduling result.
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公开(公告)号：US20240266245A1
公开(公告)日：2024-08-08
申请号：US18431780
申请日：2024-02-02
发明人： Sijie LI , Haixin HUANG , Meng MEI , Jifeng LI , Jian WANG
IPC分类号： H01L23/367 , H01L21/48
CPC分类号： H01L23/3675 , H01L21/4878
摘要： The embodiments of the disclosure provides a package structure and a manufacturing method thereof, the package structure includes: a die, including a substrate and a device layer, wherein the substrate has a front side and a back side opposite to each other in a first direction perpendicular to a main surface of the die, and the device layer is at the front side of the substrate; a thermal interface material layer, on the back side of the substrate; and a thermal dissipation component, attached to the die through the thermal interface material layer, the die further includes at least one of a heat dissipation filling structure and a substrate recess, the heat dissipation filling structure is embedded in the substrate and has an exposed part exposed at a sidewall of the substrate; the substrate recess is recessed from the back side of the substrate towards the device layer.
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