公开(公告)号：US20070072405A1

公开(公告)日：2007-03-29

申请号：US11605397

申请日：2006-11-29

申请人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

发明人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/02122 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05552 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/06051 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/0614 ,  H01L2224/06141 ,  H01L2224/06177 ,  H01L2224/06179 ,  H01L2224/13006 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/1414 ,  H01L2224/14141 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805

摘要： There is provided a semiconductor device in which the junction strength of land portions and external terminals is increased, the disconnection of the external terminal is surely prevented, and the connection reliability is ensured over an extended period of time. An insulating resin layer which insulates metal wires from one another is formed on a semiconductor element, an end portion of the metal wire is connected to an electrode on the semiconductor element, the other end portion of the metal wire is connected to an external terminal to form a land, the entire surface of the semiconductor element except the connecting portions of the lands is covered with a surface-layer resin layer, and a projection is provided on the top surface of a land portion of at least one of the lands. Because of this, after their soldering, the external terminal holds the perimeter of the projection on the land portion, so that the external terminal can be surely connected to the land portion. As a result, the semiconductor device which ensures their connection reliability over an extended period of time can be obtained.

公开(公告)号：US20170005056A1

公开(公告)日：2017-01-05

申请号：US15266752

申请日：2016-09-15

申请人： Apple Inc.

发明人： Anthony Fai ,  Evan R. Boyle ,  Zhiping Yang ,  Zhonghua Wu

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5283 ,  H01L23/5286 ,  H01L23/5384 ,  H01L23/552 ,  H01L23/60 ,  H01L24/06 ,  H01L24/14 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L25/065 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06151 ,  H01L2224/06177 ,  H01L2224/1405 ,  H01L2224/1414 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06537 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.

摘要翻译： 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。

公开(公告)号：US20150091178A1

公开(公告)日：2015-04-02

申请号：US14039622

申请日：2013-09-27

申请人： Douglas M. Reber ,  Mehul D. Shroff ,  Edward O. Travis

发明人： Douglas M. Reber ,  Mehul D. Shroff ,  Edward O. Travis

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L23/48

CPC分类号： H01L25/50 ,  H01L21/304 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/0569 ,  H01L2224/13023 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14131 ,  H01L2224/14133 ,  H01L2224/14135 ,  H01L2224/1414 ,  H01L2224/14517 ,  H01L2224/16111 ,  H01L2224/16147 ,  H01L2224/48463 ,  H01L2224/73257 ,  H01L2224/8114 ,  H01L2224/81815 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/92227 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15788 ,  H01L2924/384 ,  H01L2924/00 ,  H01L2224/03 ,  H01L21/78 ,  H01L21/56 ,  H01L2224/81 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method for 3D device packaging utilizes through-substrate pillars to mechanically and electrically bond two or more dice. The first die includes a set of access holes extending from a surface of the first die to a set of pads at a metal layer of the first die. The second die includes a set of metal pillars. The first die and the second die are stacked such that each metal pillar extends from a surface of the second die to a corresponding pad via a corresponding access hole. The first die and second die are mechanically and electrically bonded via solder joints formed between the metal pillars and the corresponding pads.

摘要翻译： 用于3D设备封装的方法利用贯穿基板支柱将两个或更多个骰子机械地和电气地接合。 第一管芯包括从第一管芯的表面延伸到第一管芯的金属层处的一组焊盘的一组入口孔。 第二个模具包括一套金属支柱。 第一管芯和第二管芯被堆叠成使得每个金属柱经由相应的通孔从第二管芯的表面延伸到相应的焊盘。 第一模具和第二模具通过形成在金属柱和相应焊盘之间的焊接点机械地和电连接。

公开(公告)号：US20110235296A1

公开(公告)日：2011-09-29

申请号：US12805326

申请日：2010-07-26

申请人： Hong-Bin Shi ,  Jin-Chang Wu

发明人： Hong-Bin Shi ,  Jin-Chang Wu

IPC分类号： H05K7/00

CPC分类号： H01L24/14 ,  H01L24/16 ,  H01L2224/13099 ,  H01L2224/1413 ,  H01L2224/1414 ,  H01L2224/16225 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00

摘要： The present invention relates to an integrated circuit package component with ball conducting joints, includes a substrate and a plurality of solder joints. The solder joints are installed on one surface of the substrate. The solder joints are arranged to form a concentric array having a first zone and a second zone, the second zone encircles the first zone. The soldering area of any solder joint in the first zone of the concentric array is smaller than that of any solder joint in the second zone of the concentric array.

摘要翻译： 本发明涉及具有球导电接头的集成电路封装部件，其包括基板和多个焊点。 焊点安装在基板的一个表面上。 焊点被布置成形成具有第一区和第二区的同心阵列，第二区围绕第一区。 同心阵列的第一区域中的任何焊点的焊接区域小于同心阵列的第二区域中的任何焊接点的焊接区域。

公开(公告)号：US20050167832A1

公开(公告)日：2005-08-04

申请号：US11037262

申请日：2005-01-19

申请人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

发明人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/498 ,  H01L29/40

CPC分类号： H01L24/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/02122 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05552 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/06051 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/0614 ,  H01L2224/06141 ,  H01L2224/06177 ,  H01L2224/06179 ,  H01L2224/13006 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/1414 ,  H01L2224/14141 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805

摘要： There is provided a semiconductor device in which the junction strength of land portions and external terminals is increased, the disconnection of the external terminal is surely prevented, and the connection reliability is ensured over an extended period of time. An insulating resin layer which insulates metal wires from one another is formed on a semiconductor element, an end portion of the metal wire is connected to an electrode on the semiconductor element, the other end portion of the metal wire is connected to an external terminal to form a land, the entire surface of the semiconductor element except the connecting portions of the lands is covered with a surface-layer resin layer, and a projection is provided on the top surface of a land portion of at least one of the lands. Because of this, after their soldering, the external terminal holds the perimeter of the projection on the land portion, so that the external terminal can be surely connected to the land portion. As a result, the semiconductor device which ensures their connection reliability over an extended period of time can be obtained.

摘要翻译： 提供了一种半导体装置，其中陆部和外部端子的结合强度增加，可靠地防止外部端子的断开，并且在延长的时间段内确保连接可靠性。 在半导体元件上形成绝缘树脂层，金属线彼此连接，金属线的端部与半导体元件上的电极连接，金属线的另一端部与外部端子连接 形成一个焊盘，除了焊盘的连接部分之外的半导体元件的整个表面被表面层树脂层覆盖，并且在至少一个焊盘的焊盘部分的顶表面上设置突起。 因此，在焊接之后，外部端子将突起的周边保持在陆部上，使得外部端子可以可靠地连接到陆部。 结果，可以获得确保其在较长时间段内的连接可靠性的半导体器件。

公开(公告)号：US09741675B2

公开(公告)日：2017-08-22

申请号：US14599366

申请日：2015-01-16

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Dao-Long Chen ,  Ping-Feng Yang ,  Chang-Chi Lee ,  Chien-Fan Chen

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC分类号： H01L24/13 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/0614 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1161 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13007 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1414 ,  H01L2224/16055 ,  H01L2224/16056 ,  H01L2224/81191 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

摘要： The present disclosure relates to bump structures and a semiconductor device and semiconductor device package having the same. The semiconductor device includes a body, at least one conductive metal pad and at least one metal pillar. The body includes a first surface. The at least one conductive metal pad is disposed on the first surface. Each metal pillar is formed on a corresponding conductive metal pad. Each metal pillar has a concave side wall and a convex side wall opposite the first concave side wall, and the concave side wall and the convex side wall are orthogonal to the corresponding conductive metal pad.

公开(公告)号：US20130161814A1

公开(公告)日：2013-06-27

申请号：US13773844

申请日：2013-02-22

申请人： Michael Z. Su ,  Gamal Refai-Ahmed ,  Bryan Black

发明人： Michael Z. Su ,  Gamal Refai-Ahmed ,  Bryan Black

IPC分类号： H01L23/498

CPC分类号： H01L23/49827 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/11 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1132 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/1414 ,  H01L2224/14143 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first conductor pad, a first conductor pillar positioned on but laterally offset from the first conductor pad toward the first edge and that has a first lateral dimension and is adapted to couple to one of the first and second conductor structures, a second conductor pad positioned nearer the first edge than the first conductor pad, and a second conductor pillar positioned on but laterally offset from the second conductor pad and that has a second lateral dimension larger than the first lateral dimension and is adapted to couple to the other of the first and second conductor structures.

摘要翻译： 一种半导体芯片器件包括适于与第二半导体芯片堆叠的第一半导体芯片，其中第二半导体芯片包括侧面以及从侧面突出的第一和第二导体结构。 第一半导体芯片包括第一边缘，第一导体焊盘，第一导体柱，其位于第一导体焊盘朝向第一边缘但横向偏移并且具有第一横向尺寸并且适于耦合到第一和第 第二导体结构，位于比第一导体焊盘更靠近第一边缘的第二导体焊盘，以及定位在第二导体焊盘但是横向偏离第二导体焊盘并且具有大于第一横向尺寸的第二横向尺寸的第二导体柱，并且适于 耦合到第一和第二导体结构中的另一个。

公开(公告)号：US08394672B2

公开(公告)日：2013-03-12

申请号：US12856632

申请日：2010-08-14

申请人： Michael Z. Su ,  Gamal Refai-Ahmed ,  Bryan Black

发明人： Michael Z. Su ,  Gamal Refai-Ahmed ,  Bryan Black

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/49827 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/11 ,  H01L24/14 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/1132 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/1414 ,  H01L2224/14143 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first conductor pad, a first conductor pillar positioned on but laterally offset from the first conductor pad toward the first edge and that has a first lateral dimension and is adapted to couple to one of the first and second conductor structures, a second conductor pad positioned nearer the first edge than the first conductor pad, and a second conductor pillar positioned on but laterally offset from the second conductor pad and that has a second lateral dimension larger than the first lateral dimension and is adapted to couple to the other of the first and second conductor structures.

摘要翻译： 一种半导体芯片器件包括适于与第二半导体芯片堆叠的第一半导体芯片，其中第二半导体芯片包括侧面以及从侧面突出的第一和第二导体结构。 第一半导体芯片包括第一边缘，第一导体焊盘，第一导体柱，其位于第一导体焊盘朝向第一边缘但横向偏移并且具有第一横向尺寸并且适于耦合到第一和第 第二导体结构，位于比第一导体焊盘更靠近第一边缘的第二导体焊盘，以及定位在第二导体焊盘但是横向偏离第二导体焊盘并且具有大于第一横向尺寸的第二横向尺寸的第二导体柱，并且适于 耦合到第一和第二导体结构中的另一个。

公开(公告)号：US07164208B2

公开(公告)日：2007-01-16

申请号：US11037262

申请日：2005-01-19

申请人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

发明人： Kazuyuki Kainou ,  Masatoshi Yagoh ,  Kimihito Kuwabara ,  Katsumi Ohtani

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L24/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/02122 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05552 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05571 ,  H01L2224/06051 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/0614 ,  H01L2224/06141 ,  H01L2224/06177 ,  H01L2224/06179 ,  H01L2224/13006 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/1414 ,  H01L2224/14141 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81805

摘要： There is provided a semiconductor device in which the junction strength of land portions and external terminals is increased, the disconnection of the external terminal is surely prevented, and the connection reliability is ensured over an extended period of time. An insulating resin layer which insulates metal wires from one another is formed on a semiconductor element, an end portion of the metal wire is connected to an electrode on the semiconductor element, the other end portion of the metal wire is connected to an external terminal to form a land, the entire surface of the semiconductor element except the connecting portions of the lands is covered with a surface-layer resin layer, and a projection is provided on the top surface of a land portion of at least one of the lands. Because of this, after their soldering, the external terminal holds the perimeter of the projection on the land portion, so that the external terminal can be surely connected to the land portion. As a result, the semiconductor device which ensures their connection reliability over an extended period of time can be obtained.

摘要翻译： 提供了一种半导体装置，其中陆部和外部端子的结合强度增加，可靠地防止外部端子的断开，并且在延长的时间段内确保连接可靠性。 在半导体元件上形成绝缘树脂层，金属线彼此连接，金属线的端部与半导体元件上的电极连接，金属线的另一端部与外部端子连接 形成一个焊盘，除了焊盘的连接部分之外的半导体元件的整个表面被表面层树脂层覆盖，并且在至少一个焊盘的焊盘部分的顶表面上设置突起。 因此，在焊接之后，外部端子将突起的周边保持在陆部上，使得外部端子可以可靠地连接到陆部。 结果，可以获得确保其在较长时间段内的连接可靠性的半导体器件。

公开(公告)号：US09853016B2

公开(公告)日：2017-12-26

申请号：US15435719

申请日：2017-02-17

申请人： Apple Inc.

发明人： Anthony Fai ,  Evan R. Boyle ,  Zhiping Yang ,  Zhonghua Wu

IPC分类号： H01L25/065 ,  H01L25/00 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5283 ,  H01L23/5286 ,  H01L23/5384 ,  H01L23/552 ,  H01L23/60 ,  H01L24/06 ,  H01L24/14 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L25/065 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/06151 ,  H01L2224/06177 ,  H01L2224/1405 ,  H01L2224/1414 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06537 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/1443 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15313 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.