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1.发明申请SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 审中-公开用于高速，低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号：US20170005056A1
公开(公告)日：2017-01-05
申请号：US15266752
申请日：2016-09-15
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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公开(公告)号：US09568971B2
公开(公告)日：2017-02-14
申请号：US14614425
申请日：2015-02-05
Applicant: APPLE INC.
Inventor： Avraham Poza Meir , Evan R. Boyle , Christopher J. Sarcone , Barak Rotbard
IPC: G06F3/06 , G06F1/30 , G06F1/32 , G11C5/14 , G11C11/406 , G11C14/00 , G11C11/4074
CPC classification number: G06F1/30 , G06F1/3275 , G06F1/3278 , G06F1/3287 , G06F3/0625 , G06F3/0655 , G06F3/0679 , G06F11/073 , G06F11/0793 , G11C5/148 , G11C11/40615 , G11C11/4074 , G11C14/0018 , Y02D10/14 , Y02D10/157 , Y02D10/171 , Y02D50/20
Abstract: A storage device includes a non-volatile memory, a volatile memory and a controller. The volatile memory supports a normal mode and a self-refresh mode. The controller is configured to store data for a host in the non-volatile memory while using the volatile memory in the normal mode and, in response to receiving a power-down command from the host, to deactivate at least part of the storage device and to switch the volatile memory from the normal mode to the self-refresh mode.
Abstract translation: 存储设备包括非易失性存储器，易失性存储器和控制器。 易失性存储器支持正常模式和自刷新模式。 控制器被配置为在正常模式下使用易失性存储器的同时将主机的数据存储在非易失性存储器中，并且响应于接收到来自主机的掉电命令，停用至少部分存储设备和 将易失性存储器从正常模式切换到自刷新模式。
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公开(公告)号：US20160231797A1
公开(公告)日：2016-08-11
申请号：US14614425
申请日：2015-02-05
Applicant: APPLE INC.
Inventor： Avraham Poza Meir , Evan R. Boyle , Christopher J. Sarcone , Barak Rotbard
IPC: G06F1/30 , G06F1/32 , G11C11/4074 , G06F3/06 , G11C14/00 , G11C11/406
CPC classification number: G06F1/30 , G06F1/3275 , G06F1/3278 , G06F1/3287 , G06F3/0625 , G06F3/0655 , G06F3/0679 , G06F11/073 , G06F11/0793 , G11C5/148 , G11C11/40615 , G11C11/4074 , G11C14/0018 , Y02D10/14 , Y02D10/157 , Y02D10/171 , Y02D50/20
Abstract: A storage device includes a non-volatile memory, a volatile memory and a controller. The volatile memory supports a normal mode and a self-refresh mode. The controller is configured to store data for a host in the non-volatile memory while using the volatile memory in the normal mode and, in response to receiving a power-down command from the host, to deactivate at least part of the storage device and to switch the volatile memory from the normal mode to the self-refresh mode.
Abstract translation: 存储设备包括非易失性存储器，易失性存储器和控制器。 易失性存储器支持正常模式和自刷新模式。 控制器被配置为在正常模式下使用易失性存储器的同时将主机的数据存储在非易失性存储器中，并且响应于接收到来自主机的掉电命令，停用至少部分存储设备和 将易失性存储器从正常模式切换到自刷新模式。
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公开(公告)号：US09853016B2
公开(公告)日：2017-12-26
申请号：US15435719
申请日：2017-02-17
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/065 , H01L25/00 , H01L23/498
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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公开(公告)号：US09466571B2
公开(公告)日：2016-10-11
申请号：US14802750
申请日：2015-07-17
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/538 , H01L23/498 , H01L23/00 , H01L23/60 , H01L23/528 , H01L21/48 , H01L25/00 , H01L21/56 , H01L25/065 , H01L25/18 , H01L23/552
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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Patent Agency Ranking
6.发明申请SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 审中-公开用于高速，低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号：US20150325560A1
公开(公告)日：2015-11-12
申请号：US14802750
申请日：2015-07-17
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/18 , H01L23/00 , H01L23/60 , H01L21/56 , H01L21/48 , H01L25/065 , H01L25/00 , H01L23/498 , H01L23/528
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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公开(公告)号：US20170162546A1
公开(公告)日：2017-06-08
申请号：US15435719
申请日：2017-02-17
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L25/065 , H01L23/498 , H01L25/00
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
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8.发明授权Systems and methods for high-speed, low-profile memory packages and pinout designs 有权用于高速，低调内存封装和引脚排列设计的系统和方法公开(公告)号：US09583452B2
公开(公告)日：2017-02-28
申请号：US15266752
申请日：2016-09-15
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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9.发明授权Systems and methods for high-speed, low-profile memory packages and pinout designs 有权用于高速，低调内存封装和引脚排列设计的系统和方法公开(公告)号：US09087846B2
公开(公告)日：2015-07-21
申请号：US13801722
申请日：2013-03-13
Applicant: Apple Inc.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/48 , H01L23/52 , H01L29/40 , H01L23/538 , H01L23/498 , H01L25/065 , H01L25/18
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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10.发明申请SYSTEMS AND METHODS FOR HIGH-SPEED, LOW-PROFILE MEMORY PACKAGES AND PINOUT DESIGNS 有权用于高速，低配置的存储器封装和引脚排列设计的系统和方法公开(公告)号：US20140264906A1
公开(公告)日：2014-09-18
申请号：US13801722
申请日：2013-03-13
Applicant: APPLE INC.
Inventor： Anthony Fai , Evan R. Boyle , Zhiping Yang , Zhonghua Wu
IPC: H01L23/538
CPC classification number: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5283 , H01L23/5286 , H01L23/5384 , H01L23/552 , H01L23/60 , H01L24/06 , H01L24/14 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/85 , H01L25/065 , H01L25/18 , H01L25/50 , H01L2224/04042 , H01L2224/05599 , H01L2224/06151 , H01L2224/06177 , H01L2224/1405 , H01L2224/1414 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06537 , H01L2225/06548 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/1443 , H01L2924/15311 , H01L2924/15312 , H01L2924/15313 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
Abstract: Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.
Abstract translation: 为层叠半导体存储器封装提供了系统和方法。 每个封装可以包括集成电路（“IC”）封装基板，能够通过两个通道将数据传输到堆叠在封装内的存储器管芯。 每个通道可以位于IC封装衬底的一侧，并且来自每个通道的信号可以从它们各自的侧面被引导到存储器管芯。
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