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公开(公告)号:US20240274498A1
公开(公告)日:2024-08-15
申请号:US18566668
申请日:2021-06-09
发明人: Shotaro YAMAMOTO , Yoshiko TAMADA , Kazuya OKADA , Seiji OKA
IPC分类号: H01L23/373 , H01L23/00 , H01L23/495 , H01L25/065
CPC分类号: H01L23/3735 , H01L23/4951 , H01L23/49575 , H01L24/08 , H01L24/48 , H01L25/0652 , H01L2224/08145 , H01L2224/08225 , H01L2224/48137 , H01L2224/48157 , H01L2924/01013 , H01L2924/01029 , H01L2924/13091 , H01L2924/3511
摘要: A semiconductor module includes a semiconductor chip, an insulating substrate, a relay board, and a heat-dissipating component. The insulating substrate includes a main circuit pattern and an insulating layer. The main circuit pattern is electrically connected to the semiconductor chip. The relay board sandwiches the semiconductor chip together with the main circuit pattern in a direction in which the insulating layer and the semiconductor chip sandwich the main circuit pattern. The relay board is electrically connected to the main circuit pattern through the semiconductor chip. The heat-dissipating component is sandwiched between the insulating substrate and the relay board in the sandwiching direction. The main circuit pattern at least partially surrounds the heat-dissipating component on the insulating layer.
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公开(公告)号:US20220415738A1
公开(公告)日:2022-12-29
申请号:US17771206
申请日:2020-11-18
摘要: A power semiconductor device in which the size of an insulating substrate is reduced and connection failure can be suppressed includes an insulating substrate, a semiconductor element, and a printed circuit board. The semiconductor element is bonded to one main surface of the insulating substrate. The printed circuit board is bonded to face the semiconductor element. The semiconductor element has a main electrode and a signal electrode. The printed circuit board includes a core member, a first conductor layer, and a second conductor layer. The second conductor layer has a bonding pad. The printed circuit board has a missing portion. A metal column portion is arranged to pass through the inside of the missing portion and reach the insulating substrate. The signal electrode and the bonding pad are connected by a metal wire. The metal column portion and the insulating substrate are bonded.
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公开(公告)号:US20240266315A1
公开(公告)日:2024-08-08
申请号:US18500993
申请日:2023-11-02
发明人: Kazuya OKADA
CPC分类号: H01L24/48 , H01L25/072 , H01L2224/48091 , H01L2224/48139 , H01L2924/13091 , H01L2924/30107
摘要: An object is to provide a technique capable of reducing variations in gate-source voltage among a plurality of semiconductor elements. The semiconductor device includes the plurality of semiconductor elements, a metal electrode, and a control wire. Each of the plurality of semiconductor elements has a control electrode configured to control a main current. The main current of the plurality of semiconductor element flows through the metal electrode. The control wire connects each of the control electrodes of the plurality of semiconductor elements in series, and interlinks with a magnetic field generated when the main current flows through the metal electrode.
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公开(公告)号:US20190074238A1
公开(公告)日:2019-03-07
申请号:US16004769
申请日:2018-06-11
发明人: Kazuya OKADA , Hiroki MURAOKA , Koichi MASUDA , Yasutaka SHIMIZU , Shoji IZUMI
IPC分类号: H01L23/40 , H01L23/04 , H01L23/433
摘要: Provided is a technique for improving product attachment. In a semiconductor device, the following expression is satisfied by an angle A formed by an imaginary line connecting two attachment holes together and an imaginary line connecting together a lowest point of one of two projections positioned in a surrounding portion of one of the two attachment holes and a contact point between a bulge and a heat sink, with a screw fastened to the heat sink through the one attachment hole, where M represents a vertical direction between the lower end of a body and the lower end of a case, where W represents a bulge amount of the bulge, where T represents a height of the projection, where L represents a horizontal distance from the outer peripheral end of the case to the outer peripheral end of the heat dissipation plate: 0
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公开(公告)号:US20230197668A1
公开(公告)日:2023-06-22
申请号:US17927008
申请日:2020-07-08
发明人: Yoshiko TAMADA , Seiji OKA , Shota MORISAKI , Kazuya OKADA
IPC分类号: H01L23/00 , H01L25/18 , H01L23/538
CPC分类号: H01L24/73 , H01L23/5384 , H01L23/5385 , H01L23/5386 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L25/18 , H01L23/49811 , H01L2224/0603 , H01L2224/3303 , H01L2224/4824 , H01L2224/05552 , H01L2224/05553 , H01L2224/06051 , H01L2224/06181 , H01L2224/29109 , H01L2224/29111 , H01L2224/29139 , H01L2224/29147 , H01L2224/32227 , H01L2224/33181 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48106 , H01L2224/48108 , H01L2224/48229 , H01L2224/73215 , H01L2224/73265 , H01L2924/014
摘要: A power semiconductor module includes a plurality of self-arc-extinguishing semiconductor elements, a printed wiring board, a plurality of conductive joining members, and a plurality of conductive gate wires. The printed wiring board includes an insulating substrate, a source conductive pattern, and a gate conductive pattern. The plurality of self-arc-extinguishing semiconductor elements each include a source electrode and a gate electrode. The source electrodes are joined to the source conductive pattern by means of the plurality of conductive joining members. The plurality of conductive gate wires connect the gate electrodes and the gate conductive pattern.
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