公开(公告)号：US11652076B2

公开(公告)日：2023-05-16

申请号：US17736536

申请日：2022-05-04

申请人： Samsung Electronics Co., Ltd.

发明人： Taeho Ko ,  Daehee Lee ,  Hyunchul Jung

IPC分类号： H01L23/31 ,  H01L23/00

CPC分类号： H01L24/24 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/13 ,  H01L24/82 ,  H01L2224/03462 ,  H01L2224/03903 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05564 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/13006 ,  H01L2224/245 ,  H01L2224/24101 ,  H01L2224/24155 ,  H01L2224/82101 ,  H01L2224/82106

摘要： A semiconductor device may include a semiconductor chip in an encapsulant. A first insulation layer may be disposed on the encapsulant and the semiconductor chip. A horizontal wiring and a primary pad may be disposed on the first insulation layer. A secondary pad may be disposed on the primary pad. A second insulation layer covering the horizontal wiring may be disposed on the first insulation layer. A solder ball may be disposed on the primary pad and the secondary pad. The primary pad may have substantially the same thickness as a thickness of the horizontal wiring.

公开(公告)号：US20180053702A1

公开(公告)日：2018-02-22

申请号：US15792225

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/20 ,  H01L23/00 ,  H01L21/48 ,  H01L23/04 ,  H01L23/495 ,  H01L23/498 ,  H01L21/50 ,  H01L23/26

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/50 ,  H01L23/04 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48 ,  H01L2224/73267 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3656 ,  H01L2924/3861

摘要： A method is provided. The method includes one or more of removing existing ball bonds from an extracted die, placing the extracted die into a recess of a hermetic substrate, the extracted die having a centered orientation in the recess, and applying a side fill compound into the recess between the extracted die and the hermetic substrate. The method also includes 3D printing, by a 3D printer, a plurality of bond connections between die pads of the extracted die and first bond pads of the hermetic substrate in order to create a 3D printed die substrate, and 3D printing a hermetic encapsulation over the die, the side fill compound, and the 3D printed bond connections in order to create a hermetic assembly. The extracted die includes a fully functional semiconductor die removed from a previous package. The hermetic substrate includes the first bond pads coupled to second bond pads.

公开(公告)号：US09893045B2

公开(公告)日：2018-02-13

申请号：US14971291

申请日：2015-12-16

申请人： STATS ChipPAC, Ltd.

发明人： Reza A. Pagaila ,  Seng Guan Chow ,  Seung Uk Yoon ,  Byung Tai Do ,  Linda Pei Ee Chua

IPC分类号： H01L21/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10 ,  H05K1/18 ,  H05K3/00 ,  H01L25/03 ,  H01L25/065 ,  H01L25/16 ,  H01L21/48 ,  H01L23/29 ,  H01L23/31 ,  H01L23/544 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2223/54426 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/21 ,  H01L2224/2105 ,  H01L2224/215 ,  H01L2224/22 ,  H01L2224/221 ,  H01L2224/24011 ,  H01L2224/2405 ,  H01L2224/24101 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/27002 ,  H01L2224/29 ,  H01L2224/2902 ,  H01L2224/29101 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/29298 ,  H01L2224/32155 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48175 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/078 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H05K1/186 ,  H05K3/007 ,  H05K2201/10674 ,  H01L2224/81 ,  H01L2924/01014 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2224/03 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a first semiconductor die mounted over a carrier. An interposer frame has an opening in the interposer frame and a plurality of conductive pillars formed over the interposer frame. The interposer is mounted over the carrier and first die with the conductive pillars disposed around the die. A cavity can be formed in the interposer frame to contain a portion of the first die. An encapsulant is deposited through the opening in the interposer frame over the carrier and first die. Alternatively, the encapsulant is deposited over the carrier and first die and the interposer frame is pressed against the encapsulant. Excess encapsulant exits through the opening in the interposer frame. The carrier is removed. An interconnect structure is formed over the encapsulant and first die. A second semiconductor die can be mounted over the first die or over the interposer frame.

公开(公告)号：US20180040529A1

公开(公告)日：2018-02-08

申请号：US15792381

申请日：2017-10-24

申请人： Erick Merle Spory

发明人： Erick Merle Spory

IPC分类号： H01L23/20 ,  H01L21/48 ,  H01L23/04 ,  H01L23/498 ,  H01L21/50 ,  H01L23/26 ,  H01L23/00 ,  H01L23/495

CPC分类号： H01L23/20 ,  H01L21/4803 ,  H01L21/4817 ,  H01L21/4867 ,  H01L21/50 ,  H01L23/04 ,  H01L23/057 ,  H01L23/10 ,  H01L23/26 ,  H01L23/49513 ,  H01L23/49541 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/564 ,  H01L24/24 ,  H01L24/25 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24175 ,  H01L2224/245 ,  H01L2224/25171 ,  H01L2224/2731 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48 ,  H01L2224/82102 ,  H01L2224/82103 ,  H01L2224/82214 ,  H01L2224/82815 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/3656 ,  H01L2924/3861

摘要： An integrated circuit is provided. The integrated circuit includes a package base including package leads, an extracted die removed from a previous packaged integrated circuit, and an an interposer bonded to the extracted die and the package base. The extracted die includes original bond pads and one or more original ball bonds on the original bond pads. The interposer includes first bond pads electrically connected to the original bond pads with 3D printed first bond connections conforming to the shapes and surfaces of the extracted die and the interposer and second bond pads electrically connected to the package leads with 3D printed second bond connections conforming to shapes and surfaces of the interposer and package base.

公开(公告)号：US09679863B2

公开(公告)日：2017-06-13

申请号：US13243214

申请日：2011-09-23

申请人： Yaojian Lin ,  Jianmin Fang ,  Xia Feng ,  Kang Chen

发明人： Yaojian Lin ,  Jianmin Fang ,  Xia Feng ,  Kang Chen

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L21/683

CPC分类号： H01L23/562 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68331 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/2101 ,  H01L2224/211 ,  H01L2224/215 ,  H01L2224/24155 ,  H01L2224/245 ,  H01L2224/81815 ,  H01L2224/82005 ,  H01L2224/82101 ,  H01L2224/82106 ,  H01L2224/82986 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2224/19 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2224/1146

摘要： A semiconductor device has a first encapsulant deposited over a first carrier. A plurality of conductive vias is formed through the first encapsulant to provide an interconnect substrate. A first semiconductor die is mounted over a second carrier. The interconnect substrate is mounted over the second carrier adjacent to the first semiconductor die. A second semiconductor die is mounted over the second carrier adjacent to the interconnect substrate. A second encapsulant is deposited over the first and second semiconductor die, interconnect substrate, and second carrier. A first interconnect structure is formed over a first surface of the second encapsulant and electrically connected to the conductive vias. A second interconnect structure is formed over a second surface of the second encapsulant and electrically connected to the conductive vias to make the Fo-WLCSP stackable. Additional semiconductor die can be mounted over the first and second semiconductor die in a PoP arrangement.

公开(公告)号：US09589868B2

公开(公告)日：2017-03-07

申请号：US15064750

申请日：2016-03-09

申请人： GaN Systems Inc.

发明人： Cameron McKnight-MacNeil ,  Greg P. Klowak ,  Ahmad Mizan

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/498 ,  H01L23/492 ,  H01L23/482

CPC分类号： H01L23/49503 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/4824 ,  H01L23/492 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49861 ,  H01L24/02 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/35 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/0239 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16245 ,  H01L2224/245 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/37012 ,  H01L2224/37013 ,  H01L2224/37147 ,  H01L2224/40227 ,  H01L2224/40245 ,  H01L2224/40475 ,  H01L2224/40499 ,  H01L2224/41051 ,  H01L2224/4118 ,  H01L2224/73203 ,  H01L2224/73263 ,  H01L2224/81132 ,  H01L2224/81143 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/8384 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/8484 ,  H01L2224/92143 ,  H01L2224/97 ,  H01L2924/00015 ,  H01L2924/01014 ,  H01L2924/04642 ,  H01L2924/1033 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/17747 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/81 ,  H01L2224/48

摘要： Packaging solutions for large area, GaN die comprising one or more lateral GaN power transistor devices and systems are disclosed. Packaging assemblies comprise an interposer sub-assembly comprising the lateral GaN die and a leadframe. The GaN die is electrically connected to the leadframe using bump or post interconnections, silver sintering, or other low inductance interconnections. Then, attachment of the GaN die to the substrate and the electrical connections of the leadframe to contacts on the substrate are made in a single process step. The sub-assembly may be mounted in a standard power module, or alternatively on a substrate, such as a printed circuit board. For high current applications, the sub-assembly also comprises a ceramic substrate for heat dissipation. This packaging scheme provides interconnections with lower inductance and higher current capacity, simplifies fabrication, and enables improved thermal matching of components, compared with conventional wirebonded power modules.

摘要翻译： 公开了用于大面积的包括一个或多个横向GaN功率晶体管器件和系统的GaN管芯的封装解决方案。 包装组件包括包括横向GaN管芯和引线框架的插入件子组件。 GaN管芯使用凸点或柱互连，银烧结或其他低电感互连电连接到引线框架。 然后，在单个工艺步骤中制造GaN管芯到衬底的连接以及引线框架与衬底上的触点的电连接。 子组件可以安装在标准功率模块中，或者替代地安装在诸如印刷电路板的基板上。 对于高电流应用，子组件还包括用于散热的陶瓷衬底。 与传统的引线键合功率模块相比，该封装方案提供了具有较低电感和较高电流容量的互连，简化了制造，并且能够改进组件的热匹配。

公开(公告)号：US20160343629A1

公开(公告)日：2016-11-24

申请号：US15224680

申请日：2016-08-01

申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

发明人： Ranjan RAJOO ,  Kai Chong CHAN

IPC分类号： H01L23/10 ,  H01L23/00

CPC分类号： H01L23/10 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/24 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/73 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2224/02311 ,  H01L2224/02331 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/03002 ,  H01L2224/04042 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/24051 ,  H01L2224/245 ,  H01L2224/2732 ,  H01L2224/2741 ,  H01L2224/2745 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2761 ,  H01L2224/27618 ,  H01L2224/29011 ,  H01L2224/29014 ,  H01L2224/29078 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/3012 ,  H01L2224/30505 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73267 ,  H01L2224/82101 ,  H01L2224/83065 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83801 ,  H01L2224/83805 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8389 ,  H01L2224/83905 ,  H01L2224/92 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/83 ,  H01L2224/0231 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/82 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/0105 ,  H01L21/304

摘要： A semiconductor wafer stack and a method of forming a semiconductor device is disclosed. The method includes providing a wafer stack with first and second wafers bonded together. The wafers include edge and non-edge regions, and at least one of the first and second wafers includes devices formed in the non-edge region. The first wafer serves as the base wafer while the second wafer serves as the top wafer of the wafer stack, where the base wafer is wider than the top wafer, providing a step edge of the wafer stack. An edge protection seal is formed on the wafer stack, where first and second layers are deposited on the wafer stack including at the top wafer and step edge of the wafer stack. The portion of the first and second layers on the step edge of the wafer stack forms the edge protection seal which protects the devices in the wafer stack in subsequent processing.

摘要翻译： 公开了一种半导体晶片堆叠和形成半导体器件的方法。 该方法包括提供具有结合在一起的第一和第二晶片的晶片叠层。 晶片包括边缘和非边缘区域，并且第一和第二晶片中的至少一个包括形成在非边缘区域中的器件。 第一晶片用作基晶片，而第二晶片用作晶片叠层的顶晶片，其中基晶片比顶晶片宽，提供晶片叠层的台阶边缘。 边缘保护密封形成在晶片堆叠上，其中第一和第二层沉积在晶片堆叠上，包括在晶片堆叠的顶部晶片和阶梯边缘处。 第一层和第二层在晶片堆叠的台阶边缘上的部分形成边缘保护密封，其在随后的处理中保护晶片堆叠中的器件。

公开(公告)号：US20160276277A1

公开(公告)日：2016-09-22

申请号：US15006082

申请日：2016-01-25

申请人： MEDIATEK INC.

发明人： Shih-Yi Syu ,  Tung-Hsien Hsieh ,  Che-Ya Chou

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/522 ,  H01L23/532 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/5386 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/53228 ,  H01L23/5384 ,  H01L23/66 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/73209 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An RDL structure on a passivation layer includes a first landing pad disposed directly above a first on-chip metal pad; a first via in a passivation layer to electrically connect the first landing pad with the first on-chip metal pad; a second landing pad disposed directly above the second on-chip metal pad; a second via in the passivation layer to electrically connect the second landing pad with the second on-chip metal pad; and at least five traces being disposed on the passivation layer and passing through a space between the first landing pad and the second landing pad.

摘要翻译： 钝化层上的RDL结构包括直接设置在第一片上金属焊盘上方的第一着陆焊盘; 钝化层中的第一通孔，用于将第一着陆焊盘与第一片上金属焊盘电连接; 第二着陆焊盘，其设置在所述第二片上金属焊盘的正上方; 在所述钝化层中的第二通孔，用于将所述第二着陆焊盘与所述第二片上金属焊盘电连接; 并且至少五个迹线设置在钝化层上并且穿过第一着陆焊盘和第二着陆焊盘之间的空间。

公开(公告)号：US20160276258A1

公开(公告)日：2016-09-22

申请号：US15167830

申请日：2016-05-27

申请人： STATS ChipPAC Pte. Ltd.

发明人： Yaojian Lin ,  Kang Chen

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L21/78

CPC分类号： H01L23/49827 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/27 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/05082 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/2401 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/245 ,  H01L2224/27334 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48811 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81191 ,  H01L2224/82101 ,  H01L2224/82104 ,  H01L2224/82106 ,  H01L2224/83132 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/85411 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/92147 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/27 ,  H01L2924/014 ,  H01L2924/01082 ,  H01L2924/0105 ,  H01L2224/81805 ,  H01L2924/01005

摘要： A semiconductor device includes a BGA package including first bumps. A first semiconductor die is mounted to the BGA package between the first bumps. The BGA package and first semiconductor die are mounted to a carrier. A first encapsulant is deposited over the carrier and around the BGA package and first semiconductor die. The carrier is removed to expose the first bumps and first semiconductor die. An interconnect structure is electrically connected to the first bumps and first semiconductor die. The BGA package further includes a substrate and a second semiconductor die mounted, and electrically connected, to the substrate. A second encapsulant is deposited over the second semiconductor die and substrate. The first bumps are formed over the substrate opposite the second semiconductor die. A warpage balance layer is formed over the BGA package.

摘要翻译： 半导体器件包括包括第一凸块的BGA封装。 第一半导体管芯安装到第一凸块之间的BGA封装。 BGA封装和第一半导体管芯安装在载体上。 第一密封剂沉积在载体上并且围绕BGA封装和第一半导体管芯。 移除载体以暴露第一凸块和第一半导体管芯。 互连结构电连接到第一凸块和第一半导体管芯。 BGA封装还包括基板和安装并电连接到基板的第二半导体管芯。 第二密封剂沉积在第二半导体管芯和衬底上。 第一凸起形成在与第二半导体管芯相对的衬底上。 在BGA封装上形成翘曲平衡层。

公开(公告)号：US09418979B2

公开(公告)日：2016-08-16

申请号：US14967629

申请日：2015-12-14

申请人： RENSSELAER POLYTECHNIC INSTITUTE

发明人： Robert F. Karlicek, Jr. ,  James Jian-Qiang Lu ,  Charles Sanford Goodwin ,  Anton Tkachenko

IPC分类号： H01L25/00 ,  H01L23/00 ,  H01L21/683 ,  H01L25/075

CPC分类号： H01L25/50 ,  H01L21/6836 ,  H01L24/05 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/76 ,  H01L24/82 ,  H01L24/83 ,  H01L24/95 ,  H01L24/96 ,  H01L25/0753 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2221/68386 ,  H01L2224/04026 ,  H01L2224/05655 ,  H01L2224/13101 ,  H01L2224/24225 ,  H01L2224/245 ,  H01L2224/291 ,  H01L2224/32225 ,  H01L2224/75252 ,  H01L2224/75283 ,  H01L2224/75655 ,  H01L2224/75701 ,  H01L2224/75733 ,  H01L2224/75801 ,  H01L2224/76655 ,  H01L2224/76701 ,  H01L2224/76733 ,  H01L2224/76801 ,  H01L2224/82002 ,  H01L2224/82102 ,  H01L2224/82143 ,  H01L2224/83002 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/8323 ,  H01L2224/83801 ,  H01L2224/9202 ,  H01L2224/95101 ,  H01L2224/95144 ,  H01L2924/00011 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/3511 ,  H01L2933/0066 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2224/83205 ,  H01L2924/00014

摘要： Disclosed herein is a method of assembling an array of light emitting diode (LED) dies on a substrate comprising: positioning dies in fluid; exposing the dies to a magnetic force to attract the dies onto magnets that are arranged at pre-determined locations either on or near the substrate; and forming permanent connections between the dies and the substrate thereby constituting an array of LED dies on a substrate.

摘要翻译： 本文公开了一种在衬底上组装发光二极管（LED）管芯的阵列的方法，包括：将管芯定位在流体中; 将模具暴露于磁力以将模具吸引到布置在基板上或附近的预定位置的磁体上; 并且在所述管芯和所述衬底之间形成永久连接，从而在衬底上构成LED管芯阵列。