公开(公告)号：US20140167293A1

公开(公告)日：2014-06-19

申请号：US13830804

申请日：2013-03-14

申请人： SK HYNIX INC.

发明人： Dong-Uk LEE ,  Young-Ju KIM ,  Keun-Soo SONG

IPC分类号： H01L23/00

CPC分类号： H01L23/49811 ,  G11C7/222 ,  G11C7/225 ,  H01L23/5286 ,  H01L24/06 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/0613 ,  H01L2224/1413 ,  H01L2924/3841

摘要： An integrated circuit includes first and second bump pads spaced from each other with a first space, configured to receive differential signals for a normal operation, and at least one redundant bump pad spaced from the first bump pad with a second space smaller than the first space, configured to receive a signal for a repair to the differential signals.

公开(公告)号：US08686560B2

公开(公告)日：2014-04-01

申请号：US12755929

申请日：2010-04-07

申请人： Pirooz Parvarandeh ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

发明人： Pirooz Parvarandeh ,  Reynante Alvarado ,  Chiung C. Lo ,  Arkadii V. Samoilov

IPC分类号： H01L23/488

CPC分类号： H01L24/14 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/11001 ,  H01L2224/11312 ,  H01L2224/1132 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/3512 ,  H01L2224/05552

摘要： Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit board. At least one of the arrays includes bump assemblies that are configured to withstand higher levels of stress than the bump assemblies of the remaining arrays.

摘要翻译： 描述了具有凸块组件的晶片级芯片级封装半导体器件，所述凸块组件被配置为减轻由于应力导致的焊料凸块故障，特别是在热循环测试期间由CTE失配引起的应力，跌落测试期间的动态变形或循环弯曲测试等。 在一个实现中，晶片级芯片级封装器件包括具有两个或更多个凸块组件阵列的集成电路芯片，用于将器件安装到印刷电路板上。 所述阵列中的至少一个包括凸块组件，其被配置为承受比剩余阵列的凸块组件更高的应力水平。

公开(公告)号：US20130341804A1

公开(公告)日：2013-12-26

申请号：US13939725

申请日：2013-07-11

申请人： Tessera, Inc.

发明人： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC分类号： H01L25/00

CPC分类号： H01L25/00 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05186 ,  H01L2224/0519 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/0613 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06505 ,  H01L2224/116 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/276 ,  H01L2224/29023 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/32148 ,  H01L2224/32238 ,  H01L2224/73103 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/8123 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/8323 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/9202 ,  H01L2224/9221 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/35 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05552 ,  H01L2924/00012 ,  H01L2924/00

摘要： Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal layer is deposited overlying the at least one bond pad and the dielectric layer. A second element having a second metal layer deposited thereon is provided, and the first metal layer is joined with the second metal layer. The assembly may be severed along dicing lanes into individual units each including a chip.

摘要翻译： 公开了两种元件的微电子组件及其形成方法。 微电子元件包括主表面和介电层以及在主表面处暴露的至少一个接合焊盘。 微电子元件可以包含多个有源电路元件。 沉积第一金属层，覆盖至少一个接合焊盘和电介质层。 提供了具有沉积在其上的第二金属层的第二元件，并且第一金属层与第二金属层接合。 组件可以沿着切割通道切割成各自包括芯片的单元。

公开(公告)号：US20120326336A1

公开(公告)日：2012-12-27

申请号：US13167906

申请日：2011-06-24

申请人： Yi-Mang CHOU ,  Yian-Liang KUO

发明人： Yi-Mang CHOU ,  Yian-Liang KUO

IPC分类号： H01L23/485

CPC分类号： H01L24/05 ,  H01L24/06 ,  H01L2224/02373 ,  H01L2224/0401 ,  H01L2224/05012 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05555 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/0613 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2924/00012

摘要： A bond pad design comprises a plurality of bond pads on a semiconductor chip and a plurality of under-bump metallurgy (UBM) layers formed on respective bond pads of the plurality. At least one of the bond pads has an elongated shape having an elongated portion and a contracted portion, the elongated portion oriented substantially along a stress direction radiating from a center to the periphery of the chip.

摘要翻译： 接合焊盘设计包括半导体芯片上的多个接合焊盘和形成在多个焊盘上的多个凸点下的冶金（UBM）层。 至少一个接合焊盘具有细长形状，具有细长部分和收缩部分，细长部分基本上沿着从芯片的中心辐射到外围的应力方向取向。

公开(公告)号：US20110278736A1

公开(公告)日：2011-11-17

申请号：US13191318

申请日：2011-07-26

申请人： Yaojian Lin ,  Kang Chen

发明人： Yaojian Lin ,  Kang Chen

IPC分类号： H01L23/522 ,  H01L21/60 ,  H01L21/56

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/04 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/03003 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/0613 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14104 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/24137 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/82005 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/13015 ,  H01L2224/81

摘要： A semiconductor device has a temporary carrier. A semiconductor die is oriented with an active surface toward, and mounted to, the temporary carrier. An encapsulant is deposited with a first surface over the temporary carrier and a second surface, opposite the first surface, is deposited over a backside of the semiconductor die. The temporary carrier is removed. A portion of the encapsulant in a periphery of the semiconductor die is removed to form an opening in the first surface of the encapsulant. An interconnect structure is formed over the active surface of the semiconductor die and extends into the opening in the encapsulant layer. A via is formed and extends from the second surface of the encapsulant to the opening. A first bump is formed in the via and electrically connects to the interconnect structure.

摘要翻译： 半导体器件具有临时载体。 半导体管芯被定向成具有朝着临时载体并且安装到临时载体的有源表面。 密封剂在临时载体上沉积有第一表面，并且与第一表面相对的第二表面沉积在半导体管芯的背面上。 移除临时载体。 去除半导体管芯的周边中的密封剂的一部分，以在密封剂的第一表面中形成开口。 互连结构形成在半导体管芯的有源表面上并延伸到密封剂层中的开口中。 通孔形成并从密封剂的第二表面延伸到开口。 在通孔中形成第一凸起并且电连接到互连结构。

公开(公告)号：US11742295B2

公开(公告)日：2023-08-29

申请号：US17134534

申请日：2020-12-28

申请人： Global Unichip Corporation ,  Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ting-Hao Wang ,  Ting-Chin Cho ,  Igor Elkanovich ,  Amnon Parnass ,  Chia-Hsiang Chang ,  Tsai-Ming Yang ,  Yen-Chung T. Chen ,  Ting-Hsu Chien ,  Yuan-Hung Lin ,  Chao-Ching Huang ,  Li-Ya Tseng ,  Pei Yu ,  Jia-Liang Chen ,  Yen-Wei Chen ,  Chung-Kai Wang ,  Chun-Hsu Chen ,  Yu-Ju Chang ,  Li-Hua Lin ,  Zanyu Yang

IPC分类号： H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L23/5386 ,  H01L24/06 ,  H01L25/0655 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L2224/0613

摘要： An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.

公开(公告)号：US09859204B2

公开(公告)日：2018-01-02

申请号：US15230889

申请日：2016-08-08

申请人： Samsung Electronics Co., Ltd.

发明人： Myeong Soon Park ,  Hyunsoo Chung ,  Won-young Kim ,  Ae-nee Jang ,  Chanho Lee

IPC分类号： H01L23/50 ,  H01L23/00

CPC分类号： H01L23/50 ,  H01L24/02 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/06139 ,  H01L2224/06151 ,  H01L2224/06152 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/06159 ,  H01L2224/0616 ,  H01L2224/06165 ,  H01L2224/06169 ,  H01L2224/06177 ,  H01L2224/06181 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16227 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/0613

摘要： Semiconductor devices with redistribution pads are disclosed. The semiconductor device includes a plurality of electric pads provided on a semiconductor substrate, and a plurality of redistribution pads electrically connected to the electric pads and an outer terminal. The plurality of redistribution pads includes a plurality of first redistribution pads constituting a transmission path for a first electrical signal and at least one second redistribution pad constituting a transmission path for a second electrical signal different from the first electrical signal. The first redistribution pads are arranged on the semiconductor substrate to form at least two rows, and the at least one second redistribution pad is disposed between the at least two rows of the first redistribution pads.

公开(公告)号：US09847324B2

公开(公告)日：2017-12-19

申请号：US14730030

申请日：2015-06-03

申请人： STATS ChipPAC, Ltd.

发明人： Yaojian Lin ,  Kang Chen

IPC分类号： H01L25/00 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552 ,  H01L25/065 ,  H01L25/10 ,  H01L25/07 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/04 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/03003 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/0613 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14104 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/24137 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/82005 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/13015 ,  H01L2224/81

摘要： A semiconductor device has a temporary carrier. A semiconductor die is oriented with an active surface toward, and mounted to, the temporary carrier. An encapsulant is deposited with a first surface over the temporary carrier and a second surface, opposite the first surface, is deposited over a backside of the semiconductor die. The temporary carrier is removed. A portion of the encapsulant in a periphery of the semiconductor die is removed to form an opening in the first surface of the encapsulant. An interconnect structure is formed over the active surface of the semiconductor die and extends into the opening in the encapsulant layer. A via is formed and extends from the second surface of the encapsulant to the opening. A first bump is formed in the via and electrically connects to the interconnect structure.

公开(公告)号：US20170018470A1

公开(公告)日：2017-01-19

申请号：US15280618

申请日：2016-09-29

申请人： Renesas Electronics Corporation

发明人： Bunji YASUMURA ,  Fumio TSUCHIYA ,  Hisanori ITO ,  Takuji IDE ,  Naoki KAWANABE ,  Masanao SATO

IPC分类号： H01L21/66 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC分类号： H01L22/32 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/0613 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85399 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/30107 ,  H01L2924/3512 ,  H01L2924/00

摘要： A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in a protective film over each bonding pad in such a manner that an overlapping width of the protective film in a wire bonding region of each bonding pad becomes wider than an overlapping width of the protective film in a probe region of each bonding pad.

摘要翻译： 提供了能够防止半导体装置的最上层的保护膜的破裂的技术，提高了半导体装置的可靠性。 在半导体芯片的主表面上形成的接合焊盘为矩形，并且在每个接合焊盘上的保护膜中形成开口，使得保护膜在每个接合的引线接合区域中的重叠宽度 衬垫比每个焊盘的探针区域中的保护膜的重叠宽度宽。

公开(公告)号：US09406631B2

公开(公告)日：2016-08-02

申请号：US14800955

申请日：2015-07-16

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Hsien-Wei Chen

IPC分类号： H01L23/00

CPC分类号： H01L24/06 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05552 ,  H01L2224/05555 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/0612 ,  H01L2224/0613 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/06179 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1412 ,  H01L2224/16225 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/2064 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599

摘要： A semiconductor chip includes a first conductive pad, a second conductive pad and a third conductive pad. The semiconductor chip also includes a first under bump metallurgy (UBM) structure, a second UBM structure, and a third UBM structure. The first conductive pad is electrically coupled to a circuit over a substrate, the second conductive pad is over a corner region of the substrate and free from being electrically coupled to the circuit over the substrate. The first conductive pad is closer to a geometric center of the semiconductor chip than the second conductive pad. The third conductive pad is over a region of the substrate between the first conductive pad and the second conductive pad. The third conductive pad has a pad width greater than a pad width of the first conductive pad and less than a pad width of the second conductive pad.

摘要翻译： 半导体芯片包括第一导电焊盘，第二导电焊盘和第三导电焊盘。 该半导体芯片还包括第一下凸块冶金（UBM）结构，第二UBM结构和第三UBM结构。 第一导电焊盘电耦合到衬底上的电路，第二导电焊盘位于衬底的角部区域上，并且不与衬底上的电路电耦合。 第一导电焊盘比第二导电焊盘更靠近半导体芯片的几何中心。 第三导电焊盘在第一导电焊盘和第二导电焊盘之间的衬底的区域之上。 第三导电焊盘的焊盘宽度大于第一导电焊盘的焊盘宽度，并小于第二导电焊盘的焊盘宽度。