公开(公告)号：US09837381B2

公开(公告)日：2017-12-05

申请号：US14870064

申请日：2015-09-30

申请人： INFINEON TECHNOLOGIES AG

发明人： Alexander Heinrich

IPC分类号： H01L21/00 ,  H01L25/065 ,  H01L23/13 ,  H01L23/00 ,  H01L25/00 ,  H01L23/495 ,  H01L21/683 ,  H01L23/482 ,  H01L23/544

CPC分类号： H01L25/0655 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/4827 ,  H01L23/49503 ,  H01L23/49513 ,  H01L23/544 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68354 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/05687 ,  H01L2224/06183 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27334 ,  H01L2224/27436 ,  H01L2224/2908 ,  H01L2224/291 ,  H01L2224/29105 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29116 ,  H01L2224/29118 ,  H01L2224/29124 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/2916 ,  H01L2224/29166 ,  H01L2224/29171 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/75265 ,  H01L2224/75303 ,  H01L2224/75753 ,  H01L2224/7598 ,  H01L2224/83002 ,  H01L2224/83005 ,  H01L2224/83007 ,  H01L2224/83024 ,  H01L2224/83055 ,  H01L2224/83065 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/83091 ,  H01L2224/83092 ,  H01L2224/83101 ,  H01L2224/83127 ,  H01L2224/83132 ,  H01L2224/83143 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83208 ,  H01L2224/83222 ,  H01L2224/83385 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8346 ,  H01L2224/83464 ,  H01L2224/83466 ,  H01L2224/83469 ,  H01L2224/8381 ,  H01L2224/83815 ,  H01L2224/8382 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/83907 ,  H01L2224/83986 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15157 ,  H01L2924/157 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01047 ,  H01L2924/01028 ,  H01L2924/01026 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/01023 ,  H01L2924/01027

摘要： A method of forming a chip assembly may include forming a plurality of cavities in a carrier; The method may further include arranging a die attach liquid in each of the cavities; arranging a plurality of chips on the die attach liquid, each chip comprising a rear side metallization and a rear side interconnect material disposed over the rear side metallization, wherein the rear side interconnect material faces the carrier; evaporating the die attach liquid; and after the evaporating the die attach liquid, fixing the plurality of chips to the carrier.

公开(公告)号：US09818908B2

公开(公告)日：2017-11-14

申请号：US14123638

申请日：2012-05-25

申请人： Hyung Jin Shin ,  Gi Won Hong ,  Young Dae Baek

发明人： Hyung Jin Shin ,  Gi Won Hong ,  Young Dae Baek

IPC分类号： H01L33/00 ,  H01L21/56 ,  H01L23/00 ,  H01L33/54 ,  H01L33/58 ,  H01L21/67

CPC分类号： H01L33/005 ,  H01L21/56 ,  H01L21/565 ,  H01L21/67126 ,  H01L24/97 ,  H01L33/0095 ,  H01L33/54 ,  H01L33/58 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2933/005 ,  H01L2933/0058 ,  H01L2924/00

摘要： Disclosed is an apparatus for forming an encapsulation material for a light emitting device. The apparatus for forming an encapsulation material comprises: an upper mold on which is mounted a substrate having a plurality of optical semiconductors; a lower mold arranged opposite the upper mold; a resin-capture space for capturing a resin between the upper mold and the lower mold; and an ejector pin for dividing the resin-capture space into a plurality of spaces at the position where the encapsulating material is formed, thereby dividing the encapsulation material into a plurality of parts formed on the substrate.

公开(公告)号：US09811709B2

公开(公告)日：2017-11-07

申请号：US15193585

申请日：2016-06-27

申请人： MStar Semiconductor, Inc.

发明人： Ming-Chung Chang ,  Tzu Wei Liu

IPC分类号： H01L23/495 ,  G06K9/00 ,  H01L23/498 ,  H01L23/16

CPC分类号： G06K9/0002 ,  H01L23/16 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/4985 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15321 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

摘要： A capacitive sensor structure includes: a substrate; a multilayer wire structure, disposed on the substrate to form a passive sensing circuit; and a semiconductor chip, formed thereon a control circuit, fixedly mounted on a surface of the substrate and electrically connected to the multilayer wire structure.

公开(公告)号：US09806005B2

公开(公告)日：2017-10-31

申请号：US15304889

申请日：2015-04-14

申请人： KYOCERA Corporation

发明人： Hiroshi Yamada ,  Takuji Okamura ,  Akihiko Funahashi

IPC分类号： H01L23/495 ,  H01L23/043 ,  H01L27/146 ,  H01L23/00

CPC分类号： H01L23/49531 ,  H01L23/043 ,  H01L23/14 ,  H01L23/49541 ,  H01L24/48 ,  H01L24/49 ,  H01L27/14 ,  H01L27/14618 ,  H01L27/14636 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/15151 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/1616 ,  H01L2924/16195 ,  H01L2924/17151 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2924/35121 ,  H05K3/4688 ,  H05K3/4697 ,  H05K2201/10121 ,  H01L2224/45099

摘要： An electronic element mounting substrate includes: a first wiring substrate configured to be a frame defining an interior portion as a first through-hole, the first wiring substrate including a lower surface including an external circuit connection electrode; a metal plate disposed on the lower surface of the first wiring substrate so as to cover an opening of the first through-hole, an outer edge thereof being located between an outer edge of the first wiring substrate and an inner edge of the first wiring substrate, an electronic element mounting portion being disposed in a region of an upper surface of the metal plate which region is surrounded by the first wiring substrate; and a second wiring substrate which is disposed in a peripheral region of the metal plate on the lower surface of the first wiring substrate and is electrically connected to the external circuit connection electrode.

公开(公告)号：US09805972B1

公开(公告)日：2017-10-31

申请号：US15437065

申请日：2017-02-20

申请人： GLOBALFOUNDRIES INC.

发明人： Xunyuan Zhang ,  Sean Xuan Lin ,  James Jay McMahon ,  Shao Beng Law

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/768 ,  H01L21/288 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/76816 ,  H01L21/288 ,  H01L21/76813 ,  H01L21/7685 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2924/14 ,  H01L2924/15787

摘要： The present disclosure relates to semiconductor structures and, more particularly, to skip via structures and methods of manufacture. The structure includes: a first wiring layer with one or more wiring structures; an upper wiring layer with one or more wiring structures, located above the first wiring layer; a blocking material which contacts at least one of the wiring structures of the upper wiring layer; a skip via with metallization, the skip via passes through the upper wiring layer and makes contact with the one or more wiring structures of the first wiring layer; and a conductive material in the skip via above the metallization and in a via interconnect above the blocking material.

公开(公告)号：US09780057B2

公开(公告)日：2017-10-03

申请号：US14503086

申请日：2014-09-30

申请人： STATS ChipPAC, Ltd.

发明人： Rajendra D. Pendse

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/498 ,  H01L23/50 ,  H01L21/768 ,  H01L23/528 ,  H01L23/31

CPC分类号： H01L24/17 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/528 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/09133 ,  H01L2224/09135 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13016 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/17133 ,  H01L2224/27013 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/4816 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device has a semiconductor die with a die pad layout. Signal pads in the die pad layout are located primarily near a perimeter of the semiconductor die, and power pads and ground pads are located primarily inboard from the signal pads. The signal pads are arranged in a peripheral row or in a peripheral array generally parallel to an edge of the semiconductor die. Bumps are formed over the signal pads, power pads, and ground pads. The bumps can have a fusible portion and non-fusible portion. Conductive traces with interconnect sites are formed over a substrate. The bumps are wider than the interconnect sites. The bumps are bonded to the interconnect sites so that the bumps cover a top surface and side surfaces of the interconnect sites. An encapsulant is deposited around the bumps between the semiconductor die and substrate.

公开(公告)号：US09768137B2

公开(公告)日：2017-09-19

申请号：US13460412

申请日：2012-04-30

申请人： Meng-Tse Chen ,  Hsiu-Jen Lin ,  Chih-Wei Lin ,  Cheng-Ting Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Hsiu-Jen Lin ,  Chih-Wei Lin ,  Cheng-Ting Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48 ,  H01L23/367

CPC分类号： H01L24/14 ,  H01L21/4853 ,  H01L23/3677 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/1134 ,  H01L2224/13076 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/15331 ,  H01L2924/15787 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.

公开(公告)号：US09735198B2

公开(公告)日：2017-08-15

申请号：US13834195

申请日：2013-03-15

申请人： Cree, Inc.

发明人： Sung Chul Joo ,  Peter Scott Andrews ,  Erin Welch

IPC分类号： H01L27/15 ,  H01L33/60 ,  H01L33/48 ,  H01L33/50 ,  H01L23/00

CPC分类号： H01L27/15 ,  H01L24/97 ,  H01L33/486 ,  H01L33/505 ,  H01L33/507 ,  H01L33/60 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01322 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/85

摘要： Substrate based light emitter devices, components, and related methods are disclosed. In some aspects, light emitter components can include a substrate and a plurality of light emitter devices provided over the substrate. Each device can include a surface mount device (SMD) adapted to mount over an external substrate or heat sink. In some aspects, each device of the plurality of devices can include at least one LED chip electrically connected to one or more traces and at least one pair of bottom contacts adapted to mount over a surface of external substrate. The component can further include a continuous layer of encapsulant disposed over each device of the plurality of devices. Multiple devices can be singulated from the component.

公开(公告)号：US09721859B2

公开(公告)日：2017-08-01

申请号：US14842535

申请日：2015-09-01

申请人： Texas Instruments Incorporated

发明人： Andy Quang Tran ,  Alok Kumar Lohia ,  Reynaldo Corpuz Javier

IPC分类号： H01L21/50 ,  H01L23/10 ,  H01L23/00 ,  H01L23/055

CPC分类号： H01L23/10 ,  H01L21/50 ,  H01L23/055 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/89 ,  H01L2224/08225 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/1631 ,  H01L2924/16315 ,  H01L2924/1659 ,  H01L2924/1679 ,  H01L2924/18301 ,  H01L2224/45099 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2924/00

摘要： A method of assembling a semi-hermetic semiconductor package includes bonding a semiconductor die having bond pads to a top side of a base region of a package substrate having vertical side walls that are hollow which define an inner open volume (gap) having an adhesive or thermoplastic material therein. There are a plurality of metal terminals providing top terminal contacts on the top side of the base region and bottom terminal contacts on a bottom side or below the base region. The bond pads are coupled to the top terminal contacts. A lid is placed which provides a top for the semiconductor package, where the lid extends to vertically oriented end protrusions so that the protrusions are positioned within the adhesive or thermoplastic material to secure the protrusions within the adhesive or thermoplastic material to provide a seal for the semiconductor package.

公开(公告)号：US09716049B2

公开(公告)日：2017-07-25

申请号：US14813592

申请日：2015-07-30

申请人： Socionext Inc.

发明人： Kazuyuki Urago ,  Nobutaka Shimizu

IPC分类号： H01L23/053 ,  H01L23/498 ,  H01L21/52 ,  H01L23/04 ,  H01L23/10 ,  H01L23/552 ,  H01L23/00

CPC分类号： H01L23/053 ,  H01L21/52 ,  H01L23/04 ,  H01L23/10 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/92125 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/16153 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/1631 ,  H01L2924/16315 ,  H01L2924/1659 ,  H01L2924/16724 ,  H01L2924/16747 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00

摘要： A semiconductor device includes: a substrate; a semiconductor element disposed on the substrate; a plurality of electrodes disposed on the substrate separately from one another and arranged so as to surround the semiconductor element in a plan view; a lid that cover the semiconductor element, the lid including an inner portion and a periphery portion that is outer than the inner portion in a plan view, the lid including a plurality of first protruding members that is provided separately from one another, the first protruding members being disposed in the inner portion; and conductive members disposed between the plurality of electrodes and the plurality of protruding members disposed in positions opposed to the plurality of electrodes respectively, the conductive members being joined to the plurality of electrodes and the plurality of protruding members respectively.