Abstract:
Disclosed herein are a light emitting device package, a backlight unit, an illumination apparatus, and a method of manufacturing a light emitting device package capable of being used for a display application or an illumination application. The light emitting device package includes: a flip-chip type light emitting device having a first terminal and a second terminal installed therebeneath; a substrate having a first electrode formed at one side of an electrode separating space and a second electrode formed at the other side thereof; a first conductive bonding member installed on the first electrode of the substrate so as to be electrically connected to the first terminal of the light emitting device; a second conductive bonding member installed on the second electrode of the substrate so as to be electrically connected to the second terminal of the light emitting device; a reflection encapsulant molded and installed on the substrate so as to form a reflection cup part reflecting light generated in the light emitting device and filled in the electrode separating space to form an electrode separating part; and a filler filled between the reflection cup part and the first and second conductive bonding members.
Abstract:
A power semiconductor module includes a wiring member that electrically connects a front surface electrode of a semiconductor element and a circuit board of an insulating substrate in a housing. A resin provided in the housing covers the wiring member, and has a height in the vicinity of the wiring member. A cover covering the periphery of external terminals is provided between the resin and a first lid in the housing. A second lid is provided further outside the first lid in an aperture portion of the housing, and the space between the second lid and the first lid is filled with another resin.
Abstract:
A semiconductor device comprises a substrate, a patterned conductive layer, a first transistor structure and a second transistor structure. The patterned conductive layer is formed on the substrate. The first transistor structure includes a first source, a first gate and a first drain and is electrically connected to the patterned conductive layer by flip-chip bonding. The second transistor structure includes a second source, a second gate and a second drain and is electrically connected to the patterned conductive layer by flip-chip bonding. The first gate is electrically connected to the second source through the patterned conductive layer, and the first source is electrically connected to the second drain through the patterned conductive layer.
Abstract:
The present invention can give a joining structure using metal nanoparticles to join the same types or different types of metal where when one surface metal is Al based, the parts are joined through a joining layer containing Ni nanoparticles, whereby a good joining strength is obtained. Further, by using two joining layers (6, 8) including metal nanoparticles to sandwich metal foil (7) so as to form a joining layer and joining the same type or different types of surface metals (3-4) through this joining layer, it is possible to ease the thermal stress due to the difference in amounts of thermal expansion of joined members which have two surface metals.
Abstract:
A semiconductor device includes a semiconductor layer, a first conductor film, a second conductor film, and a first protective film. The semiconductor layer has a semiconductor element. The first conductor film is formed on an upper surface of the semiconductor layer and is electrically. connected to the semiconductor element. The second conductor film is formed on an outer side surface of the semiconductor layer and is electrically connected to the semiconductor element. The first protective film is formed on the first conductor film and has an opening to expose the first conductor film. A height from the upper surface of the semiconductor layer to an upper surface of the second conductor film is equal to or smaller than a height from the upper surface of the semiconductor layer to an upper surface of the first conductor film.
Abstract:
Provided is a method of mounting a chip. The method includes: forming a bump at one surface of a cavity formed concavely in an inner direction of a substrate; performing a coining process to flatten a surface of the bump; coating a solder material on the bump subjected to the coining process; and bonding a chip and the bump by melting the solder material, wherein an electrode portion or a metal portion is formed on a bottom of the chip. For a metal substrate according to the present invention, wherein a vertical insulating layer is included, since the electrode portion of the chip and the electrode portion of the substrate have to be electrically connected, the metal substrate is bonded to the electrode portion of the chip using the bump additionally formed on the metal substrate, so the heat generated in the chip can be rapidly transferred to the substrate, and the junction temperature of the chip can be decreased, thereby enhancing the light efficiency and the. In addition, cracking due to the difference of thermal expansion coefficient between solder materials can be prevented by sealing the bonding portion of the chip using the solder materials. Further, since oxidation of the bonding portion is prevented by blocking the contact with the outside, the chip packaging process can be performed without an additional process of filling an inert gas into the internal space wherein the chip is mounted.
Abstract:
An image sensor package includes a crystalline handler having opposing first and second surfaces, and a cavity formed into the first surface. At least one step extends from a sidewall of the cavity, wherein the cavity terminates in an aperture at the second surface. A cover is mounted to the second surface and extends over and covers the aperture. The cover is optically transparent to at least one range of light wavelengths. A sensor chip is disposed in the cavity and mounted to the at least one step. The sensor chip includes a substrate with front and back opposing surfaces, a plurality of photo detectors formed at the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors.
Abstract:
A manufacturing method of a package carrier is provided. A supporting board having an upper surface which a patterned circuit layer formed thereon is provided. A portion of the upper surface is exposed by the patterned circuit layer. An insulating layer and a conducting layer located at a first surface of the insulating layer are laminated onto the patterned circuit layer. The patterned circuit layer and the exposed portion of the upper surface are covered by the insulating layer. Plural conductive connection structures are formed on the patterned circuit layer. Plural of pads respectively connecting the conductive connection structures and exposing a portion of the first surface of the insulating layer is defined by patterning the conductive layer. The supporting board is removed so as to expose a second surface of the insulating layer. The second surface and a bonding surface of the patterned circuit layer are coplanar.
Abstract:
A flexible display panel and method of formation with a sacrificial release layer are described. The method of manufacturing a flexible display system includes forming a sacrificial layer on a carrier substrate. A flexible display substrate is formed on the sacrificial layer, with a plurality of release openings that extend through the flexible display substrate to the sacrificial layer. An array of LEDs and a plurality of microchips are transferred onto the flexible display substrate to form a flexible display panel. The sacrificial layer is selectively removed such that the flexible display panel attaches to the carrier substrate by a plurality of support posts. The flexible display panel is removed from the carrier substrate and is electrically coupled with display components to form a flexible display system.
Abstract:
In accordance with certain embodiments, semiconductor dies are at least partially coated with a conductive adhesive prior to singulation and subsequently bonded to a substrate having electrical traces thereon.