公开(公告)号：US09576927B2

公开(公告)日：2017-02-21

申请号：US14731431

申请日：2015-06-05

Applicant: SHINKAWA LTD.

Inventor： Osamu Kakutani ,  Takatoshi Kawamura ,  Kohei Seyama ,  Akira Sato

IPC: B29C65/00 ,  B32B37/08 ,  B32B43/00 ,  F16K49/00 ,  F16L53/00 ,  H01L23/00 ,  B32B37/06 ,  B29C65/44 ,  B29C65/18 ,  B29K701/10 ,  B29L31/34 ,  B32B37/10

CPC classification number: H01L24/75 ,  B29C65/18 ,  B29C65/44 ,  B29K2701/10 ,  B29L2031/3406 ,  B32B37/06 ,  B32B37/08 ,  B32B37/10 ,  B32B2307/202 ,  B32B2457/14 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/755 ,  H01L2224/75501 ,  H01L2224/75744 ,  H01L2224/75802 ,  H01L2224/75803 ,  H01L2224/75824 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2924/00012

Abstract: A bonding tool cooling apparatus (10) provided in the vicinity of a bonding stage, including a frame (12); a cooling member (16) including a ground plate (14) having a ground surface (14a) on which a front edge surface of a bonding tool (61) is grounded, and a heat radiation fin (15) attached to an opposite surface of the ground plate (14) to the ground surface (14a), wherein the cooling member (16) is supported on the frame (12) by a support mechanism (200) so that the cooling member (16) is rotatable about two axes, i.e., an X axis extending along the ground surface (14a) and a Y axis extending along the ground surface (14a). Bonding tool cooling time can be thereby reduced.

Abstract translation: 一种焊接工具冷却装置（10），设置在包括框架（12）的接合台附近; 包括接地板（14）的冷却构件（16），所述接地板（14）具有接地工具（61）的前边缘表面接地的接地表面（14a），和散热片（15） 所述接地板（14）到达所述地面（14a），其中所述冷却构件（16）通过支撑机构（200）支撑在所述框架（12）上，使得所述冷却构件（16）能够围绕两个轴线旋转， 即沿着地面（14a）延伸的X轴和沿地面（14a）延伸的Y轴。 粘合工具的冷却时间可以降低。

公开(公告)号：US20160365267A1

公开(公告)日：2016-12-15

申请号：US15247947

申请日：2016-08-26

Applicant: SHINKAWA LTD.

Inventor： OSAMU KAKUTANI ,  TAITO KOBAYASHI ,  YASUSHI SATO

IPC: H01L21/677 ,  H01L21/687

CPC classification number: H01L21/67703 ,  H01L21/67721 ,  H01L21/68785 ,  H01L24/16 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/75901 ,  H01L2224/7598 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83

Abstract: A bonding apparatus, which includes: an intermediate stage; a transfer unit configured to transfer a semiconductor chip and to place the semiconductor chip on the intermediate stage; and a first bonding unit and a second bonding unit each configured to pick up the semiconductor chip from the intermediate stage, and to bond the semiconductor chip to a circuit substrate. The intermediate stage moves between a first position and a second position. The first position is a position at which the first bonding unit is allowed to pick up the semiconductor chip, and the second position is a position at which the second bonding unit is allowed to pick up the semiconductor chip. With this, it is possible to provide a bonding apparatus capable of reducing processing time per circuit substrate and suppressing an increase of a space, as well as such a bonding method.

Abstract translation: 一种接合装置，包括：中间台; 传送单元，被配置为传送半导体芯片并将半导体芯片放置在中间台上; 以及第一接合单元和第二接合单元，每个配置用于从中间层拾取半导体芯片，并将半导体芯片接合到电路基板。 中间台在第一位置和第二位置之间移动。 第一位置是允许第一接合单元拾取半导体芯片的位置，第二位置是允许第二接合单元拾取半导体芯片的位置。 由此，能够提供能够减少每个电路基板的处理时间并抑制空间增加的接合装置，以及这种接合方法。

公开(公告)号：US20140102616A1

公开(公告)日：2014-04-17

申请号：US13677478

申请日：2012-11-15

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Weng-Jung LU ,  Wen-Hsien WU ,  Chun-Hsien SU

IPC: H05K13/04

CPC classification number: H05K13/046 ,  H01L24/29 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/29101 ,  H01L2224/75251 ,  H01L2224/755 ,  H01L2224/75802 ,  H01L2224/759 ,  H01L2224/83048 ,  H01L2224/83097 ,  H01L2224/83098 ,  H01L2224/83123 ,  H01L2224/83908 ,  H01L2224/83948 ,  H01L2924/12041 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A method of die bonding, the method has steps of: heating a substrate to a predetermined temperature; sucking at least one die, the at least one die with a base temperature, the base temperature being less than the predetermined temperature; the at least one die bonding on the substrate; cooling the substrate with the bonded die; and moving the substrate with the bonded die to a loading and unloading position, heating another substrate to a predetermined temperature, and repeating the said steps.

Abstract translation: 一种芯片接合方法，该方法具有以下步骤：将基板加热到预定温度; 吸入至少一个模具，所述至少一个模具具有基底温度，所述基底温度小于所述预定温度; 所述至少一个管芯接合在所述衬底上; 用粘合的模头冷却衬底; 以及将所述基板与所述接合的模具移动到装载和卸载位置，将另一基板加热至预定温度，并重复所述步骤。

公开(公告)号：US11658146B2

公开(公告)日：2023-05-23

申请号：US17374156

申请日：2021-07-13

Applicant: Tokyo Electron Limited

Inventor： Takashi Nakamitsu ,  Shuhei Matsumoto ,  Toshifumi Inamasu

IPC: H01L23/00 ,  H01L21/67 ,  H01L21/68 ,  H01L21/02 ,  B23K20/00 ,  H01L21/683

CPC classification number: H01L24/75 ,  B23K20/00 ,  H01L21/02 ,  H01L21/67207 ,  H01L21/68 ,  H01L21/683 ,  H01L24/94 ,  H01L2224/759 ,  H01L2224/75744 ,  H01L2224/75802

Abstract: A bonding apparatus configured to bond substrates includes a first holder configured to vacuum-exhaust a first substrate to attract and hold the first substrate on a bottom surface thereof; a second holder disposed under the first holder and configured to vacuum-exhaust a second substrate to attract and hold the second substrate on a top surface thereof; a rotator configured to rotate the first holder and the second holder relatively; a moving device configured to move the first holder and the second holder relatively in a horizontal direction; three position measurement devices disposed at the first holder or the second holder rotated by the rotator and configured to measure a position of the first holder or the second holder; and a controller configured to control the rotator and the moving device based on measurement results of the three position measurement devices.

公开(公告)号：US09120169B2

公开(公告)日：2015-09-01

申请号：US13128141

申请日：2009-11-09

Applicant: Hwee Seng Chew ,  Chee Kian Ong ,  Kian Hock Lim ,  Amlan Sen ,  Shoa Siong Lim

Inventor： Hwee Seng Chew ,  Chee Kian Ong ,  Kian Hock Lim ,  Amlan Sen ,  Shoa Siong Lim

IPC: H01L21/66 ,  B23K1/00 ,  B23K1/20 ,  H01L21/683 ,  H01L21/687 ,  H01L23/00

CPC classification number: B23K1/0016 ,  B23K1/203 ,  B23K2101/40 ,  H01L21/683 ,  H01L21/6838 ,  H01L21/68707 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68354 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/7515 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/755 ,  H01L2224/75501 ,  H01L2224/7565 ,  H01L2224/757 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/81024 ,  H01L2224/81048 ,  H01L2224/81121 ,  H01L2224/8115 ,  H01L2224/8116 ,  H01L2224/8117 ,  H01L2224/8118 ,  H01L2224/81191 ,  H01L2224/81204 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3511 ,  H01L2924/381 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for fabricating a flip-chip semiconductor package. The method comprises processing a semiconductor device, for example a semiconductor chip and processing a device carrier, for example a substrate. The semiconductor device comprises bump structures formed on a surface thereof. The substrate comprises bond pads formed on a surface thereof. Processing of the semiconductor chip results in heating of the semiconductor chip to a chip process temperature. The chip process temperature melts solder portions on the bump structures Processing of the substrate results in heating of the substrate to a substrate process temperature. The method comprises spatially aligning the semiconductor chip in relation to the substrate to correspondingly align the bump structures in relation to the bump pads. The semiconductor chip is then displaced towards the substrate for abutting the bump structures of the semiconductor chip with the bond pads of the substrate to thereby form bonds therebetween. A system for performing the above method is also disclosed.

Abstract translation: 一种用于制造倒装芯片半导体封装的方法。 该方法包括处理半导体器件，例如半导体芯片和处理器件载体，例如衬底。 半导体器件包括在其表面上形成的凸块结构。 衬底包括形成在其表面上的接合焊盘。 半导体芯片的处理导致半导体芯片的加热达到芯片工艺温度。 芯片工艺温度熔化凸块结构上的焊料部分衬底的加工导致衬底加热到​​衬底工艺温度。 该方法包括相对于衬底空间对准半导体芯片，以相对于凸块焊盘对准对准凸块结构。 然后半导体芯片朝向衬底移位，以使半导体芯片的凸块结构与衬底的接合焊盘邻接，从而在衬底之间形成结合。 还公开了用于执行上述方法的系统。

公开(公告)号：US20150048523A1

公开(公告)日：2015-02-19

申请号：US14397038

申请日：2013-04-24

Applicant: Tadatomo SUGA ,  BONDTECH CO., LTD.

Inventor： Tadatomo Suga ,  Akira Yamauchi

IPC: H01L25/065 ,  B23K31/02 ,  H01L21/66 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  B23K37/04 ,  B23K37/00

CPC classification number: H01L25/0652 ,  B23K31/02 ,  B23K37/00 ,  B23K37/0408 ,  B23K2101/40 ,  H01L21/6836 ,  H01L22/10 ,  H01L23/10 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/74 ,  H01L24/742 ,  H01L24/743 ,  H01L24/75 ,  H01L24/80 ,  H01L24/81 ,  H01L24/83 ,  H01L24/94 ,  H01L24/95 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0384 ,  H01L2224/03845 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06134 ,  H01L2224/0615 ,  H01L2224/06177 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/09181 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/13009 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14134 ,  H01L2224/1415 ,  H01L2224/14177 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/27009 ,  H01L2224/2755 ,  H01L2224/27823 ,  H01L2224/2784 ,  H01L2224/27845 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73103 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75101 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75283 ,  H01L2224/753 ,  H01L2224/75301 ,  H01L2224/7531 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/7565 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/75842 ,  H01L2224/7598 ,  H01L2224/80003 ,  H01L2224/8001 ,  H01L2224/80013 ,  H01L2224/80065 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80143 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/8022 ,  H01L2224/8023 ,  H01L2224/80447 ,  H01L2224/8083 ,  H01L2224/80907 ,  H01L2224/81002 ,  H01L2224/8101 ,  H01L2224/81013 ,  H01L2224/81065 ,  H01L2224/8113 ,  H01L2224/81132 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/8122 ,  H01L2224/8123 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/81805 ,  H01L2224/8183 ,  H01L2224/81907 ,  H01L2224/83002 ,  H01L2224/8301 ,  H01L2224/83013 ,  H01L2224/83048 ,  H01L2224/83051 ,  H01L2224/83065 ,  H01L2224/83091 ,  H01L2224/8313 ,  H01L2224/83132 ,  H01L2224/83136 ,  H01L2224/83143 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/8322 ,  H01L2224/8323 ,  H01L2224/83234 ,  H01L2224/83355 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/8383 ,  H01L2224/83894 ,  H01L2224/83907 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01322 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2224/80 ,  H01L2224/83 ,  H01L2924/00

Abstract: [Problem] Provided is a technique for bonding chips efficiently onto a wafer to establish an electrical connection and raise mechanical strength between the chips and the wafer or between the chips that are chips laminated onto each other in the state that resin and other undesired residues do not remain on a bond interface therebetween.[Solution] A method for bonding plural chips each having a chip-side-bond-surface having metal regions to a substrate having plural bond portions has the step (S1) of subjecting the metal regions of the chip-side-bond-surface to surface activating treatment and hydrophilizing treatment; the step (S2) of subjecting the bond portions of the substrate to surface activating treatment and hydrophilizing treatment; the step (S3) of fitting the chips subjected to the surface activating treatment and the hydrophilizing treatment onto the corresponding bond portions of the substrate subjected to the surface activating treatment and the hydrophilizing treatment to bring the metal regions of the chips into contact with the bond portions of the substrate; and the step (S4) of heating the resultant structure, which includes the substrate, and the chips fitted onto the substrate.

Abstract translation: [问题]提供了一种将芯片有效地接合到晶片上以建立电连接并提高芯片和晶片之间或芯片之间的机械强度的技术，该芯片是在树脂和其它不期望的残留物的状态下彼此层压的芯片 不保留在它们之间的结合界面上。 [解决方案]将具有金属区域的具有芯片侧接合面的多个芯片接合到具有多个结合部的基板的方法具有将芯片侧接合面的金属区域 表面活化处理和亲水处理; 对所述基板的所述接合部进行表面活化处理和亲水化处理的工序（S2） 将经过表面活化处理和亲水化处理的芯片装配到经过表面活化处理的基板的相应接合部分和亲水化处理上以使芯片的金属区域与键接触的步骤（S3） 基板的一部分; 以及加热包括基板的所得结构和安装在基板上的芯片的步骤（S4）。

公开(公告)号：US20150044786A1

公开(公告)日：2015-02-12

申请号：US13963741

申请日：2013-08-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Xin-Hua Huang ,  Xiaomeng Chen ,  Ping-Yin Liu ,  Lan-Lin Chao

IPC: H01L21/66 ,  H01L23/00 ,  H01L21/67

CPC classification number: H01L24/94 ,  H01L21/67092 ,  H01L21/681 ,  H01L24/08 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/08145 ,  H01L2224/74 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/753 ,  H01L2224/75702 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80019 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80986 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00015 ,  H01L2224/80121 ,  H01L2924/00

Abstract: Alignment systems, and wafer bonding alignment systems and methods are disclosed. In some embodiments, an alignment system for a wafer bonding system includes means for monitoring an alignment of a first wafer and a second wafer, and means for adjusting a position of the second wafer. The alignment system includes means for feeding back a relative position of the first wafer and the second wafer to the means for adjusting the position of the second wafer before and during a bonding process for the first wafer and the second wafer.

Abstract translation: 对准系统和晶片接合对准系统和方法被公开。 在一些实施例中，用于晶片接合系统的对准系统包括用于监测第一晶片和第二晶片的对准的装置，以及用于调整第二晶片的位置的装置。 对准系统包括用于将第一晶片和第二晶片的相对位置反馈到用于调整第一晶片和第二晶片的接合工艺之前和期间的第二晶片的位置的装置的装置。

公开(公告)号：US20160155721A1

公开(公告)日：2016-06-02

申请号：US14950281

申请日：2015-11-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Kenji SUGAKAWA ,  Yuji MIMURA ,  Shuhei MATSUMOTO ,  Takahiro MASUNAGA ,  Makoto TSUKISHIMA

IPC: H01L23/00 ,  H01L21/67 ,  H01L21/66

CPC classification number: H01L21/67248 ,  H01L21/67092 ,  H01L21/681 ,  H01L21/8221 ,  H01L22/12 ,  H01L22/20 ,  H01L24/08 ,  H01L24/75 ,  H01L24/80 ,  H01L24/94 ,  H01L2224/08145 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/75601 ,  H01L2224/7565 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75823 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/75981 ,  H01L2224/80003 ,  H01L2224/80013 ,  H01L2224/80048 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80894 ,  H01L2224/80908 ,  H01L2224/83201 ,  H01L2224/94 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/00014

Abstract: There is provided a method of bonding substrates to each other, which includes: holding a first substrate on a lower surface of a first holding part; adjusting a temperature of a second substrate by a temperature adjusting part to become higher than a temperature of the first substrate; holding the second substrate on an upper surface of a second holding part; inspecting a state of the second substrate by imaging a plurality of reference points of the second substrate with a first imaging part, measuring positions of the reference points, and comparing a measurement result with a predetermined permissible range; and pressing a central portion of the first substrate with a pressing member, bringing the central portion of the first substrate into contact with a central portion of the second substrate, and sequentially bonding the first substrate and the second substrate.

Abstract translation: 提供了将基板彼此接合的方法，其包括：将第一基板保持在第一保持部的下表面上; 通过温度调节部分调节第二基板的温度以变得高于第一基板的温度; 将第二基板保持在第二保持部的上表面上; 通过用第一成像部分对第二基板的多个参考点进行成像来检查第二基板的状态，测量参考点的位置，并将测量结果与预定的允许范围进行比较; 并且用按压部件按压所述第一基板的中央部，使所述第一基板的中央部与所述第二基板的中央部接触，并顺序地接合所述第一基板和所述第二基板。

公开(公告)号：US20160081241A1

公开(公告)日：2016-03-17

申请号：US14948385

申请日：2015-11-23

Applicant: SHINKAWA LTD.

Inventor： KOHEI SEYAMA

IPC: H05K13/04 ,  H05K3/30

CPC classification number: H05K13/04 ,  H01L21/67144 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27318 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75501 ,  H01L2224/75611 ,  H01L2224/7565 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75734 ,  H01L2224/75744 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75824 ,  H01L2224/7598 ,  H01L2224/81 ,  H01L2224/81048 ,  H01L2224/81815 ,  H01L2224/83048 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/83948 ,  H01L2224/83986 ,  H01L2224/9211 ,  H01L2224/97 ,  H05K3/30 ,  H05K2203/1105 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/83

Abstract: Provided is a flip chip mounting apparatus for mounting chips (400) to a substrate (200), and the apparatus includes at least one sectionalized mounting stage (45) divided into a heating section (452) and a non-heating section (456), the heating section being for heating a substrate (200) fixed to a front surface of the heating section, the non-heating section not heating the substrate (200) suctioned to a front surface of the non-heating section. With this, it is possible to provide an electronic-component mounting apparatus that is simple and capable of efficiently mounting a large number of electronic components.

Abstract translation: 提供了一种用于将芯片（400）安装到基板（200）的倒装芯片安装装置，并且该装置包括分为加热部分（452）和非加热部分（456）的至少一个分段安装台（45） 所述加热部用于加热固定在所述加热部的前表面的基板（200），所述非加热部不加热被吸附到所述非加热部的前表面的基板（200）。 由此，能够提供简单且能够有效地安装大量电子部件的电子部件安装装置。

公开(公告)号：US20150034702A1

公开(公告)日：2015-02-05

申请号：US13987511

申请日：2013-08-01

Applicant: Semigear Inc

Inventor： Jian Zhang

IPC: H01L23/00

CPC classification number: H01L24/742 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/67207 ,  H01L24/03 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/7501 ,  H01L2224/751 ,  H01L2224/75101 ,  H01L2224/75272 ,  H01L2224/75744 ,  H01L2224/75802 ,  H01L2224/7598 ,  H01L2224/8101 ,  H01L2224/81011 ,  H01L2224/81048 ,  H01L2224/81815 ,  H01L2224/81948 ,  H01L2224/81986

Abstract: Provided are a semiconductor substrate manufacturing apparatus and a substrate treating method, and more particularly, an apparatus and method for performing a reflow treating process on a semiconductor wafer. The apparatus treating apparatus includes a load port on which a carrier accommodating a substrate is seated, a substrate treating module including one process chamber or a plurality of process chambers having a treating space in which a reflow process with respect to the substrate is performed, a cleaning unit cleaning the substrate, and a substrate transfer module disposed between the load port and the substrate treating module. The substrate transfer module includes a transfer robot transferring the substrate among the load port, the substrate treating module, and the cleaning unit.

Abstract translation: 提供一种半导体衬底制造装置和衬底处理方法，更具体地，涉及一种在半导体晶片上进行回流处理工艺的装置和方法。 该装置处理装置包括载置容纳基板的载体的载荷端口，具有一个处理室的基板处理模块或具有相对于基板进行回流处理的处理空间的多个处理室， 清洁单元清洁基板，以及设置在负载端口和基板处理模块之间的基板转移模块。 基板转印模块包括在载体端口，基板处理模块和清洁单元之间传送基板的传送机器人。