公开(公告)号：US20150014688A1

公开(公告)日：2015-01-15

申请号：US14500858

申请日：2014-09-29

Applicant: Invensas Corporation

Inventor： Charles G. Woychik ,  Se Young Yang ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/66 ,  H01L23/00

CPC classification number: H01L22/32 ,  G01R31/2886 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/11015 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/16111 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/16257 ,  H01L2224/16267 ,  H01L2224/16503 ,  H01L2224/17051 ,  H01L2224/8109 ,  H01L2224/81138 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/12 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A method of attaching a microelectronic element to a substrate can include aligning the substrate with a microelectronic element, the microelectronic element having a plurality of spaced-apart electrically conductive bumps each including a bond metal, and reflowing the bumps. The bumps can be exposed at a front surface of the microelectronic element. The substrate can have a plurality of spaced-apart recesses extending from a first surface thereof. The recesses can each have at least a portion of one or more inner surfaces that are non-wettable by the bond metal of which the bumps are formed. The reflowing of the bumps can be performed so that at least some of the bond metal of each bump liquefies and flows at least partially into one of the recesses and solidifies therein such that the reflowed bond material in at least some of the recesses mechanically engages the substrate.

Abstract translation: 将微电子元件附接到衬底的方法可以包括将衬底与微电子元件对准，微电子元件具有多个间隔开的导电凸块，每个包括接合金属，并且回流凸块。 凸起可以暴露在微电子元件的前表面处。 衬底可以具有从其第一表面延伸的多个间隔开的凹部。 这些凹部各自可以具有一个或多个内表面的至少一部分，该内表面不被其形成凸起的粘结金属润湿。 可以进行凸块的回流，使得每个凸块的至少一些粘结金属液化并且至少部分地流入其中一个凹部并在其中固化，使得至少一些凹部中的回流焊接材料机械地接合 基质。

公开(公告)号：US20150008593A1

公开(公告)日：2015-01-08

申请号：US14491520

申请日：2014-09-19

Applicant: OLYMPUS CORPORATION

Inventor： Yoshiaki Takemoto ,  Naohiro Takazawa ,  Hiroshi Kikuchi

IPC: H01L23/00 ,  H01L21/56

CPC classification number: H01L24/32 ,  H01L21/56 ,  H01L21/561 ,  H01L23/10 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13023 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16148 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/29011 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29023 ,  H01L2224/29076 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32148 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/753 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/83075 ,  H01L2224/8309 ,  H01L2224/831 ,  H01L2224/83104 ,  H01L2224/83191 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/8388 ,  H01L2224/83906 ,  H01L2224/83986 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/10253 ,  H01L2924/163 ,  H01L2924/186 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012

Abstract: A stacked semiconductor device includes a first substrate and a second substrate. The first electrode is connected to the second electrode so that the first surface faces the second surface. A tip portion of the first wall section that faces the second substrate is connected to a tip portion of the second wall section that faces the first substrate. The first wall section is connected to the second wall section over an entire circumference. An outside space that is formed in an outside of the first wall section and an outside of the second wall section between the first substrate and the second substrate is filled with a sealing member over the entire circumference.

Abstract translation: 叠层半导体器件包括第一衬底和第二衬底。 第一电极连接到第二电极，使得第一表面面向第二表面。 所述第一壁部的面向所述第二基板的前端部与所述第二壁部的与所述第一基板相对的前端部连接。 第一壁部分在整个圆周上连接到第二壁部分。 形成在第一壁部的外侧的外部空间和第一基板与第二基板之间的第二壁部的外部在整个圆周上填充有密封部件。

公开(公告)号：US08922027B2

公开(公告)日：2014-12-30

申请号：US13671970

申请日：2012-11-08

Applicant: Fujitsu Limited

Inventor： Taiji Sakai ,  Nobuhiro Imaizumi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/12 ,  H01L23/00 ,  H01L23/488 ,  G21K5/02 ,  H01L21/67 ,  H01L21/762

CPC classification number: H01L21/76254 ,  B23K20/026 ,  B23K20/24 ,  B23K20/26 ,  B23K2101/42 ,  G21K5/02 ,  H01L21/2686 ,  H01L21/32134 ,  H01L21/67017 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/67115 ,  H01L21/67144 ,  H01L23/488 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/11462 ,  H01L2224/118 ,  H01L2224/1182 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16501 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/757 ,  H01L2224/7598 ,  H01L2224/81002 ,  H01L2224/8101 ,  H01L2224/81013 ,  H01L2224/81014 ,  H01L2224/8102 ,  H01L2224/81031 ,  H01L2224/81047 ,  H01L2224/81054 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8122 ,  H01L2224/818 ,  H01L2224/8183 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/20105 ,  H01L2924/20108 ,  H01L2924/2021 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83

Abstract: According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the first electrode and a second electrode of a second electronic component by heating and pressing the first electrode and the second electrode each other.

Abstract translation: 根据本发明，提供了一种制造电子器件的方法，其包括将第一电子部件的第一电极的顶表面暴露于有机酸，用紫外线照射暴露于有机酸的第一电极的顶表面 并且通过对所述第一电极和所述第二电极进行加热和加压而将所述第一电极和第二电子部件的第二电极接合。

公开(公告)号：US20140342504A1

公开(公告)日：2014-11-20

申请号：US14452754

申请日：2014-08-06

Applicant: FUJITSU LIMITED

Inventor： Taiji SAKAI ,  Nobuhiro IMAIZUMI

IPC: H01L23/00 ,  G21K5/02 ,  H01L21/3213 ,  H01L21/268 ,  H01L21/67

CPC classification number: H01L21/76254 ,  B23K20/026 ,  B23K20/24 ,  B23K20/26 ,  B23K2101/42 ,  G21K5/02 ,  H01L21/2686 ,  H01L21/32134 ,  H01L21/67017 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/67115 ,  H01L21/67144 ,  H01L23/488 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L2224/11462 ,  H01L2224/118 ,  H01L2224/1182 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16501 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/75251 ,  H01L2224/757 ,  H01L2224/7598 ,  H01L2224/81002 ,  H01L2224/8101 ,  H01L2224/81013 ,  H01L2224/81014 ,  H01L2224/8102 ,  H01L2224/81031 ,  H01L2224/81047 ,  H01L2224/81054 ,  H01L2224/81075 ,  H01L2224/8109 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/8122 ,  H01L2224/818 ,  H01L2224/8183 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/20105 ,  H01L2924/20108 ,  H01L2924/2021 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83

Abstract: According to this disclosure, a method of manufacturing an electronic device is provided, which includes exposing a top surface of a first electrode of a first electronic component to organic acid, irradiating the top surface of the first electrode exposed to the organic acid with ultraviolet light, and bonding the first electrode and a second electrode of a second electronic component by heating and pressing the first electrode and the second electrode each other.

Abstract translation: 根据本发明，提供了一种制造电子器件的方法，其包括将第一电子部件的第一电极的顶表面暴露于有机酸，用紫外线照射暴露于有机酸的第一电极的顶表面 并且通过对所述第一电极和所述第二电极进行加热和加压而将所述第一电极和第二电子部件的第二电极接合。

公开(公告)号：US08274161B2

公开(公告)日：2012-09-25

申请号：US12930462

申请日：2011-01-07

Applicant: Jian Zhang ,  Chunghsin Lee

Inventor： Jian Zhang ,  Chunghsin Lee

IPC: H01L23/48

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K1/008 ,  B23K2101/42 ,  H01L24/75 ,  H01L2224/81054 ,  H01L2224/81065 ,  H01L2224/8109 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81211 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A linear, serial chip/substrate assembly processing machine for stepwise advancing a pre-assembled chip/die substrate on a support plate through a series of sealable chambers beginning at a loading station and ending up at an unloading station after various melting and vacuuming of chip/substrate components has been stepwise indexed through those various chambers to the final joining thereof.

Abstract translation: 一种线性，串行芯片/基板组装处理机，用于通过一系列可在密封室开始的可密封室逐步推进预组装的芯片/模具基板，并且在各种熔融和抽真空之后在卸载站处结束 /基板部件已经通过这些不同的室逐步分度到其最终连接。

公开(公告)号：US20110215483A1

公开(公告)日：2011-09-08

申请号：US12930462

申请日：2011-01-07

Applicant: Jian Zhang ,  Chunghsin Lee

Inventor： Jian Zhang ,  Chunghsin Lee

IPC: H01L23/488 ,  B23K31/02

CPC classification number: H01L24/81 ,  B23K1/0016 ,  B23K1/008 ,  B23K2101/42 ,  H01L24/75 ,  H01L2224/81054 ,  H01L2224/81065 ,  H01L2224/8109 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/81205 ,  H01L2224/81211 ,  H01L2224/81815 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A linear, serial chip/substrate assembly processing machine for stepwise advancing a pre-assembled chip/die substrate on a support plate through a series of sealable chambers beginning at a loading station and ending up at an unloading station after various melting and vacuuming of chip/substrate components has been stepwise indexed through those various chambers to the final joining thereof.

Abstract translation: 一种线性，串行芯片/基板组装处理机，用于通过一系列可在密封室开始的可密封室逐步推进预组装的芯片/模具基板，并且在各种熔融和抽真空之后在卸载站处结束 /基板部件已经通过这些不同的室逐步分度到其最终连接。

公开(公告)号：US07977158B2

公开(公告)日：2011-07-12

申请号：US12805048

申请日：2010-07-08

Applicant: Yoichiro Kurita

Inventor： Yoichiro Kurita

IPC: H01L21/60 ,  H01L21/603

CPC classification number: B23K1/0016 ,  B23K2101/40 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05559 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13551 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13609 ,  H01L2224/13611 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/27515 ,  H01L2224/27552 ,  H01L2224/2761 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75314 ,  H01L2224/75745 ,  H01L2224/7598 ,  H01L2224/81048 ,  H01L2224/81065 ,  H01L2224/8109 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81825 ,  H01L2224/8183 ,  H01L2224/81906 ,  H01L2224/81907 ,  H01L2224/83 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/92242 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01083 ,  H01L2924/0103 ,  H01L2924/01082 ,  H01L2224/81 ,  H01L2924/0665 ,  H01L2224/27 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/16145 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: A manufacturing method for an electronic device joining a first metallic bond part formed on a first electronic component and a second metallic bond part formed on a second electronic component includes a first process for placing the first metallic bond part directly against the second metallic bond part, applying pressure to the first electronic component and the second electronic component, joining the first metallic bond part to the second metallic bond part with solid-phase diffusion, and releasing the applied pressure, and a second process for heating the first electronic component and the second electronic component at a predetermined temperature such that the first metallic bond part and the second metallic bond part are joined together by melting the first metallic bond part and the second metallic bond part.

Abstract translation: 接合形成在第一电子部件上的第一金属接合部和形成在第二电子部件上的第二金属接合部的电子设备的制造方法包括：将第一金属接合部直接放置在第二金属接合部上的第一工序， 向所述第一电子部件和所述第二电子部件施加压力，将所述第一金属接合部与所述第二金属接合部以固相扩散接合，释放所施加的压力，以及第二加工所述第一电子部件和所述第二电子部件 电子部件在预定温度下使得第一金属接合部分和第二金属接合部分通过熔化第一金属接合部分和第二金属接合部分而接合在一起。

公开(公告)号：US20180130766A1

公开(公告)日：2018-05-10

申请号：US15861631

申请日：2018-01-03

Applicant: Invensas Corporation

Inventor： Belgacem Haba

IPC: H01L23/00

CPC classification number: H01L24/83 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/75 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05687 ,  H01L2224/113 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13193 ,  H01L2224/1403 ,  H01L2224/1601 ,  H01L2224/16105 ,  H01L2224/16146 ,  H01L2224/271 ,  H01L2224/2733 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/27849 ,  H01L2224/29027 ,  H01L2224/29028 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29324 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29393 ,  H01L2224/29499 ,  H01L2224/3201 ,  H01L2224/32105 ,  H01L2224/32145 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75102 ,  H01L2224/8109 ,  H01L2224/81101 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/8309 ,  H01L2224/83101 ,  H01L2224/83143 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83815 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/9211 ,  H01L2224/9212 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2924/01006 ,  H01L2924/014 ,  H01L2924/381 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/0675 ,  H01L2924/0635 ,  H01L2924/00012 ,  H01L2924/069 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/11 ,  H01L2224/27

Abstract: An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively self-adjusting anisotropic matrix. In an implementation, the adhesive matrix automatically makes electrical connections between two surfaces that have opposing electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

公开(公告)号：US20180026006A1

公开(公告)日：2018-01-25

申请号：US15722747

申请日：2017-10-02

Applicant: Kulicke and Soffa Industries, Inc.

Inventor： Robert N. Chylak ,  Dominick A. DeAngelis ,  Horst Clauberg

IPC: H01L23/00 ,  H01L25/03 ,  H01L25/065 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/75 ,  H01L24/83 ,  H01L24/94 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/1134 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13624 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32013 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48225 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/75343 ,  H01L2224/75348 ,  H01L2224/75349 ,  H01L2224/7565 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/759 ,  H01L2224/7598 ,  H01L2224/75981 ,  H01L2224/81005 ,  H01L2224/8109 ,  H01L2224/8112 ,  H01L2224/81121 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81201 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81207 ,  H01L2224/8121 ,  H01L2224/81409 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/81906 ,  H01L2224/81907 ,  H01L2224/83005 ,  H01L2224/83102 ,  H01L2224/83104 ,  H01L2224/83192 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/20102 ,  H01L2924/20103 ,  H01L2924/20104 ,  H01L2924/20105 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20301 ,  H01L2924/20302 ,  H01L2924/20303 ,  H01L2924/20304 ,  H01L2924/20305 ,  H01L2924/20306 ,  H01L2924/20307 ,  H01L2924/01029 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/05442 ,  H01L2924/05432 ,  H01L2224/81895

Abstract: A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between ones of the first conductive structures and respective ones of the second conductive structures; and (c) forming completed bonds between the first conductive structures and the second conductive structures.

公开(公告)号：US09601398B2

公开(公告)日：2017-03-21

申请号：US14500858

申请日：2014-09-29

Applicant: Invensas Corporation

Inventor： Charles G. Woychik ,  Se Young Yang ,  Pezhman Monadgemi ,  Terrence Caskey ,  Cyprian Emeka Uzoh

IPC: H01L21/66 ,  H01L23/00 ,  H01L23/498 ,  G01R31/28 ,  H01L21/683 ,  H01L25/04 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L22/32 ,  G01R31/2886 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/11015 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/16111 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/16257 ,  H01L2224/16267 ,  H01L2224/16503 ,  H01L2224/17051 ,  H01L2224/8109 ,  H01L2224/81138 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/12 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A method of attaching a microelectronic element to a substrate can include aligning the substrate with a microelectronic element, the microelectronic element having a plurality of spaced-apart electrically conductive bumps each including a bond metal, and reflowing the bumps. The bumps can be exposed at a front surface of the microelectronic element. The substrate can have a plurality of spaced-apart recesses extending from a first surface thereof. The recesses can each have at least a portion of one or more inner surfaces that are non-wettable by the bond metal of which the bumps are formed. The reflowing of the bumps can be performed so that at least some of the bond metal of each bump liquefies and flows at least partially into one of the recesses and solidifies therein such that the reflowed bond material in at least some of the recesses mechanically engages the substrate.