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21.
公开(公告)号:US11848859B2
公开(公告)日:2023-12-19
申请号:US17594717
申请日:2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Hess M. Hodge , Igor Gorodetsky
IPC: G06F12/10 , H04L45/28 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of on-demand paging is provided. The NIC can be equipped with a host interface, an operation logic block, and an address logic block. The host interface can couple the NIC to a host device. The operation logic block can obtain from a remote device, a request for an operation based on a virtual memory address. The address logic block can obtain, from the operation logic block, a request for an address translation for the virtual memory address and issue an address translation request to the host device via the host interface. If the address translation is unsuccessful, the address logic block can send a page request to a processor of the host device via the host interface. The address logic block can then determine that a page has been allocated in response to the page request and reissue the address translation request.
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公开(公告)号:US20230362247A1
公开(公告)日:2023-11-09
申请号:US18348944
申请日:2023-07-07
Applicant: PURE STORAGE, INC.
Inventor: PAR BOTES , JOHN HAYES , ZHANGXI TAN
IPC: H04L67/1097 , H04L49/15 , G06F3/06
CPC classification number: H04L67/1097 , H04L49/15 , G06F3/0607 , G06F3/0661 , G06F3/0683
Abstract: A storage system is provided. The storage system includes a plurality of storage nodes, each of the plurality of storage nodes having a plurality of storage units with storage memory. The system includes a first network coupling the plurality of storage nodes and a second network coupled to at least a subset of the plurality of storage units of each of the plurality of storage nodes such that one of the plurality of storage units of a first one of the plurality of storage nodes can initiate or relay a command to one of the plurality of storage units of a second one of the plurality of storage nodes via the second network without the command passing through the first network.
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公开(公告)号:US11799764B2
公开(公告)日:2023-10-24
申请号:US17594641
申请日:2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Abdulla M. Bataineh , Thomas L. Court , Vincent Chang , David Charles Hewson , Eric P. Lundberg , Partha Pratim Kundu
IPC: H04L45/28 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of efficient packet injection into an output buffer is provided. The NIC can be equipped with an output buffer, a plurality of injectors, a prioritization logic block, and a selection logic block. The plurality of injectors can share the output buffer. The prioritization logic block can determine a priority associated with a respective injector based on a high watermark and a low watermark associated with the injector. The selection logic block can then determine, from the plurality of injectors, a subset of injectors associated with a buffer class and determine whether the subset of injectors includes a high-priority injector. Upon identifying a high-priority injector in the subset of injectors, the selection logic block can select the high-priority injector for injecting a packet in the output buffer.
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公开(公告)号:US11770349B2
公开(公告)日:2023-09-26
申请号:US15415497
申请日:2017-01-25
Applicant: Oracle International Corporation
Inventor: Bjørn Dag Johnsen , Prabhunandan Narasimhamurthy , Line Holen
IPC: G06F9/451 , G06F16/23 , H04L49/25 , H04L67/10 , G06F16/22 , H04L49/356 , H04L45/48 , H04L41/0853 , H04L43/0817 , H04L41/046 , H04L43/0823 , H04L43/0882 , H04L41/0803 , H04L41/12 , H04L49/10 , H04L49/15 , H04L49/00 , H04L45/02 , H04L67/1097 , G06F9/455 , H04L41/14 , H04L9/40 , H04L12/44
CPC classification number: H04L49/25 , G06F9/451 , G06F9/45558 , G06F16/2237 , H04L41/046 , H04L41/0803 , H04L41/0853 , H04L41/12 , H04L41/14 , H04L43/0817 , H04L43/0823 , H04L43/0882 , H04L45/02 , H04L45/48 , H04L49/10 , H04L49/15 , H04L49/30 , H04L49/358 , H04L49/70 , H04L63/20 , H04L67/10 , H04L67/1097 , G06F2009/45579 , G06F2009/45595 , H04L12/44 , H04L63/12
Abstract: System and method for supporting configurable legacy P_Key table abstraction using a bitmap based hardware implementation in a high performance computing environment. A mapping table in DRAM can be provided through the use of a software based SMA that implements the mapping table. With this mapping table, it is possible to provide a legacy compliant view of a bit map based P_Key table. Such a legacy compliant view can be called a virtual P_Key table, or a configurable legacy P_Key table abstraction.
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公开(公告)号:US11741030B2
公开(公告)日:2023-08-29
申请号:US17134242
申请日:2020-12-25
Applicant: Intel Corporation
Inventor: Robert J. Safranek , Robert G. Blankenship , Venkatraman Iyer , Jeff Willey , Robert Beers , Darren S. Jue , Arvind A. Kumar , Debendra Das Sharma , Jeffrey C. Swanson , Bahaa Fahim , Vedaraman Geetha , Aaron T. Spink , Fulvio Spagna , Rahul R. Shah , Sitaraman V. Iyer , William Harry Nale , Abhishek Das , Simon P. Johnson , Yuvraj S. Dhillon , Yen-Cheng Liu , Raj K. Ramanujan , Robert A. Maddox , Herbert H. Hum , Ashish Gupta
IPC: G06F13/22 , H04L49/15 , G06F12/0813 , G06F12/0815 , G06F12/0831 , G06F13/42 , G06F8/71 , G06F8/77 , G06F9/30 , G06F12/0806 , G06F9/46 , G06F13/40 , G06F9/445 , G06F1/3287 , G06F11/10 , H04L9/06 , G06F12/0808 , H04L45/74 , G06F8/73 , H04L12/46
CPC classification number: G06F13/22 , G06F1/3287 , G06F8/71 , G06F8/77 , G06F9/30145 , G06F9/44505 , G06F9/466 , G06F11/1004 , G06F12/0806 , G06F12/0808 , G06F12/0813 , G06F12/0815 , G06F12/0831 , G06F12/0833 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F13/4282 , G06F13/4286 , G06F13/4291 , H04L9/0662 , H04L49/15 , G06F8/73 , G06F13/4273 , G06F2212/1016 , G06F2212/2542 , G06F2212/622 , H04L12/4641 , H04L45/74 , Y02D10/00 , Y02D30/00
Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.
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公开(公告)号:US11689436B2
公开(公告)日:2023-06-27
申请号:US17531494
申请日:2021-11-19
Applicant: Intel Corporation
Inventor: Murugasamy K. Nachimuthu , Mohan J. Kumar
IPC: H04L43/08 , G06F16/901 , H04B10/25 , G02B6/38 , G02B6/42 , G02B6/44 , G06F1/18 , G06F1/20 , G06F3/06 , G06F8/65 , G06F9/30 , G06F9/4401 , G06F9/54 , G06F12/109 , G06F12/14 , G06F13/16 , G06F13/40 , G08C17/02 , G11C5/02 , G11C7/10 , G11C11/56 , G11C14/00 , H03M7/30 , H03M7/40 , H04L41/14 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L49/00 , H04L49/25 , H04L49/356 , H04L49/45 , H04L67/02 , H04L67/306 , H04L69/04 , H04L69/329 , H04Q11/00 , H05K7/14 , G06F15/16 , G06F9/38 , G06F9/50 , H04L41/12 , H04L41/5019 , H04L43/16 , H04L47/24 , H04L47/38 , H04L67/1004 , H04L67/1034 , H04L67/1097 , H04L67/12 , H05K5/02 , H04W4/80 , G06Q10/087 , G06Q10/20 , G06Q50/04 , H04L43/065 , H04J14/00 , H04L61/00 , H04L67/51 , H04L41/147 , H04L67/1008 , H04L41/0813 , H04L67/1029 , H04L41/0896 , H04L47/70 , H04L47/78 , H04L41/082 , H04L67/00 , H04L67/1012 , B25J15/00 , B65G1/04 , H05K7/20 , H04L49/55 , H04L67/10 , H04W4/02 , H04L45/02 , G06F13/42 , H05K1/18 , G05D23/19 , G05D23/20 , H04L47/80 , H05K1/02 , H04L45/52 , H04Q1/04 , G06F12/0893 , H05K13/04 , G11C5/06 , G06F11/14 , G06F11/34 , G06F12/0862 , G06F15/80 , H04L47/765 , H04L67/1014 , G06F12/10 , G06Q10/06 , G06Q10/0631 , G07C5/00 , H04L12/28 , H04L41/02 , H04L9/06 , H04L9/14 , H04L9/32 , H04L41/046 , H04L49/15
CPC classification number: H04L43/08 , G02B6/3882 , G02B6/3893 , G02B6/3897 , G02B6/4292 , G02B6/4452 , G06F1/183 , G06F1/20 , G06F3/064 , G06F3/0613 , G06F3/0625 , G06F3/0653 , G06F3/0655 , G06F3/0664 , G06F3/0665 , G06F3/0673 , G06F3/0679 , G06F3/0683 , G06F3/0688 , G06F3/0689 , G06F8/65 , G06F9/30036 , G06F9/4401 , G06F9/544 , G06F12/109 , G06F12/1408 , G06F13/1668 , G06F13/409 , G06F13/4022 , G06F13/4068 , G06F15/161 , G06F16/9014 , G08C17/02 , G11C5/02 , G11C7/1072 , G11C11/56 , G11C14/0009 , H03M7/3086 , H03M7/4056 , H03M7/4081 , H04B10/25891 , H04L41/145 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L49/00 , H04L49/25 , H04L49/357 , H04L49/45 , H04L67/02 , H04L67/306 , H04L69/04 , H04L69/329 , H04Q11/0003 , H05K7/1442 , B25J15/0014 , B65G1/0492 , G05D23/1921 , G05D23/2039 , G06F3/061 , G06F3/067 , G06F3/0611 , G06F3/0616 , G06F3/0619 , G06F3/0631 , G06F3/0638 , G06F3/0647 , G06F3/0658 , G06F3/0659 , G06F9/3887 , G06F9/505 , G06F9/5016 , G06F9/5044 , G06F9/5072 , G06F9/5077 , G06F11/141 , G06F11/3414 , G06F12/0862 , G06F12/0893 , G06F12/10 , G06F13/161 , G06F13/1694 , G06F13/42 , G06F13/4282 , G06F15/8061 , G06F2209/5019 , G06F2209/5022 , G06F2212/1008 , G06F2212/1024 , G06F2212/1041 , G06F2212/1044 , G06F2212/152 , G06F2212/202 , G06F2212/401 , G06F2212/402 , G06F2212/7207 , G06Q10/06 , G06Q10/06314 , G06Q10/087 , G06Q10/20 , G06Q50/04 , G07C5/008 , G08C2200/00 , G11C5/06 , H03M7/30 , H03M7/3084 , H03M7/40 , H03M7/4031 , H03M7/6005 , H03M7/6023 , H04B10/25 , H04J14/00 , H04L9/0643 , H04L9/14 , H04L9/3247 , H04L9/3263 , H04L12/2809 , H04L41/024 , H04L41/046 , H04L41/082 , H04L41/0813 , H04L41/0896 , H04L41/12 , H04L41/147 , H04L41/5019 , H04L43/065 , H04L43/16 , H04L45/02 , H04L45/52 , H04L47/24 , H04L47/38 , H04L47/765 , H04L47/782 , H04L47/805 , H04L47/82 , H04L47/823 , H04L49/15 , H04L49/555 , H04L61/00 , H04L67/10 , H04L67/1004 , H04L67/1008 , H04L67/1012 , H04L67/1014 , H04L67/1029 , H04L67/1034 , H04L67/1097 , H04L67/12 , H04L67/34 , H04L67/51 , H04Q1/04 , H04Q11/00 , H04Q11/0005 , H04Q11/0062 , H04Q11/0071 , H04Q2011/0037 , H04Q2011/0041 , H04Q2011/0052 , H04Q2011/0073 , H04Q2011/0079 , H04Q2011/0086 , H04Q2213/13523 , H04Q2213/13527 , H04W4/023 , H04W4/80 , H05K1/0203 , H05K1/181 , H05K5/0204 , H05K7/1418 , H05K7/1421 , H05K7/1422 , H05K7/1447 , H05K7/1461 , H05K7/1485 , H05K7/1487 , H05K7/1489 , H05K7/1491 , H05K7/1492 , H05K7/1498 , H05K7/2039 , H05K7/20709 , H05K7/20727 , H05K7/20736 , H05K7/20745 , H05K7/20836 , H05K13/0486 , H05K2201/066 , H05K2201/10121 , H05K2201/10159 , H05K2201/10189 , Y02D10/00 , Y02P90/30 , Y04S10/50 , Y04S10/52 , Y10S901/01
Abstract: Embodiments are generally directed apparatuses, methods, techniques and so forth to select two or more processing units of the plurality of processing units to process a workload, and configure a circuit switch to link the two or more processing units to process the workload, the two or more processing units each linked to each other via paths of communication and the circuit switch.
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27.
公开(公告)号:US20230198914A1
公开(公告)日:2023-06-22
申请号:US17552685
申请日:2021-12-16
Applicant: Microsoft Technology Licensing, LLC
Inventor: Prashant RANJAN , Deepak GOEL
CPC classification number: H04L47/6225 , H04L45/24 , H04L45/50 , H04L49/15 , G06N3/08
Abstract: Systems and methods for sending and receiving messages, including training data, using a multi-path packet spraying protocol are described. A method includes segmenting a message into a set of data packets comprising training data. The method further includes initiating transmission of the set of data packets to a receiving node. The method further includes spraying the set of data packets across the switch fabric in accordance with the multi-path spraying protocol such that depending upon a value of a fabric determination field associated with a respective data packet, the respective data packet can traverse via any one of a plurality of paths offered by the switch fabric for a connection between the sending node to the receiving node. The method further includes initiating transmission of synchronization packets to the receiving node, where unlike the set of data packets, the synchronization packets are not sprayed across the switch fabric.
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公开(公告)号:US11677628B2
公开(公告)日:2023-06-13
申请号:US15839536
申请日:2017-12-12
Inventor: Fred A. Bower, III , Caihong Zhang , Xiao Dong Du , Patrick L. Caporale , Jeffrey R. Hamilton , James J. Parsonese , Pravin Patel
Abstract: Topology discovery between compute nodes and interconnect switches including creating, on an interconnect switch, a virtual topology discovery device for a first port, wherein the interconnect switch is coupled to a compute node via the first port, and wherein the virtual topology discovery device comprises a port identifier for the first port; mapping the virtual topology discovery device to the first port; receiving an inventory request from the compute node via the first port; routing the inventory request to the virtual topology discovery device for the first port; and sending, from the virtual topology discovery device for the first port, the port identifier to the compute node.
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公开(公告)号:US20230156380A1
公开(公告)日:2023-05-18
申请号:US18154580
申请日:2023-01-13
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Nicholas McDonald , Gary Gostin , Alan Davis
CPC classification number: H04Q11/0005 , H04L49/15 , H04L49/30 , H04L49/45 , H04Q2011/0041 , H04Q2011/0052
Abstract: A system for hot swapping a network switch without disconnecting the network switch connectors is provided. The system disaggregates the switch faceplate network cable connectors from the internal components of the network switch so that the internal switch components may be removed from the switch without disconnecting the switch network cables.
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公开(公告)号:US11637750B2
公开(公告)日:2023-04-25
申请号:US17219220
申请日:2021-03-31
Inventor: Gary D. Cudak , Ronald F. Ridgeway, Jr. , John M. Petersen , Alexander Verrigni
IPC: G06F15/173 , H04L41/084 , H04L41/0853 , H04L49/15 , H04L41/0873 , H04L41/0869 , H04L41/0663 , H04L41/082 , H04L41/0806
Abstract: A computer program product and a network switch are provided. The network switch may include network ports, memory and a processor for processing program instructions to perform various operations. The computer program product may provide the program instructions for a network switch. The operations may include detecting a first neighbor network switch connection to a first port of the first network switch, accessing first neighbor network switch configuration data that is stored by the first network switch in association with the first port, and providing the configuration data that is stored in association with the first port of the first network switch to the first neighbor network switch over the first neighbor network switch connection to the first port. In one example, the configuration data is obtained from a second neighbor network switch that was previously connected to the first port prior to the first neighbor network switch.
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