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1.
公开(公告)号:US12132648B2
公开(公告)日:2024-10-29
申请号:US17594543
申请日:2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor: David Charles Hewson , Partha Kundu
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of efficient load balancing among the hardware engines is provided. The NIC can be equipped with a plurality of ordering control units (OCUs), a queue, a selection logic block, and an allocation logic block. The selection logic block can determine, from the plurality of OCUs, an OCU for a command from the queue, which can store one or more commands. The allocation logic block can then determine a selection setting for the OCU, select an egress queue for the command based on the selection setting, and send the command to the egress queue.
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公开(公告)号:US20240354821A1
公开(公告)日:2024-10-24
申请号:US18684674
申请日:2022-08-19
Applicant: ViaSat, Inc.
Inventor: Ultan O’Brien , Niall O'Sullivan , Fergal Murray
IPC: G06Q30/0601 , B64D11/00 , G06F9/54 , G06Q10/087
CPC classification number: G06Q30/0603 , B64D11/0015 , G06F9/546 , G06Q10/087 , G06Q30/0631 , G06Q30/0641
Abstract: Technology is described for providing electronic product listings for products available at a destination. In one example of the technology, destination information may be obtained from an aircraft data bus, where the destination information may be from a plurality of aircraft information systems located on the aircraft. The destination information may be sent to one or more vendor application programming interfaces (APIs) to obtain product details for at least one product that is available for purchase through an inflight entertainment system and available to be delivered to a customer at a flight destination. Product details received from a vendor API may be sent to a client device to be displayed in a graphical user interface of an inflight entertainment system, allowing a passenger on the aircraft to view the product details with a plurality of product details for a plurality of products and purchase the product through the inflight entertainment system.
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公开(公告)号:US12124430B2
公开(公告)日:2024-10-22
申请号:US17710634
申请日:2022-03-31
Applicant: Amazon Technologies, Inc.
Inventor: Roland Mesde , Alex Bessonov , Nitin Giri , Kyle Daniel Halbach
CPC classification number: G06F16/2365 , B60W50/045 , B60W50/06 , B60W50/14 , G06F9/546 , G06F16/273 , B60W2556/45
Abstract: Systems and methods are disclosed for implementing a vehicle shadow service that includes a vehicle and/or vehicle shadow update mechanism. A vehicle shadow management sub-system of the vehicle shadow service includes or interfaces with an interface configured to receive vehicle state change requests. Received requests are stored in an update queue for a vehicle shadow and a validation processor determines whether the received state change requests are valid before sending a given state change request to a vehicle corresponding to the vehicle shadow. In some embodiments, state change requests may be invalidated due to being rendered moot by subsequently received requests, changes in state of the vehicle, expiration, etc. The corresponding vehicle shadow is then updated when a data stream from the vehicle indicates that the requested state change has in fact been implemented at the vehicle.
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公开(公告)号:US20240345956A1
公开(公告)日:2024-10-17
申请号:US18754499
申请日:2024-06-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeet Ashok Chachad , David Matthew Thompson , Naveen BHORIA , Peter Michael HIPPLEHEUSER
IPC: G06F12/0811 , G06F9/30 , G06F9/38 , G06F9/46 , G06F9/54 , G06F11/30 , G06F12/0808 , G06F12/0815 , G06F12/0817 , G06F12/0831 , G06F12/084 , G06F12/0895 , G06F12/128 , G06F13/16
CPC classification number: G06F12/0811 , G06F9/3004 , G06F9/30047 , G06F9/30079 , G06F9/3867 , G06F9/467 , G06F9/544 , G06F9/546 , G06F11/3037 , G06F12/0808 , G06F12/0815 , G06F12/0828 , G06F12/0831 , G06F12/084 , G06F12/0895 , G06F12/128 , G06F13/1668 , G06F2212/1021 , G06F2212/608
Abstract: An apparatus includes a CPU core and a L1 cache subsystem including a L1 main cache, a L1 victim cache, and a L1 controller. The apparatus includes a L2 cache subsystem coupled to the L1 cache subsystem by a transaction bus and a tag update bus. The L2 cache subsystem includes a L2 main cache, a shadow L1 main cache, a shadow L1 victim cache, and a L2 controller. The L2 controller receives a message from the L1 controller over the tag update bus, including a valid signal, an address, and a coherence state. In response to the valid signal being asserted, the L2 controller identifies an entry in the shadow L1 main cache or the shadow L1 victim cache having an address corresponding to the address of the message and updates a coherence state of the identified entry to be the coherence state of the message.
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公开(公告)号:US12118646B1
公开(公告)日:2024-10-15
申请号:US17562061
申请日:2021-12-27
Applicant: APPLE INC.
Inventor: Xiaobo An , Peter Dollar , Eric J. Mueller , Brendan K. Duncan
CPC classification number: G06T11/00 , G06F9/451 , G06F9/546 , G06T2210/52
Abstract: Systems and methods for transitional effects in real-time rendering applications are described. Some implementations may include rendering a computer-generated reality environment in a first state using an application that includes multiple processes associated with respective objects of the computer-generated reality environment; generating a message that indicates a change in the computer-generated reality environment; sending the message to two or more of the multiple processes associated with respective objects of the computer-generated reality environment; responsive to the message, updating configurations of objects of the computer-generated reality environment to change the computer-generated reality environment from the first state to a second state; and rendering the computer-generated reality environment in the second state using the application.
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公开(公告)号:US12118412B2
公开(公告)日:2024-10-15
申请号:US17126217
申请日:2020-12-18
Applicant: IOTech Systems Limited
Inventor: Stephen Osselton
IPC: G06F9/54 , G06F12/1027 , G06F12/1081 , G06F15/167
CPC classification number: G06F9/544 , G06F9/546 , G06F12/1027 , G06F12/1081 , G06F15/167
Abstract: A data processing system comprising a processor and memory and on which is running an operating system. A computer program executable for implementing a control application for controlling an embedded system is loaded in the memory which controls the operating system to instantiate in an operating system memory a plurality of data processing components and a communication component. The communication component is configured to facilitate data communication between the data processing components using a publish-subscribe messaging pattern. The communication component and data processing components are instantiated in a single memory address space.
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公开(公告)号:US12106084B2
公开(公告)日:2024-10-01
申请号:US17840328
申请日:2022-06-14
Applicant: Google LLC
Inventor: Yan Huang , Nikhil Rao , Owen Lin , Ilya Firman , Anil Iyer
IPC: G06F8/60 , G06F9/54 , G06F11/36 , G06F16/9035 , G06F16/906 , G06F16/907
CPC classification number: G06F8/60 , G06F9/546 , G06F11/3604 , G06F11/362 , G06F11/3664 , G06F16/9035 , G06F16/906 , G06F16/907
Abstract: Analyzing or debugging applications is provided. The system identifies an action for an application provided by a developer. The system determines a first classification score based on historical execution of the action. The system generates a machine generated action for the application based on metadata associated with the application. The system determines a second classification score based on a comparison of the action with the machine generated action. The system selects, via a matching program, a second application that matches the application. The system determines a third classification score based on a comparison of an action approved for the second application with the action provided by the application developer. The system updates a delivery control parameter based on the first classification score, the second classification score and the third classification score. The system controls delivery of the application based on the delivery control parameter.
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8.
公开(公告)号:US20240323114A1
公开(公告)日:2024-09-26
申请号:US18678040
申请日:2024-05-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Anthony Michael Ford , Timothy J. Johnson , Abdulla M. Bataineh
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A data-driven intelligent networking system that can facilitate tracing of data flow packets is provided. The system add tracer packets to data flow packets arriving at an ingress point of the network. As the tracer packets progress through network in-band with the data flow packets, the system can copy, at each switch, trace data into pre-defined fields in the tracer packets. When the data flow packets arrive at an egress point of the network the system can separate the trace data from the data flow packet for analysis. Based on the analysis of the trace data, the system can adopt one or more policies to mitigate the impact of congestion on time-sensitive applications.
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公开(公告)号:US20240320068A1
公开(公告)日:2024-09-26
申请号:US18575519
申请日:2022-06-30
Applicant: LG ELECTRONICS INC.
Inventor: Jooyoung CHOI , Younggon KIM , Chaeguk CHO , Changhun SUNG , Hansung KIM , Taekyoung KIM , Junsang PARK , Youngjae KIM , Jaejin CHO
IPC: G06F9/54
Abstract: A signal processing device and a vehicle communication device including the same are disclosed. The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and to process the received first message; a second processor to receive a second message including a communication message based on a second communication scheme and to process the received second message; and a shared memory to operate to transmit the first message or the second message between the first processor and the second processor, wherein the first processor or the second processor is configured to receive the first message or the second message stored in the shared memory based on an interrupt signal. Accordingly, latency may be reduced and high-speed data transmission may be performed during inter-processor communication.
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公开(公告)号:US20240311217A1
公开(公告)日:2024-09-19
申请号:US18672998
申请日:2024-05-23
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor: Sicong Li , Wenjin Gou
IPC: G06F9/54
CPC classification number: G06F9/546
Abstract: A computing device includes a first processor, a second processor, and a first network device, the first network device is configured to connect the computing device to a target computing device, and the second processor is configured to run a first process and a second process. The first processor is configured to: receive a command sent by the first process, where the command is used to transmit data to a target process; execute a first command when it is determined, based on the command, that the target process is the second process, to send the data to the second process; and transmit the data to a third process via the first network device when it is determined, based on the command, that the target process is the third process located on the second computing device.
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