-
1.发明授权公开(公告)号：US12132648B2
公开(公告)日：2024-10-29
申请号：US17594543
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： David Charles Hewson , Partha Kundu
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of efficient load balancing among the hardware engines is provided. The NIC can be equipped with a plurality of ordering control units (OCUs), a queue, a selection logic block, and an allocation logic block. The selection logic block can determine, from the plurality of OCUs, an OCU for a command from the queue, which can store one or more commands. The allocation logic block can then determine a selection setting for the OCU, select an egress queue for the command based on the selection setting, and send the command to the egress queue.
-
2.发明公开公开(公告)号：US20240323114A1
公开(公告)日：2024-09-26
申请号：US18678040
申请日：2024-05-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Anthony Michael Ford , Timothy J. Johnson , Abdulla M. Bataineh
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A data-driven intelligent networking system that can facilitate tracing of data flow packets is provided. The system add tracer packets to data flow packets arriving at an ingress point of the network. As the tracer packets progress through network in-band with the data flow packets, the system can copy, at each switch, trace data into pre-defined fields in the tracer packets. When the data flow packets arrive at an egress point of the network the system can separate the trace data from the data flow packet for analysis. Based on the analysis of the trace data, the system can adopt one or more policies to mitigate the impact of congestion on time-sensitive applications.
-
公开(公告)号：US20240259302A1
公开(公告)日：2024-08-01
申请号：US18631217
申请日：2024-04-10
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Edwin L. Froese
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: Systems and methods are provided for managing a data communication within a multi-level network having a plurality of switches organized as groups, with each group coupled to all other groups via global links, including: at each switch within the network, maintaining a global fault table identifying the links which lead only to faulty global paths, and when the data communication is received at a port of a switch, determine a destination for the data communication and, route the communication across the network using the global fault table to avoid selecting a port within the switch that would result in the communication arriving at a point in the network where its only path forward is across a global link that is faulty; wherein the global fault table is used for both a global minimal routing methodology and a global non-minimal routing methodology.
-
公开(公告)号：US20240256464A1
公开(公告)日：2024-08-01
申请号：US18630098
申请日：2024-04-09
Applicant: Texas Instruments Incorporated
Inventor： Bipin Prasad Heremagalur Ramaprasad , David Matthew Thompson , Abhijeet Ashok Chachad , Hung Ong
IPC: G06F12/1045 , G06F15/78
CPC classification number: G06F12/1045 , G06F15/7807 , G06F2212/301 , G06F2212/50
Abstract: A system comprises a processor including a CPU core, first and second memory caches, and a memory controller subsystem. The memory controller subsystem speculatively determines a hit or miss condition of a virtual address in the first memory cache and speculatively translates the virtual address to a physical address. Associated with the hit or miss condition and the physical address, the memory controller subsystem configures a status to a valid state. Responsive to receipt of a first indication from the CPU core that no program instructions associated with the virtual address are needed, the memory controller subsystem reconfigures the status to an invalid state and, responsive to receipt of a second indication from the CPU core that a program instruction associated with the virtual address is needed, the memory controller subsystem reconfigures the status back to a valid state.
-
公开(公告)号：US11968116B2
公开(公告)日：2024-04-23
申请号：US17594806
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jonathan P. Beecroft , Anthony Michael Ford
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: Methods and systems are provided for performing lossy dropping and ECN marking in a flow-based network. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform per-flow packet dropping and ECN marking.
-
Patent Agency Ranking
6.发明公开公开(公告)号：US20240121182A1
公开(公告)日：2024-04-11
申请号：US18545808
申请日：2023-12-19
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Abdulla M. Bataineh , Thomas L. Court , Hess M. Hodge
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of facilitating efficient memory address translation is provided. The NIC can be equipped with a host interface, a cache, and an address translation unit (ATU). During operation, the ATU can determine an operating mode. The operating mode can indicate whether the ATU is to perform a memory address translation at the NIC. The ATU can then determine whether a memory address indicated in the memory access request is available in the cache. If the memory address is not available in the cache, the ATU can perform an operation on the memory address based on the operating mode.
-
7.发明公开公开(公告)号：US20240121179A1
公开(公告)日：2024-04-11
申请号：US18542412
申请日：2023-12-15
Applicant: Hewlett Packard Enterprise Development LP
Inventor： David Charles Hewson , Abdulla M. Bataineh , Thomas L. Court , Duncan Roweth
IPC: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of facilitating fine-grain flow control (FGFC) is provided. The NIC can be equipped with a network interface, an FGFC logic block, and a traffic management logic block. During operation, the network interface can determine that a control frame from a switch is associated with FGFC. The network interface can then identify a data flow indicated in the control frame for applying the FGFC. The FGFC logic block can insert information from the control frame into an entry of a data structure stored in the NIC. The traffic management logic block can identify the entry in the data structure based on one or more fields of a packet belonging to the flow. Subsequently, the traffic management logic block can determine whether the packet is allowed to be forwarded based on the information in the entry.
-
公开(公告)号：US11929919B2
公开(公告)日：2024-03-12
申请号：US17594798
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Jonathan P. Beecroft , Robert Alverson , Edward J. Turner
IPC: H04L45/028 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/28 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A switch equipped with a self-managing reduction engine is provided. During operation, the reduction engine can use a timeout mechanism to manage itself in different latency-induced or error scenarios. As a result, the network can facilitate an efficient and scalable environment for high performance computing.
-
公开(公告)号：US11876701B2
公开(公告)日：2024-01-16
申请号：US17594627
申请日：2020-03-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Duncan Roweth , Andrew S. Kopser , Igor Gorodetsky , Laurence Scott Kaplan , Krishna Chaitanya Kandalla
IPC: H04L45/28 , H04L45/02 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC classification number: H04L45/02 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.
-
公开(公告)号：US20230370364A1
公开(公告)日：2023-11-16
申请号：US18361320
申请日：2023-07-28
Applicant: Hewlett Packard Enterprise Development LP
Inventor： David Charles Hewson , Timothy J. Johnson , Abdulla M. Bataineh
IPC: H04L45/28 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625
CPC classification number: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
Abstract: Methods and systems are provided to facilitate network egress fairness between applications. At an egress port of a network, an arbitrator can provide fairness-based traffic shaping to data associated with applications. The desired fairness-based traffic shaping can be provided based on bandwidth, traffic classes, or other parameters. Consequently, the egress link’s bandwidth can be allocated with fairness among the applications.
-
-
-
-
-
-
-
-
-
Search Results
305
records
(took 0.027 seconds)
