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公开(公告)号：US11876701B2
公开(公告)日：2024-01-16
申请号：US17594627
申请日：2020-03-23
发明人： Duncan Roweth , Andrew S. Kopser , Igor Gorodetsky , Laurence Scott Kaplan , Krishna Chaitanya Kandalla
IPC分类号： H04L45/28 , H04L45/02 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L49/00 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/2441 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC分类号： H04L45/02 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要： A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.
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公开(公告)号：US20220229800A1
公开(公告)日：2022-07-21
申请号：US17594531
申请日：2020-03-23
摘要： A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.
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公开(公告)号：US20240348539A1
公开(公告)日：2024-10-17
申请号：US18755978
申请日：2024-06-27
IPC分类号： H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC分类号： H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要： Methods and systems are provided to facilitate network ingress fairness between applications. At an ingress port of a network, the applications providing data communications are reviewed so that and arbitration process can be used to fairly allocate bandwidth at that ingress port. In a typical process, the bandwidth is allocated based upon the number of flow channels, irrespective of the source and characteristics of those flow channels. At the ingress port, an examination of the application providing the data communication will allow for a more appropriate allocation of input bandwidth.
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4.发明公开公开(公告)号：US20240121180A1
公开(公告)日：2024-04-11
申请号：US18544791
申请日：2023-12-19
发明人： Duncan Roweth , Andrew S. Kopser , Igor Gorodetsky , Laurence Scott Kaplan , Krishna Chaitanya Kandalla
IPC分类号： H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC分类号： H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要： A network interface controller (NIC) capable of efficient operation management for host accelerators is provided. The NIC can be equipped with a host interface and triggering logic block. During operation, the host interface can couple the NIC to a host device. The triggering logic block can obtain, via the host interface from the host device, an operation associated with an accelerator of the host device. The triggering logic block can determine whether a triggering condition has been satisfied for the operation based on an indicator received from the accelerator. If the triggering condition has been satisfied, the triggering logic block can obtain a piece of data generated from the accelerator from a memory location and execute the operation using the piece of data.
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公开(公告)号：US11818037B2
公开(公告)日：2023-11-14
申请号：US17594696
申请日：2020-03-23
发明人： Abdulla M. Bataineh , Jonathan P. Beecroft , Thomas L. Court , Anthony M. Ford , Edwin L. Froese , David Charles Hewson , Joseph G. Kopnick , Andrew S. Kopser , Duncan Roweth , Gregory Faanes , Michael Higgins , Timothy J. Johnson , Trevor Jones , James Reinhard , Edward J. Turner , Steven L. Scott , Robert L. Alverson
IPC分类号： H04L49/00 , H04L49/101 , H04L45/745 , H04L47/2441 , H04L45/28 , H04L45/028 , H04L45/125 , H04L45/00 , H04L45/122 , H04L47/76 , H04L49/15 , H04L69/40 , H04L47/10 , H04L49/9005 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , H04L47/12 , G06F13/42 , H04L47/30 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC分类号： H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要： A switch architecture for a data-driven intelligent networking system is provided. The system can accommodate dynamic traffic with fast, effective congestion control. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow are acknowledged after reaching the egress point of the network, and the acknowledgement packets are sent back to the ingress point of the flow along the same data path. As a result, each switch can obtain state information of each flow and perform flow control on a per-flow basis.
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公开(公告)号：US11784920B2
公开(公告)日：2023-10-10
申请号：US17594736
申请日：2020-03-23
IPC分类号： H04L45/122 , H04L49/15 , H04L47/10 , H04L49/9005 , H04L47/12 , H04L47/30 , H04L45/28 , H04L45/028 , H04L45/125 , H04L45/00 , H04L47/76 , H04L49/00 , H04L69/40 , H04L47/34 , H04L67/1097 , G06F13/16 , H04L45/021 , G06F13/42 , H04L47/2441 , H04L47/62 , H04L47/24 , H04L49/90 , G06F13/38 , G06F13/40 , H04L45/745 , H04L47/2483 , H04L47/629 , H04L47/80 , H04L49/101 , H04L45/12 , H04L47/122 , G06F12/1036 , G06F15/173 , H04L43/10 , H04L45/42 , H04L47/11 , G06F12/0862 , G06F12/1045 , H04L47/32 , G06F9/54 , G06F13/14 , G06F9/50 , H04L47/22 , H04L47/52 , H04L47/6275 , H04L45/24 , H04L45/7453 , H04L45/16 , H04L69/22 , H04L47/762 , H04L47/78 , H04L47/20 , H04L49/9047 , H04L1/00 , H04L43/0876 , H04L47/2466 , H04L47/625 , H04L69/28
CPC分类号： H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/626 , H04L47/629 , H04L47/6235 , H04L47/6275 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要： Systems and methods are provided for passing data amongst a plurality of switches having a plurality of links attached between the plurality of switches. At a switch, a plurality of load signals are received from a plurality of neighboring switches. Each of the plurality of load signals are made up of a set of values indicative of a load at each of the plurality of neighboring switches providing the load signal. Each value within the set of values provides an indication for each link of the plurality of links attached thereto as to whether the link is busy or quiet. Based upon the plurality of load signals, an output link for routing a received packet is selected, and the received packet is routed via the selected output link.
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公开(公告)号：US20240259329A1
公开(公告)日：2024-08-01
申请号：US18103943
申请日：2023-01-31
发明人： Jonathan Paul Beecroft , Anthony M. Ford , Trevor Alan Jones , Andrew S. Kopser , Joseph Orth , David Charles Hewson , Abdulla M. Bataineh
IPC分类号： H04L49/00 , H04L49/25 , H04L61/2592
CPC分类号： H04L49/3027 , H04L49/252 , H04L61/2592
摘要： The efficient storage of transformation information in a switch is provided. A respective port of the switch can include a memory device capable of storing transformation information. During operation, the switch can apply a selection mechanism to the transformation information learned at the switch for identifying a target port. The switch can then store the information in the memory device of the target port. Upon receiving a packet, the ingress port can apply the selection mechanism to the header information of the packet for determining a location of a first piece of transformation information associated with the packet. The ingress port can obtain the first piece of transformation information by looking up the header information in the location and storing it in a local memory device. The ingress port can then transform the packet based on the first piece of transformation information for determining an egress port for the packet.
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公开(公告)号：US12034650B1
公开(公告)日：2024-07-09
申请号：US18103943
申请日：2023-01-31
发明人： Jonathan Paul Beecroft , Anthony M. Ford , Trevor Alan Jones , Andrew S. Kopser , Joseph Orth , David Charles Hewson , Abdulla M. Bataineh
IPC分类号： G06F15/16 , H04L49/00 , H04L49/25 , H04L61/2592
CPC分类号： H04L49/3027 , H04L49/252 , H04L61/2592
摘要： The efficient storage of transformation information in a switch is provided. A respective port of the switch can include a memory device capable of storing transformation information. During operation, the switch can apply a selection mechanism to the transformation information learned at the switch for identifying a target port. The switch can then store the information in the memory device of the target port. Upon receiving a packet, the ingress port can apply the selection mechanism to the header information of the packet for determining a location of a first piece of transformation information associated with the packet. The ingress port can obtain the first piece of transformation information by looking up the header information in the location and storing it in a local memory device. The ingress port can then transform the packet based on the first piece of transformation information for determining an egress port for the packet.
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公开(公告)号：US20220329521A1
公开(公告)日：2022-10-13
申请号：US17594609
申请日：2020-03-23
IPC分类号： H04L45/00 , H04L43/0876
摘要： Systems and methods are provided for performing routing in a switch network or fabric. Switches can be configured in a hierarchical topology having a plurality of groups, where switches in a group are connected to one another, and groups are connected to other groups. Routing can be performed by maintaining per-group group load information. A packet can be routed between at least two groups using the per-group group load information to effect a set of routing decisions. The set of routing decisions can be biased towards or away one or more paths.
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公开(公告)号：US20220239587A1
公开(公告)日：2022-07-28
申请号：US17594736
申请日：2020-03-23
摘要： Systems and methods are provided for passing data amongst a plurality of switches having a plurality of links attached between the plurality of switches. At a switch, a plurality of load signals are received from a plurality of neighboring switches. Each of the plurality of load signals are made up of a set of values indicative of a load at each of the plurality of neighboring switches providing the load signal. Each value within the set of values provides an indication for each link of the plurality of links attached thereto as to whether the link is busy or quiet. Based upon the plurality of load signals, an output link for routing a received packet is selected, and the received packet is routed via the selected output link.
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