公开(公告)号：US20240362162A1

公开(公告)日：2024-10-31

申请号：US18768198

申请日：2024-07-10

Applicant: Kioxia Corporation

Inventor： Hideki YOSHIDA ,  Shinichi KANNO

IPC: G06F12/02 ,  G06F3/06 ,  G06F12/06 ,  G06F12/10

CPC classification number: G06F12/0246 ,  G06F3/06 ,  G06F3/064 ,  G06F12/0253 ,  G06F12/06 ,  G06F12/10 ,  G06F2212/1016 ,  G06F2212/152 ,  G06F2212/2022 ,  G06F2212/7201 ,  G06F2212/7202 ,  G06F2212/7205 ,  G06F2212/7208

Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.

公开(公告)号：US20240361918A1

公开(公告)日：2024-10-31

申请号：US18140499

申请日：2023-04-27

Applicant: Pure Storage, Inc.

Inventor： Luay Alem ,  Paul Theunis ,  Luis Pablo Pabón

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0619 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/10

Abstract: An example method for backend replication of data in a distributed storage system comprises receiving, by a container storage management system, a request to generate a mirror site of a data site comprising a backend storage system providing storage resources associated with a plurality of storage volumes of a container system; generating, by the container storage management system and based on the receiving the request to generate the mirror site, architecture data describing an organization of the plurality of storage volumes on the data site; and directing, by the container storage management system, the backend storage system to transfer, based on the architecture data, data to the mirror site via a pathway outside the container storage management system.

公开(公告)号：US12130734B2

公开(公告)日：2024-10-29

申请号：US18056445

申请日：2022-11-17

Applicant: VMware LLC

Inventor： Tanay Ganguly ,  Zubraj Singha ,  Goresh Musalay ,  Kashish Bhatia

IPC: G06F12/02 ,  G06F12/10

CPC classification number: G06F12/023 ,  G06F12/10 ,  G06F2212/1044 ,  G06F2212/152

Abstract: Virtual memory space may be saved in a clone environment by leveraging the similarity of the data signatures in swap files when a chain of virtual machines (VMs) includes clones spawned from a common parent and executing common applications. Deduplication is performed across the chain, rather than merely within each VM. Examples include generating a common deduplication identifier (ID) for the chain; generating a logical addressing table linked to the deduplication ID, for each of the VMs in the chain; and generating a hash table for the chain. Examples further include, based at least on a swap out request, generating a hash value for a block of memory to be written to a storage medium; and based at least on finding the hash value within the hash table, updating the logical addressing table to indicate a location of a prior-existing duplicate of the block on the storage medium.

公开(公告)号：US20240345970A1

公开(公告)日：2024-10-17

申请号：US18756055

申请日：2024-06-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sriramakrishnan GOVINDARAJAN ,  Kishon Vijay Abraham ISRAEL VIJAYPONRAJ ,  Mihir Narendra MODY ,  Jason A.T. Jones

IPC: G06F13/16 ,  G06F12/10 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/1668 ,  G06F12/10 ,  G06F13/4022 ,  G06F13/4221 ,  G06F13/4282 ,  G06F2213/0026

Abstract: A peripheral proxy subsystem provides routing mechanisms to allow multiple hosts to communicate with multiple functions, physical and virtual, of a single root I/O virtualization (SR-IOV) peripheral, which may include a physical function and a plurality of virtual functions associated with the physical function. The peripheral proxy subsystem, which may be embodied as a controller, includes a first endpoint interface; a second endpoint interface; and a single root controller interface configured to couple to the SR-IOV peripheral. The controller is configured to be able to present through the single root controller interface: a first subset of the plurality of virtual functions through a first cloned instance of the physical function at the first endpoint interface; and a second subset of the plurality of virtual functions through a second cloned instance of the physical function at the second endpoint interface.

公开(公告)号：US12117958B2

公开(公告)日：2024-10-15

申请号：US17319307

申请日：2021-05-13

Applicant: Elektrobit Automotive GmbH

Inventor： Helmut Gepp ,  Bekim Chilku ,  Georg Gaderer ,  Michael Ziehensack

IPC: G06F13/42 ,  G06F9/455 ,  G06F12/10 ,  G06F13/28 ,  G06F13/40 ,  H04L9/40

CPC classification number: G06F13/4282 ,  G06F9/45558 ,  G06F12/10 ,  G06F13/28 ,  G06F13/4022 ,  H04L63/0227 ,  G06F2009/45579 ,  G06F2212/152

Abstract: The present invention is related to a computing device (CD), in particular for automotive applications, with a safe and secure coupling between virtual machines (VMi) and a peripheral component interconnect express device (PCIe-D). The invention is further related to a vehicle comprising such a computing device (CD). The computing device (CD) comprises one or more virtual machines (VMi) and a virtual switch (VS). The virtual switch (VS) is configured to provide a safe and secure coupling between the one or more virtual machines (VMi) and at least one peripheral component interconnect express device (PCIe-D) configured to support single-root input/output virtualization, to which the computing device (CD) is connected.

公开(公告)号：US12086449B1

公开(公告)日：2024-09-10

申请号：US17983213

申请日：2022-11-08

Applicant: Micron Technology, Inc.

Inventor： Alan J. Wilson ,  Donald M. Morgan

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0647 ,  G06F3/0616 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/10 ,  G06F2212/657

Abstract: Methods, systems, and devices for repair operation techniques are described. A memory device may detect a failure of a read operation associated with a physical row address of a memory die. The memory device may store information associated with the physical row address before performing a media management operation and after detecting the failure. Additionally or alternatively, the memory device may initiate a counter based on detecting the failure and may increment a value of the counter for each media management operation performed after detecting the failure. The memory device may send a command or other information to perform a repair operation for the physical row address. The memory device may determine the physical row address for the repair operation (e.g., despite media management operations) based on the stored information or the value of the counter, and may perform the repair operation on the physical row address.

公开(公告)号：US12079471B2

公开(公告)日：2024-09-03

申请号：US17875457

申请日：2022-07-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daniel Brad Wu

IPC: G06F12/084 ,  G06F3/06 ,  G06F9/30 ,  G06F9/38 ,  G06F9/48 ,  G06F9/50 ,  G06F12/06 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0817 ,  G06F12/0831 ,  G06F12/0855 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/10 ,  G06F12/1009 ,  G06F13/12 ,  G06F13/16 ,  G06F13/40 ,  H03M13/01 ,  H03M13/09 ,  H03M13/15 ,  H03M13/27 ,  G06F12/0846 ,  G06F12/0862

CPC classification number: G06F3/0604 ,  G06F3/0607 ,  G06F3/0632 ,  G06F3/064 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679 ,  G06F9/30101 ,  G06F9/30123 ,  G06F9/3897 ,  G06F9/4881 ,  G06F9/5016 ,  G06F12/0607 ,  G06F12/0811 ,  G06F12/0815 ,  G06F12/0828 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/0855 ,  G06F12/0857 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/10 ,  G06F12/1009 ,  G06F13/124 ,  G06F13/1642 ,  G06F13/1663 ,  G06F13/1668 ,  G06F13/4027 ,  H03M13/015 ,  H03M13/098 ,  H03M13/1575 ,  H03M13/276 ,  H03M13/2785 ,  G06F12/0833 ,  G06F12/0846 ,  G06F12/0851 ,  G06F12/0862 ,  G06F2212/1008 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/1048 ,  G06F2212/304 ,  G06F2212/452 ,  G06F2212/6024 ,  G06F2212/657

Abstract: A device includes an arbiter circuit configured to receive a first request for a resource. The first request is associated with a first credit cost. The arbiter circuit is further configured to receive a second request for the resource. The second request is associated with a second credit cost. The arbiter circuit is further configured to select the first request for the resource as an arbitration winner. The arbiter circuit is further configured to decrement a number of available credits associated with the resource by the first credit cost. The arbiter circuit is further configured to, in response to the number of available credits associated with the resource falling to a lower credit threshold, wait until the number of available credits associated with the resource reaches an upper credit threshold to select an additional arbitration winner for the resource.

公开(公告)号：US12050809B2

公开(公告)日：2024-07-30

申请号：US17675888

申请日：2022-02-18

Applicant: Micron Technology, Inc.

Inventor： Sanjay Subbarao ,  Steven S. Williams ,  Mark Ish ,  John Edward Maroney

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/0673 ,  G06F12/10

Abstract: A memory sub-system having memory cells formed on a plurality of integrated circuit dies. After receiving a command from a host system to store data, the memory sub-system queues the command to allocate pages of memory cells in a plurality of dies in the plurality of integrated circuit dies based on a determination that each of the plurality of dies is available to perform a data programming operation for the command. Based on the page application, the memory sub-system generates a portion of a media layout to at least map logical addresses of the data identified in the command to the allocated pages and receives the data from the host system. The memory sub-system stores the data into the pages using a multi-pass programming technique, where an atomic multi-pass programming operation can be configured to use at least two pages in separate planes in one or more dies in the plurality of integrated circuit dies to program at least a portion of the data.

公开(公告)号：US12050804B2

公开(公告)日：2024-07-30

申请号：US17942821

申请日：2022-09-12

Applicant: Micron Technology, Inc.

Inventor： David Aaron Palmer

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0653 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/10 ,  G06F2212/657

Abstract: Methods, systems, and devices for valid data aware media reliability scanning are described. An apparatus may include a memory array comprising a plurality of blocks and a controller coupled with the memory array. The controller may be configured to select a block of the plurality of blocks for a scan operation to determine a margin of reliability for a first set of data stored in the block. The controller may identify information associated with a status of a validity of sub-blocks of the first set of data in the block. The controller may determine a first subset of the sub-blocks storing valid data of the first set of data and a second subset of sub-blocks that are invalid based on identifying the information. The controller may perform the scan operation on the first subset of sub-blocks and not on the second subset of sub-blocks in the block.

公开(公告)号：US20240201865A1

公开(公告)日：2024-06-20

申请号：US18336015

申请日：2023-06-16

Applicant: SK hynix Inc.

Inventor： Kwang Hun LEE ,  Ye Rin KIM ,  Bu Yong SONG ,  Jae Gwan KIM ,  Dong Young SEO ,  Won Jun CHOI

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679 ,  G06F12/10

Abstract: A memory system includes a memory device including a plurality of planes each including a plurality of memory blocks; and a memory controller for controlling the memory device to perform an operation on target blocks among the plurality of memory blocks, to store, in a replacement block, data stored in a bad block, on which the operation fails among the target blocks, and control the memory device to temporarily store, in a backup block, data stored in the other blocks except the bad block among the target blocks according to a number of free blocks included in the memory device.