公开(公告)号：US20240361799A1

公开(公告)日：2024-10-31

申请号：US18635817

申请日：2024-04-15

申请人： Rambus Inc.

发明人： Jun Kim ,  Pak Shing Chau ,  Wayne S. Richardson

IPC分类号： G06F1/08 ,  G06F1/10 ,  G06F13/16 ,  H03L7/07 ,  H03L7/081 ,  H03L7/099 ,  H04L7/00 ,  H04L7/10

CPC分类号： G06F1/08 ,  G06F1/10 ,  G06F13/1673 ,  G06F13/1689 ,  H03L7/07 ,  H03L7/0814 ,  H03L7/0995 ,  H04L7/0008 ,  H04L7/0033 ,  H04L7/10 ,  Y02D10/00

摘要： A memory system in which a timing drift that would occur in distribution of a first timing signal for data transport in a memory device is determined by measuring the actual phase delays occurring in a second timing signal that has a frequency lower than that of the first timing signal and is distributed in one or more circuits mimicking the drift characteristics of at least a portion of distribution of the first timing signal. The actual phase delays are determined in the memory device and provided to a memory controller so that the phases of the timing signals used for data transport may be adjusted based on the determined timing drift.

公开(公告)号：US20240346817A1

公开(公告)日：2024-10-17

申请号：US18756740

申请日：2024-06-27

申请人： Apple Inc.

发明人： Jeff GONION ,  Duncan Robert KERR

IPC分类号： G06V10/94 ,  G06F1/3231 ,  G06F3/00 ,  G06F3/0482 ,  G06F3/0485 ,  G06F18/40 ,  G06F21/32 ,  G06F21/62 ,  G06V40/16

CPC分类号： G06V10/945 ,  G06F1/3231 ,  G06F3/005 ,  G06F3/0482 ,  G06F3/0485 ,  G06F18/40 ,  G06F21/32 ,  G06F21/629 ,  G06V40/16 ,  G06V40/164 ,  G06V40/172 ,  Y02D10/00

摘要： Systems and methods are provided for control of a personal computing device based on user face detection and recognition techniques.

公开(公告)号：US12111714B2

公开(公告)日：2024-10-08

申请号：US18339963

申请日：2023-06-22

申请人： ATI Technologies ULC

发明人： Shahriar Pezeshgi ,  Jun Huang ,  Mohammad Hamed Mousazadeh ,  Alexander S. Duenas

IPC分类号： G06F1/32 ,  G06F1/3234 ,  G06F9/4401 ,  G06F9/445

CPC分类号： G06F1/3234 ,  G06F9/4411 ,  G06F9/44505 ,  Y02D10/00

摘要： A processing apparatus is provided which includes memory configured to store hardware parameter settings for each of a plurality of applications. The processing apparatus also includes a processor in communication with the memory configured to store, in the memory, the hardware parameter settings, identify one of the plurality of applications as a currently executing application and control an operation of hardware by tuning a plurality of hardware parameters according to the stored hardware parameter settings for the identified application.

公开(公告)号：US20240323090A1

公开(公告)日：2024-09-26

申请号：US18189879

申请日：2023-03-24

申请人： Cisco Technology, Inc.

发明人： Carlos Pignataro ,  Marcelo Yannuzzi

IPC分类号： H04L41/12

CPC分类号： H04L41/12 ,  G06Q50/06 ,  H04L43/08 ,  Y02D10/00

摘要： Described herein are embodiments related to systems, methods, and processes for sharing sustainability-related attributes and data across multiple domains. More specifically, some embodiments describe a sustainability aggregation device which may include a controller or other processor, and a memory. The memory includes a sustainability aggregation logic that can receive telemetry data associated with a first network domain, and in response, generate a multi-layer topology graph for the first network domain. In response to the graph being generated, it can be augmented with one or more sustainability-related attributes. However, the device can prune the augmented multi-layer topology graph based on one or more export policies and export the pruned augmented multi-layer topology graph to a second network domain. The multi-layer topology graph may also be utilized within a closed-loop system to monitor various aspects of the network domain and adjust one or more configurations as needed based on the received data.

公开(公告)号：US20240310894A1

公开(公告)日：2024-09-19

申请号：US18674328

申请日：2024-05-24

申请人： GOOGLE LLC

发明人： Hareesh Nagarajan ,  Surojit Chatterjee

IPC分类号： G06F1/3212 ,  G06F1/28 ,  G06F1/3234

CPC分类号： G06F1/3212 ,  G06F1/28 ,  G06F1/3234 ,  Y02D10/00

摘要： A method includes receiving, by one or more processors of at least one server and via a connection between the at least one server and a client device, a request for a content item to be presented at the client device, receiving, by the one or more processors, data indicative of a network speed of the client device at which the content item is to be presented, selecting, by the one or more processors and based on the data indicative of the network speed, a first content item, and providing, by the one or more processors and for presentation at the client device, the first content item via the connection between the at least one server and the client device.

公开(公告)号：US12093112B2

公开(公告)日：2024-09-17

申请号：US18058296

申请日：2022-11-23

申请人： AT&T Mobility II LLC

发明人： Stephen Thomas Hardin ,  Erie Lai Har Lau ,  Brian Greaves ,  Robert Osterwise

IPC分类号： G06F1/00 ,  G01C21/00 ,  G06F1/3206 ,  G06F1/3212 ,  G06F1/3287 ,  G06F1/3296 ,  G06F1/3203

CPC分类号： G06F1/3287 ,  G01C21/3867 ,  G06F1/3206 ,  G06F1/3212 ,  G06F1/3296 ,  G06F1/3203 ,  Y02D10/00

摘要： Power conservation for devices is facilitated based on likelihood of power usage level. An example method can comprise determining, by a first device comprising a processor, that a second device is within a defined proximity of a third device, wherein the third device is determined to be operating in a mode according to a first power consumption operation that satisfies a defined condition, and wherein the operating in the mode according to the first power consumption operation is based on the third device being located at a defined location. The method can also comprise facilitating, by the first device, modification of the mode of the third device based on a determination of a likelihood of usage of a second power consumption operation by the third device. In various embodiments, the third device is configured to operate according to the power save mode or the extended discontinuous reception mode.

公开(公告)号：US12092350B2

公开(公告)日：2024-09-17

申请号：US17485783

申请日：2021-09-27

申请人： Universal Electronics Inc.

发明人： Michael Hoffman

IPC分类号： G06F1/20 ,  F24F11/46 ,  F24F11/58 ,  F24F110/10

CPC分类号： F24F11/58 ,  F24F11/46 ,  F24F2110/10 ,  Y02D10/00

摘要： A system, apparatus and method for deactivating HVAC equipment when the thermostat determines that a door or a window has been opened. The thermostat determines that a door or window is open using one or more security sensors previously installed for use with a separate security system.

公开(公告)号：US12079060B2

公开(公告)日：2024-09-03

申请号：US17991718

申请日：2022-11-21

申请人： KIOXIA CORPORATION

发明人： Akihiro Kimura ,  Hiroki Matsushita

IPC分类号： G06F3/06 ,  G06F1/3234 ,  G06F11/14 ,  G06F12/02 ,  G11C5/14

CPC分类号： G06F1/3275 ,  G06F3/0619 ,  G06F11/1456 ,  G06F11/1458 ,  G06F12/0246 ,  G11C5/141 ,  G06F2212/1032 ,  G06F2212/7203 ,  Y02D10/00

摘要： According to one embodiment, the memory system includes a nonvolatile semiconductor memory, a data buffer, a volatile memory for storing a management table uniquely associates the user data with an address of the physical storage region of nonvolatile semiconductor memory, a controller that carries out a force quit process for writing the user data stored in a data buffer, the management table stored in volatile memory into the nonvolatile semiconductor memory, and a storage battery. The controller starts the force quit process prior to the power supply of the internal power supply regulator is switched from an external power supply to the storage battery.

公开(公告)号：US12073093B2

公开(公告)日：2024-08-27

申请号：US18449647

申请日：2023-08-14

申请人： KIOXIA CORPORATION

发明人： Daisuke Hashimoto

IPC分类号： G06F3/06 ,  G06F12/02 ,  G06F1/26 ,  G06F11/10 ,  G11C5/14 ,  G11C29/52

CPC分类号： G06F3/0619 ,  G06F3/0614 ,  G06F3/0625 ,  G06F12/0246 ,  G06F1/266 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0665 ,  G06F3/067 ,  G06F3/0683 ,  G06F3/0688 ,  G06F11/1068 ,  G06F2212/152 ,  G06F2212/214 ,  G06F2212/261 ,  G06F2212/263 ,  G06F2212/7201 ,  G06F2212/7211 ,  G11C5/144 ,  G11C5/147 ,  G11C5/148 ,  G11C29/52 ,  Y02D10/00

摘要： A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.

公开(公告)号：US12066853B2

公开(公告)日：2024-08-20

申请号：US18329492

申请日：2023-06-05

申请人： Intel Corporation

发明人： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC分类号： G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30 ,  G06F9/455

CPC分类号： G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30101 ,  G06F9/45558 ,  G06F2009/45591 ,  Y02D10/00

摘要： A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.