公开(公告)号：US12104423B2

公开(公告)日：2024-10-01

申请号：US17495651

申请日：2021-10-06

Applicant: Nice North America LLC

Inventor： Darren Learmonth ,  Jari Niemela ,  Gerald Dillon ,  Mark C. Mattson

IPC: E05F15/668 ,  E05F15/603 ,  E05F15/70 ,  E05F15/77 ,  G01R31/392 ,  G06F1/3203 ,  H02J9/06

CPC classification number: E05F15/668 ,  G01R31/392 ,  E05F15/603 ,  E05F15/70 ,  E05F15/77 ,  E05Y2400/36 ,  E05Y2400/452 ,  E05Y2400/502 ,  E05Y2400/614 ,  E05Y2900/106 ,  G06F1/3203 ,  H02J9/061

Abstract: In one aspect, a garage door opener system includes a battery configured to be charged by a power source, a controller coupled to the battery, the controller configured to operate a motor that is powered only by the battery, at least one sensor coupled to the motor and the controller, the at least one sensor generating sensor data, and a battery monitoring system coupled to the battery, the controller, and the least one sensor, the battery monitoring system configured to monitor a power consumption of the battery and a state of the battery, and to update an operation configuration of the controller based on historical power consumption of the battery, the state of the battery, and the sensor data.

公开(公告)号：US20240319859A1

公开(公告)日：2024-09-26

申请号：US18124914

申请日：2023-03-22

Applicant: GOOGLE LLC

Inventor： Martin Bruse ,  Matthew Sharifi

IPC: G06F3/04847 ,  G06F3/04842 ,  G06F3/16

CPC classification number: G06F3/04847 ,  G05B19/106 ,  G06F1/26 ,  G06F1/3203 ,  G06F3/04842 ,  G06F3/167

Abstract: Implementations set forth herein relate to an automated assistant that can control a sequence of operations for a routine according to whether power data indicates that energy expense and/or energy consumption can be preserved by modifying the sequence of operations for the routine. In some implementations, the automated assistant can suggest certain routines, and/or triggering conditions for operations of the routine, to reduce energy expense and/or energy consumption. Alternatively, or additionally, the automated assistant can infer certain operation requests or triggering conditions depending on whether the user has expressed an interest in preserving energy resources and expenses. In this way, the automated assistant can facilitate minimizing energy consumption and/or energy expenses without necessitating that the user exclusively, or manually, schedule all assistant operations with particularity.

公开(公告)号：US12093112B2

公开(公告)日：2024-09-17

申请号：US18058296

申请日：2022-11-23

Applicant: AT&T Mobility II LLC

Inventor： Stephen Thomas Hardin ,  Erie Lai Har Lau ,  Brian Greaves ,  Robert Osterwise

IPC: G06F1/00 ,  G01C21/00 ,  G06F1/3206 ,  G06F1/3212 ,  G06F1/3287 ,  G06F1/3296 ,  G06F1/3203

CPC classification number: G06F1/3287 ,  G01C21/3867 ,  G06F1/3206 ,  G06F1/3212 ,  G06F1/3296 ,  G06F1/3203 ,  Y02D10/00

Abstract: Power conservation for devices is facilitated based on likelihood of power usage level. An example method can comprise determining, by a first device comprising a processor, that a second device is within a defined proximity of a third device, wherein the third device is determined to be operating in a mode according to a first power consumption operation that satisfies a defined condition, and wherein the operating in the mode according to the first power consumption operation is based on the third device being located at a defined location. The method can also comprise facilitating, by the first device, modification of the mode of the third device based on a determination of a likelihood of usage of a second power consumption operation by the third device. In various embodiments, the third device is configured to operate according to the power save mode or the extended discontinuous reception mode.

公开(公告)号：US12081350B2

公开(公告)日：2024-09-03

申请号：US18050194

申请日：2022-10-27

Applicant: Juniper Networks, Inc.

Inventor： Oscar S. Ernohazy ,  Joshua Rosenthal ,  Jason Harris ,  John James Musante ,  Shmuel Shaffer

IPC: G06F1/00 ,  G06F1/3203 ,  H04L12/10 ,  H04L47/2425 ,  H04M7/00 ,  G06F1/26

CPC classification number: H04L12/10 ,  G06F1/3203 ,  H04L47/2433 ,  H04M7/006 ,  G06F1/26

Abstract: Embodiments are generally directed to managing power consumption of powered devices. In some embodiments, the powered devices draw power from a common source of power, which is limited. Under certain circumstances, exceeding the power limits can cause interruption of power to one or more of the devices, thus introducing a source of communication failures. To ensure reliable communications, an attempt to increase a power consumption of a first powered device in a power group is first reviewed to determine if the increase will cause a supplied power of the group to exceed a maximum power of the group. If the increase will cause the maximum power to be exceeded, the increase is modified, in some circumstances, to fit within the maximum power level. Alternatively, power consumption of a lower priority device is reduced to accommodate the requested power consumption increase.

公开(公告)号：US12066853B2

公开(公告)日：2024-08-20

申请号：US18329492

申请日：2023-06-05

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC: G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30 ,  G06F9/455

CPC classification number: G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30101 ,  G06F9/45558 ,  G06F2009/45591 ,  Y02D10/00

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

公开(公告)号：US12061509B2

公开(公告)日：2024-08-13

申请号：US18082494

申请日：2022-12-15

Applicant: International Business Machines Corporation

Inventor： Ramon Bertran Monfort ,  Pradeep Bhadravati Parashurama ,  Nitish Jindal ,  Alper Buyuktosunoglu

IPC: G06F1/00 ,  G06F1/30 ,  G06F1/3203 ,  G06F1/26

CPC classification number: G06F1/305 ,  G06F1/3203 ,  G06F1/26

Abstract: A computer-implemented method for detecting n-level slopes for a voltage level in a processor, wherein n is greater than 1, includes monitoring a voltage in a processor for a voltage level corresponding to a predefined first edge, and monitoring for a voltage level corresponding to a predefined second edge within a first count limit from detection of the predefined first edge. In response to detecting the predefined second edge within the first count limit, the computer-implemented method includes monitoring for a voltage level corresponding to a predefined third edge within a second count limit from detection of the predefined second edge, and in response to detecting the predefined third edge within the second count limit, determining whether to adjust a power applied to the processor based on the monitored voltage levels.

公开(公告)号：US12054052B2

公开(公告)日：2024-08-06

申请号：US17394967

申请日：2021-08-05

Applicant: Geotab Inc.

Inventor： Irene Ai May Wong ,  Kartheek Gajjala ,  Tessa Shuk Ling Kam ,  Cong Zhu ,  Stephen Michael Fox

IPC: B60L1/00 ,  G06F1/3203 ,  G08G1/00

CPC classification number: B60L1/00 ,  G06F1/3203 ,  G08G1/20

Abstract: Vehicles can employ onboard telematic monitoring devices to collect vehicle and operation data, such as for improved vehicle fleet management. Such telematic monitoring devices are dependent on power from a vehicle, such that data collection and communication can be interrupted if a telematic monitoring device is disconnected or has a poor connection. The present disclosure relates to battery devices, which provide power to telematic devices as needed in order to maintain data collection and communication, or other more limited functionality. The present disclosure also relates to systems including battery devices, and methods for operating battery devices.

公开(公告)号：US12050499B2

公开(公告)日：2024-07-30

申请号：US18349490

申请日：2023-07-10

Applicant: Wacom Co., Ltd.

Inventor： Shahrooz Shahparnia ,  Trond Jarle Pedersen ,  John Logan ,  Vemund Kval Bakken ,  Kishore Sundara-Rajan

IPC: G06F1/3203 ,  G06F3/0354 ,  G06F3/044

CPC classification number: G06F1/3203 ,  G06F3/03545 ,  G06F3/0441 ,  G06F3/0442

Abstract: In one embodiment, a stylus includes one or more electrodes and one or more computer-readable non-transitory storage media embodying first logic for transmitting signals wirelessly to a device through a touch-sensor of the device. The stylus has a first power mode in which components of the stylus for receiving signals from or transmitting signals to the device are powered off; a second power mode in which components of the stylus for receiving signals from the device are powered on at least periodically and components of the stylus for transmitting signals to the device are powered off; and a third power mode in which components of the stylus for transmitting signals to the device are powered on at least periodically. The media further embodies second logic for transitioning the stylus from one of the first, second, and third power modes to another one of the first, second, and third power modes.

公开(公告)号：US20240219987A1

公开(公告)日：2024-07-04

申请号：US18126495

申请日：2023-03-27

Applicant: Golnfinite FinTech Ltd.

Inventor： YUAN-CHENG HSU

IPC: G06F1/3203 ,  G06F1/20

CPC classification number: G06F1/3203 ,  G06F1/206

Abstract: A movable mining machine with dynamically adjustable computing power includes a computing unit having a plurality of chips connected in parallel, for calculating hash values of a block; a power unit capable of adjusting voltages sent to the plurality of chips; a sensing unit for sensing temperatures of the plurality of chips; a control unit capable of controlling the plurality of chips to calculate the hash values of the block on division of labor; a communication unit capable of transmitting the hash values of the block and a verification result via a network; wherein when the hash value calculated by any one of the plurality chips is verified as correct, the control unit controls the plurality of chips to stop calculating the hash values until the communication unit receives next block. The mining machine of the present invention can optimize the power consumption and computing performance of the chips.

公开(公告)号：US12019492B1

公开(公告)日：2024-06-25

申请号：US17408326

申请日：2021-08-20

Applicant: Kepler Computing Inc.

Inventor： Amrita Mathuriya ,  Christopher B. Wilkerson ,  Rajeev Kumar Dokania ,  Debo Olaosebikan ,  Sasikanth Manipatruni

IPC: G06F1/3203 ,  H01L23/367 ,  H01L23/538 ,  H02M3/10

CPC classification number: G06F1/3203 ,  H01L23/3677 ,  H01L23/5381 ,  H01L23/5385 ,  H01L23/5386 ,  H02M3/10 ,  H01L2924/37001

Abstract: A packaging technology to improve performance of an AI processing system resulting in an ultra-high bandwidth system. An IC package is provided which comprises: a substrate; a first die on the substrate, and a second die stacked over the first die. The first die can be a first logic die (e.g., a compute chip, CPU, GPU, etc.) while the second die can be a compute chiplet comprising ferroelectric or paraelectric logic. Both dies can include ferroelectric or paraelectric logic. The ferroelectric/paraelectric logic may include AND gates, OR gates, complex gates, majority, minority, and/or threshold gates, sequential logic, etc. The IC package can be in a 3D or 2.5D configuration that implements logic-on-logic stacking configuration. The 3D or 2.5D packaging configurations have chips or chiplets designed to have time distributed or spatially distributed processing. The logic of chips or chiplets is segregated so that one chip in a 3D or 2.5D stacking arrangement is hot at a time.