专利检索 cpc:"G06F11/141" 第 1 页

1.

发明申请
DIGEST LISTING DECOMPOSITION 审中-公开

公开(公告)号：US20190251061A1

公开(公告)日：2019-08-15

申请号：US16390530

申请日：2019-04-22

申请人： International Business Machines Corporation

发明人： Sebastien Vas , Zachary J. Mark , Jason K. Resch

IPC分类号： G06F16/13 , G06F11/14 , H04L29/06 , H04W12/04 , G06F11/07 , H04L9/32

CPC分类号： G06F16/13 , G06F11/0727 , G06F11/141 , G06F16/137 , G06F21/31 , G06F21/6209 , H04L9/3242 , H04L9/3247 , H04L9/3263 , H04L9/3271 , H04L63/0428 , H04L63/06 , H04L63/12 , H04L2209/043 , H04L2209/30 , H04L2209/34 , H04L2209/56 , H04L2209/80 , H04W12/04

摘要： To identify slice errors, a processing module of a computing device in a dispersed storage network (DSN) sends first list digest requests to at least first and second dispersed storage (DS) units. The requests indicates a first range of slice names to include in a first list digest. The processing module receives digest responses from the DS units, and compares the digest responses to determine whether they identify the same slices. If they do not identify the same slices, the processing module sends second list digest requests indicating a sub-range of the first range of slice names to include in second list digests. The sub-range continues to be narrowed until the processing module identifies at least one sub-range of slice names where a slice error exists.

2.

发明授权
Data storage system and method by shredding and deshredding 有权

公开(公告)号：US10083083B2

公开(公告)日：2018-09-25

申请号：US14321629

申请日：2014-07-01

申请人： CLEVERSAFE, INC.

发明人： Douglas R. de la Torre , David W. Young

IPC分类号： G06F17/30 , G06F11/14 , H03M7/30 , H04L9/32 , G06F21/60 , G06F11/10 , H03M13/29

CPC分类号： G06F11/141 , G06F11/1076 , G06F11/1402 , G06F16/2365 , G06F21/602 , G06F2201/80 , H03M7/30 , H03M13/29 , H04L9/3247 , H04L2209/30 , Y10S707/99942 , Y10S707/99943

摘要： A system and method for data storage by shredding and deshredding of the data allows for various combinations of processing of the data to provide various resultant storage of the data. Data storage and retrieval functions include various combinations of data redundancy generation, data compression and decompression, data encryption and decryption, and data integrity by signature generation and verification. Data shredding is performed by shredders and data deshredding is performed by deshredders that have some implementations that allocate processing internally in the shredder and deshredder either in parallel to multiple processors or sequentially to a single processor. Other implementations use multiple processing through multi-level shredders and deshredders. Redundancy generation includes implementations using non-systematic encoding, systematic encoding, or a hybrid combination. Shredder based tag generators and deshredder based tag readers are used in some implementations to allow the deshredders to adapt to various versions of the shredders.

3.

发明授权
Memory system having idle-memory devices and method of operating thereof 有权

公开(公告)号：US10037247B2

公开(公告)日：2018-07-31

申请号：US15048514

申请日：2016-02-19

申请人： SK hynix Inc.

发明人： Sung Yeob Cho , Dong Yeob Chun

IPC分类号： G06F11/00 , G06F11/14

CPC分类号： G06F11/141 , G06F11/1446 , G06F2201/805 , G06F2201/85

摘要： The memory system may include a memory device including a plurality of sub-memory devices coupled to a channel; and a controller suitable for controlling the memory device to store a first data into a selected sub-memory device and at least one idle sub-memory device among the sub-memory devices during a first program operation to a selected sub-memory device among the sub-memory devices with the first data with a first data; and to perform a second program operation to the selected sub-memory device with the first data stored in the idle sub-memory device when the first program operation to the selected sub-memory device fails.

4.

发明申请
TECHNOLOGIES FOR PERFORMING SPECULATIVE DECOMPRESSION 审中-公开

公开(公告)号：US20180205392A1

公开(公告)日：2018-07-19

申请号：US15854261

申请日：2017-12-26

申请人： Intel Corporation

发明人： Vinodh Gopal , James D. Guilford , Kirk S. Yap

IPC分类号： H03M7/40

CPC分类号： H03M7/3084 , B25J15/0014 , B65G1/0492 , G02B6/3882 , G02B6/3893 , G02B6/3897 , G02B6/4292 , G02B6/4452 , G05D23/1921 , G05D23/2039 , G06F1/183 , G06F3/061 , G06F3/0611 , G06F3/0616 , G06F3/0619 , G06F3/0625 , G06F3/0631 , G06F3/0638 , G06F3/064 , G06F3/0647 , G06F3/0653 , G06F3/0658 , G06F3/0659 , G06F3/0664 , G06F3/0665 , G06F3/067 , G06F3/0673 , G06F3/0679 , G06F3/0683 , G06F3/0688 , G06F3/0689 , G06F8/65 , G06F9/4401 , G06F9/5016 , G06F9/5044 , G06F9/505 , G06F9/5072 , G06F9/5077 , G06F11/141 , G06F11/3414 , G06F12/0862 , G06F12/0893 , G06F12/10 , G06F12/109 , G06F12/1408 , G06F13/161 , G06F13/1668 , G06F13/1694 , G06F13/4022 , G06F13/4068 , G06F13/409 , G06F13/42 , G06F13/4282 , G06F15/8061 , G06F17/30949 , G06F2209/5019 , G06F2209/5022 , G06F2212/1008 , G06F2212/1024 , G06F2212/1041 , G06F2212/1044 , G06F2212/152 , G06F2212/202 , G06F2212/401 , G06F2212/402 , G06F2212/7207 , G06Q10/06 , G06Q10/06314 , G06Q10/087 , G06Q10/20 , G06Q50/04 , G07C5/008 , G08C17/02 , G08C2200/00 , G11C5/02 , G11C5/06 , G11C7/1072 , G11C11/56 , G11C14/0009 , H03M7/30 , H03M7/3086 , H03M7/40 , H03M7/4031 , H03M7/4056 , H03M7/4081 , H03M7/6005 , H03M7/6023 , H04B10/25 , H04B10/2504 , H04L9/0643 , H04L9/14 , H04L9/3247 , H04L9/3263 , H04L12/2809 , H04L29/12009 , H04L41/024 , H04L41/046 , H04L41/0813 , H04L41/082 , H04L41/0896 , H04L41/12 , H04L41/145 , H04L41/147 , H04L41/5019 , H04L43/065 , H04L43/08 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L43/16 , H04L45/02 , H04L45/52 , H04L47/24 , H04L47/38 , H04L47/765 , H04L47/782 , H04L47/805 , H04L47/82 , H04L47/823 , H04L49/15 , H04L49/25 , H04L49/357 , H04L49/45 , H04L49/555 , H04L67/02 , H04L67/10 , H04L67/1004 , H04L67/1008 , H04L67/1012 , H04L67/1014 , H04L67/1029 , H04L67/1034 , H04L67/1097 , H04L67/12 , H04L67/16 , H04L67/306 , H04L67/34 , H04L69/04 , H04L69/329 , H04Q1/04 , H04Q11/00 , H04Q11/0003 , H04Q11/0005 , H04Q11/0062 , H04Q11/0071 , H04Q2011/0037 , H04Q2011/0041 , H04Q2011/0052 , H04Q2011/0073 , H04Q2011/0079 , H04Q2011/0086 , H04Q2213/13523 , H04Q2213/13527 , H04W4/023 , H04W4/80 , H05K1/0203 , H05K1/181 , H05K5/0204 , H05K7/1418 , H05K7/1421 , H05K7/1422 , H05K7/1447 , H05K7/1461 , H05K7/1485 , H05K7/1487 , H05K7/1489 , H05K7/1491 , H05K7/1492 , H05K7/1498 , H05K7/2039 , H05K7/20709 , H05K7/20727 , H05K7/20736 , H05K7/20745 , H05K7/20836 , H05K13/0486 , H05K2201/066 , H05K2201/10121 , H05K2201/10159 , H05K2201/10189 , Y02D10/14 , Y02D10/151 , Y02P90/30 , Y10S901/01

摘要： Technologies for performing speculative decompression include a managed node to decode a variable size code at a present position in compressed data with a deterministic decoder and concurrently perform speculative decodes over a range of subsequent positions in the compressed data, determine the position of the next code, determine whether the position of the next code is within the range, and output, in response to a determination that the position of the next code is within the range, a symbol associated with the deterministically decoded code and another symbol associated with a speculatively decoded code at the position of the next code.

5.

发明申请
TESTING A DATA COHERENCY ALGORITHM 审中-公开

公开(公告)号：US20180136998A1

公开(公告)日：2018-05-17

申请号：US15871452

申请日：2018-01-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Christian Habermann , Gerrit Koch , Martin Recktenwald , Ralf Winkelmann

IPC分类号： G06F11/07 , G06F11/14 , G06F11/22 , G06F12/0897 , G06F12/0891 , G06F12/0875 , G06F12/0842 , G06F12/0815 , G06F12/0811 , G06F12/0808 , G06F11/26

CPC分类号： G06F11/0724 , G06F11/141 , G06F11/1474 , G06F11/2242 , G06F11/261 , G06F12/0808 , G06F12/0811 , G06F12/0815 , G06F12/0837 , G06F12/0842 , G06F12/0875 , G06F12/0891 , G06F12/0897 , G06F2212/1032 , G06F2212/452 , G06F2212/6042 , G06F2212/621

摘要： Testing a data coherency algorithm of a multi-processor environment. The testing includes implementing a global time incremented every processor cycle and used for timestamping; implementing a transactional execution flag representing a processor core guaranteeing the atomicity and coherency of the currently executed instructions; implementing a transactional footprint, which keeps the address of each cache line that was used by the processor core; implementing a reference model, which operates on every cache line and keeps a set of timestamps for every cache line; implementing a core observed timestamp representing a global timestamp, which is the oldest construction date of data used before; implementing interface events; and reporting an error whenever a transaction end event is detected and any cache line is found in the transactional footprint with an expiration date that is older than or equal to the core observed time.

6.

发明授权
Testing a data coherency algorithm 有权

公开(公告)号：US09959155B2

公开(公告)日：2018-05-01

申请号：US15197534

申请日：2016-06-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Christian Habermann , Gerrit Koch , Martin Recktenwald , Ralf Winkelmann

IPC分类号： G06F11/00 , G06F11/07 , G06F12/0808 , G06F12/0811 , G06F12/0815 , G06F12/0842 , G06F12/0875 , G06F12/0891 , G06F12/0897 , G06F11/22 , G06F11/14 , G06F11/26

CPC分类号： G06F11/0724 , G06F11/141 , G06F11/1474 , G06F11/2242 , G06F11/261 , G06F12/0808 , G06F12/0811 , G06F12/0815 , G06F12/0842 , G06F12/0875 , G06F12/0891 , G06F12/0897 , G06F2212/1032 , G06F2212/452 , G06F2212/6042 , G06F2212/621

摘要： Testing a data coherency algorithm of a multi-processor environment. The testing includes implementing a global time incremented every processor cycle and used for timestamping; implementing a transactional execution flag representing a processor core guaranteeing the atomicity and coherency of the currently executed instructions; implementing a transactional footprint, which keeps the address of each cache line that was used by the processor core; implementing a reference model, which operates on every cache line and keeps a set of timestamps for every cache line; implementing a core observed timestamp representing a global timestamp, which is the oldest construction date of data used before; implementing interface events; and reporting an error whenever a transaction end event is detected and any cache line is found in the transactional footprint with an expiration date that is older than or equal to the core observed time.

7.

发明授权
Salvaging hardware transactions 有权

公开(公告)号：US09952943B2

公开(公告)日：2018-04-24

申请号：US15067491

申请日：2016-03-11

申请人： International Business Machines Corporation

发明人： Harold W. Cain, III , Michael Karl Gschwind , Maged M. Michael , Valentina Salapura , Eric M. Schwarz

IPC分类号： G06F11/00 , G06F11/14 , G06F12/02 , G06F9/46 , G06F11/07 , G06F9/30 , G06F9/38

CPC分类号： G06F11/1474 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3859 , G06F9/46 , G06F9/467 , G06F11/0724 , G06F11/0793 , G06F11/1402 , G06F11/1407 , G06F11/141 , G06F11/1451 , G06F12/02 , G06F2201/84

摘要： A transactional memory system salvages a partially executed hardware transaction. A processor of the transactional memory system saves state information in a first code region of a first hardware transaction. The processor executes an about-to-fail handler, the about-to-fail handler using the saved state information to determine whether the first hardware transaction is to be salvaged or to be aborted. The processor executing the about-to-fail handler, based on the transaction being to be salvaged, uses the saved state information to determine what portion of the first hardware transaction to salvage.