公开(公告)号：US07968445B2

公开(公告)日：2011-06-28

申请号：US12651758

申请日：2010-01-04

申请人： Yaojian Lin ,  Xu-Sheng Bao

发明人： Yaojian Lin ,  Xu-Sheng Bao

IPC分类号： H01L21/44

CPC分类号： H05K3/3452 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02163 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/1613 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/014

摘要： A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed over the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

摘要翻译： 倒装片式半导体封装具有在其上形成有多个有源器件的衬底。 接触垫形成在衬底上。 凸块下金属化（UBM）层与接触焊盘电接触。 钝化层形成在衬底上。 在一种情况下，UBM层设置在钝化层上方。 或者，钝化层设置在UBM层上。 去除钝化层的一部分以产生钝化岛。 钝化岛相对于接触焊盘居中，其顶表面没有UBM层。 在与UBM层电接触的钝化岛上形成焊料凸点。 钝化岛在焊料凸块中形成空隙以消除应力。 UBM层可以包括再分布层，使得钝化岛从接触垫偏移。

公开(公告)号：US20100105200A1

公开(公告)日：2010-04-29

申请号：US12651758

申请日：2010-01-04

申请人： Yaojian Lin ,  Xu-Sheng Bao

发明人： Yaojian Lin ,  Xu-Sheng Bao

IPC分类号： H01L21/60

CPC分类号： H05K3/3452 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02163 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/1613 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/014

摘要： A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed over the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

摘要翻译： 倒装片式半导体封装具有在其上形成有多个有源器件的衬底。 接触垫形成在衬底上。 凸块下金属化（UBM）层与接触焊盘电接触。 钝化层形成在衬底上。 在一种情况下，UBM层设置在钝化层上方。 或者，钝化层设置在UBM层上。 去除钝化层的一部分以产生钝化岛。 钝化岛相对于接触焊盘居中，其顶表面不含UBM层。 在与UBM层电接触的钝化岛上形成焊料凸点。 钝化岛在焊料凸块中形成空隙以消除应力。 UBM层可以包括再分布层，使得钝化岛从接触垫偏移。

公开(公告)号：US07667335B2

公开(公告)日：2010-02-23

申请号：US11858749

申请日：2007-09-20

申请人： Yaojian Lin ,  Xu Sheng Bao

发明人： Yaojian Lin ,  Xu Sheng Bao

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/3452 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02163 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/1613 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/014

摘要： A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

摘要翻译： 倒装片式半导体封装具有在其上形成有多个有源器件的衬底。 在基板上形成接触垫。 凸块下金属化（UBM）层与接触焊盘电接触。 钝化层形成在衬底上。 在一种情况下，UBM层设置在钝化层上方。 或者，钝化层设置在UBM层上。 去除钝化层的一部分以产生钝化岛。 钝化岛相对于接触焊盘居中，其顶表面没有UBM层。 在与UBM层电接触的钝化岛上形成焊料凸点。 钝化岛在焊料凸块中形成空隙以消除应力。 UBM层可以包括再分布层，使得钝化岛从接触垫偏移。

公开(公告)号：US20090079070A1

公开(公告)日：2009-03-26

申请号：US11858749

申请日：2007-09-20

申请人： Yaojian Lin ,  Xu Sheng Bao

发明人： Yaojian Lin ,  Xu Sheng Bao

IPC分类号： H01L23/52 ,  H01L21/60

CPC分类号： H05K3/3452 ,  H01L23/525 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02163 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/131 ,  H01L2224/1613 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/30105 ,  H05K1/112 ,  H05K3/3436 ,  H05K3/3457 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/099 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/014

摘要： A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

摘要翻译： 倒装片式半导体封装具有在其上形成有多个有源器件的衬底。 在基板上形成接触垫。 凸块下金属化（UBM）层与接触焊盘电接触。 钝化层形成在衬底上。 在一种情况下，UBM层设置在钝化层上方。 或者，钝化层设置在UBM层上。 去除钝化层的一部分以产生钝化岛。 钝化岛相对于接触焊盘居中，其顶表面没有UBM层。 在与UBM层电接触的钝化岛上形成焊料凸点。 钝化岛在焊料凸块中形成空隙以消除应力。 UBM层可以包括再分布层，使得钝化岛从接触垫偏移。

公开(公告)号：US09685495B2

公开(公告)日：2017-06-20

申请号：US13423265

申请日：2012-03-18

申请人： Yaojian Lin

发明人： Yaojian Lin

IPC分类号： H05K7/00 ,  H01L49/02 ,  H01L23/14 ,  H01L23/498 ,  H01L23/64 ,  H01L27/01 ,  H01L23/522 ,  H01L23/00

CPC分类号： H01L28/10 ,  H01L23/145 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L24/48 ,  H01L27/016 ,  H01L28/24 ,  H01L28/60 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/73207 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is made by depositing an encapsulant material between first and second plates of a chase mold to form a molded substrate. A first conductive layer is formed over the molded substrate. A resistive layer is formed over the first conductive layer. A first insulating layer is formed over the resistive layer. A second insulating layer is formed over the first insulating layer, resistive layer, first conductive layer, and molded substrate. A second conductive layer is formed over the first insulating layer, resistive layer, and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. A bump is formed over the second conductive layer. The first conductive layer, resistive layer, first insulating layer, and second conductive layer constitute a MIM capacitor. The second conductive layer is wound to exhibit inductive properties.

公开(公告)号：US09324700B2

公开(公告)日：2016-04-26

申请号：US12205727

申请日：2008-09-05

申请人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

发明人： Yaojian Lin ,  Jianmin Fang ,  Kang Chen ,  Haijing Cao

IPC分类号： H01L23/552 ,  H01L27/01 ,  H01L27/07

CPC分类号： H01L25/0657 ,  H01L23/552 ,  H01L25/50 ,  H01L27/016 ,  H01L27/0711 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2225/06531 ,  H01L2225/06537 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device is made by providing a substrate, forming a first insulation layer over the substrate, forming a first conductive layer over the first insulation layer, forming a second insulation layer over the first conductive layer, and forming a second conductive layer over the second insulation layer. A portion of the second insulation layer, first conductive layer, and second conductive layer form an integrated passive device (IPD). The IPD can be an inductor, capacitor, or resistor. A plurality of conductive pillars is formed over the second conductive layer. One conductive pillar removes heat from the semiconductor device. A third insulation layer is formed over the IPD and around the plurality of conductive pillars. A shield layer is formed over the IPD, third insulation layer, and conductive pillars. The shield layer is electrically connected to the conductive pillars to shield the IPD from electromagnetic interference.

摘要翻译： 半导体器件通过提供衬底制成，在衬底上形成第一绝缘层，在第一绝缘层上形成第一导电层，在第一导电层上形成第二绝缘层，并在第二绝缘层上形成第二导电层 绝缘层。 第二绝缘层，第一导电层和第二导电层的一部分形成集成的无源器件（IPD）。 IPD可以是电感，电容或电阻。 多个导电柱形成在第二导电层上。 一个导电柱从半导体器件中去除热量。 在IPD上并围绕多个导电柱形成第三绝缘层。 在IPD，第三绝缘层和导电柱上形成屏蔽层。 屏蔽层电连接到导电柱以屏蔽IPD免受电磁干扰。

公开(公告)号：US09318441B2

公开(公告)日：2016-04-19

申请号：US12794598

申请日：2010-06-04

申请人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

发明人： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo

IPC分类号： H01L23/52 ,  H01L21/50 ,  H01L21/56 ,  H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L23/5389 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/20 ,  H01L24/48 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16225 ,  H01L2224/214 ,  H01L2224/221 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73265 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2224/13099 ,  H01L2224/19 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor wafer contains a plurality of semiconductor die each having a plurality of contact pads. A sacrificial adhesive is deposited over the contact pads. Alternatively, the sacrificial adhesive is deposited over the carrier. An underfill material can be formed between the contact pads. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is mounted to a temporary carrier such that the sacrificial adhesive is disposed between the contact pads and temporary carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier and sacrificial adhesive is removed to leave a via over the contact pads. An interconnect structure is formed over the encapsulant. The interconnect structure includes a conductive layer which extends into the via for electrical connection to the contact pads. The semiconductor die is offset from the interconnect structure by a height of the sacrificial adhesive.

摘要翻译： 半导体晶片包含多个具有多个接触焊盘的半导体管芯。 牺牲粘合剂沉积在接触垫上。 或者，牺牲粘合剂沉积在载体上。 可以在接触垫之间形成底部填充材料。 单个半导体晶片以分离半导体管芯。 将半导体管芯安装到临时载体上，使得牺牲粘合剂设置在接触垫和临时载体之间。 密封剂沉积在半导体管芯和载体上。 去除载体和牺牲粘合剂以在接触垫上留下通孔。 在密封剂上形成互连结构。 互连结构包括延伸到通孔中以与接触焊盘电连接的导电层。 半导体管芯通过牺牲粘合剂的高度与互连结构偏移。

公开(公告)号：US09257356B2

公开(公告)日：2016-02-09

申请号：US12332253

申请日：2008-12-10

申请人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

发明人： Rui Huang ,  Heap Hoe Kuan ,  Yaojian Lin ,  Seng Guan Chow

IPC分类号： H01L49/02 ,  H01L23/31 ,  H01L21/56 ,  H01L23/495 ,  H01L23/498 ,  H01L23/552 ,  H01L23/66 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L25/03

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/568 ,  H01L23/495 ,  H01L23/49506 ,  H01L23/49541 ,  H01L23/49816 ,  H01L23/552 ,  H01L23/66 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/27416 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/73265 ,  H01L2224/83136 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83385 ,  H01L2224/83856 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/0665 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/8384 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device has a conductive layer formed on a substrate. The conductive layer has a first portion constituting contact pads and a second portion constituting an integrated passive device such as an inductor. A spacer is formed on the substrate around the second portion of the conductive layer. The spacer can be insulating material or conductive material for shielding. A semiconductor die is mounted to the spacer. An electrical connection is formed between contact pads on the semiconductor die and the contact pads on the substrate. An encapsulant is formed around the semiconductor die, electrical connections, spacer, and conductive layer. The substrate is removed to expose the conductive layer. An interconnect structure is formed on the backside of the substrate. The interconnect structure is electrically connected to the conductive layer. The semiconductor device can be integrated into a package.

摘要翻译： 半导体器件具有形成在衬底上的导电层。 导电层具有构成接触焊盘的第一部分和构成诸如电感器的集成无源器件的第二部分。 在导电层的第二部分周围的基板上形成间隔物。 间隔物可以是用于屏蔽的绝缘材料或导电材料。 将半导体管芯安装到间隔件上。 在半导体管芯上的接触焊盘和衬底上的接触焊盘之间形成电连接。 在半导体管芯，电连接，间隔物和导电层周围形成密封剂。 去除衬底以暴露导电层。 在基板的背面形成互连结构。 互连结构电连接到导电层。 半导体器件可以集成到封装中。

公开(公告)号：US09082806B2

公开(公告)日：2015-07-14

申请号：US13191318

申请日：2011-07-26

申请人： Yaojian Lin ,  Kang Chen

发明人： Yaojian Lin ,  Kang Chen

IPC分类号： H01L23/522 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552 ,  H01L25/065 ,  H01L25/10 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/04 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/54426 ,  H01L2224/03002 ,  H01L2224/03003 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/0613 ,  H01L2224/12105 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14104 ,  H01L2224/16111 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/24137 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/82005 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2224/11 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/13015 ,  H01L2224/81

摘要： A semiconductor device has a temporary carrier. A semiconductor die is oriented with an active surface toward, and mounted to, the temporary carrier. An encapsulant is deposited with a first surface over the temporary carrier and a second surface, opposite the first surface, is deposited over a backside of the semiconductor die. The temporary carrier is removed. A portion of the encapsulant in a periphery of the semiconductor die is removed to form an opening in the first surface of the encapsulant. An interconnect structure is formed over the active surface of the semiconductor die and extends into the opening in the encapsulant layer. A via is formed and extends from the second surface of the encapsulant to the opening. A first bump is formed in the via and electrically connects to the interconnect structure.

摘要翻译： 半导体器件具有临时载体。 半导体管芯被定向成具有朝着临时载体并且安装到临时载体的有源表面。 密封剂在临时载体上沉积有第一表面，并且与第一表面相对的第二表面沉积在半导体管芯的背面上。 移除临时载体。 去除半导体管芯的周边中的密封剂的一部分，以在密封剂的第一表面中形成开口。 互连结构形成在半导体管芯的有源表面上并延伸到密封剂层中的开口中。 通孔形成并从密封剂的第二表面延伸到开口。 在通孔中形成第一凸起并且电连接到互连结构。

公开(公告)号：US09030002B2

公开(公告)日：2015-05-12

申请号：US13090590

申请日：2011-04-20

申请人： Yaojian Lin

发明人： Yaojian Lin

IPC分类号： H01L23/053 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H01L49/02 ,  H01L23/00

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49827 ,  H01L24/48 ,  H01L28/10 ,  H01L28/24 ,  H01L28/60 ,  H01L2221/68359 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device includes an interface layer, a smooth conductive layer disposed over the interface layer, and a first insulating layer disposed over a first surface of the smooth conductive layer. A first conductive layer is disposed over the first insulating layer and the interface layer, and the first conductive layer contacts the first insulating layer. A second insulating layer is disposed over the second insulating layer and the first conductive layer, and a second conductive layer is disposed below the first conductive layer and contacts a second surface of the smooth conductive layer. The second surface of the smooth conductive layer is opposite the first surface of the smooth conductive layer. A third insulating layer is disposed over the first insulating layer and the first surface of the smooth conductive layer, and a fourth insulating layer is disposed below the second conductive layer and the interface layer.

摘要翻译： 半导体器件包括界面层，设置在界面层上的平滑导电层，以及设置在平滑导电层的第一表面上的第一绝缘层。 第一导电层设置在第一绝缘层和界面层之上，并且第一导电层接触第一绝缘层。 第二绝缘层设置在第二绝缘层和第一导电层上，第二导电层设置在第一导电层的下方并与平滑导电层的第二表面接触。 光滑导电层的第二表面与光滑导电层的第一表面相对。 第三绝缘层设置在第一绝缘层和平滑导电层的第一表面之上，第四绝缘层设置在第二导电层和界面层的下方。