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    FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME
    6.
    发明申请
    FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME 有权
    场效应晶体管及其制造方法

    公开(公告)号：US20160005864A1

    公开(公告)日：2016-01-07

    申请号：US14723673

    申请日：2015-05-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： TaeYong Kwon ,  Shigenobu Maeda ,  David Seo ,  Jae-Hwan Lee

    IPC: H01L29/78 ,  H01L29/08 ,  H01L29/165

    CPC classification number: H01L29/7849 ,  H01L29/0843 ,  H01L29/0847 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7842 ,  H01L29/7848 ,  H01L29/785

    Abstract: A MOSFET may be formed with a strain-inducing mismatch of lattice constants that improves carrier mobility. In exemplary embodiments a MOSFET includes a strain-inducing lattice constant mismatch that is not undermined by a recessing step. In some embodiments a source/drain pattern is grown without a recessing step, thereby avoiding problems associated with a recessing step. Alternatively, a recessing process may be performed in a way that does not expose top surfaces of a strain-relaxed buffer layer. A MOSFET device layer, such as a strain-relaxed buffer layer or a device isolation layer, is unaffected by a recessing step and, as a result, strain may be applied to a channel region without jeopardizing subsequent formation steps.

    Abstract translation: 可以形成MOSFET，其具有改善载流子迁移率的晶格常数的应变诱导失配。 在示例性实施例中，MOSFET包括不会被凹陷步骤破坏的应变诱导晶格常数失配。 在一些实施例中，源/漏图案在没有凹陷步骤的情况下生长，从而避免与凹陷步骤相关的问题。 或者，可以以不暴露应变松弛缓冲层的顶表面的方式执行凹陷处理。 诸如应变松弛缓冲层或器件隔离层的MOSFET器件层不受凹陷步骤的影响，结果可能将应变施加到沟道区而不会影响随后的形成步骤。

    Graphene switching device having tunable barrier
    8.
    发明授权
    Graphene switching device having tunable barrier 有权
    石墨烯开关装置具有可调屏障

    公开(公告)号：US09048310B2

    公开(公告)日：2015-06-02

    申请号：US13964353

    申请日：2013-08-12

    Applicant: Samsung Electronics Co., Ltd. ,  Seoul National University R & DB Foundation

    Inventor： Jae-ho Lee ,  Seong-jun Park ,  Kyung-eun Byun ,  David Seo ,  Hyun-jae Song ,  Hyung-cheol Shin ,  Jae-hong Lee ,  Hyun-jong Chung ,  Jin-seong Heo

    IPC: H01L29/02 ,  H01L29/78

    CPC classification number: H01L29/78 ,  H01L29/1606 ,  H01L29/407 ,  H01L29/66977 ,  H01L29/772 ,  H01L29/872 ,  H01L29/88

    Abstract: According to example embodiments, a graphene switching devices having a tunable barrier includes a semiconductor substrate that includes a first well doped with an impurity, a first electrode on a first area of the semiconductor substrate, an insulation layer on a second area of the semiconductor substrate, a graphene layer on the insulation layer and extending onto the semiconductor substrate toward the first electrode, a second electrode on the graphene layer and insulation layer, a gate insulation layer on the graphene layer, and a gate electrode on the gate insulation layer. The first area and the second area of the semiconductor substrate may be spaced apart from each other. The graphene layer is spaced apart from the first electrode. A lower portion of the graphene layer may contact the first well. The first well is configured to form an energy barrier between the graphene layer and the first electrode.

    Abstract translation: 根据示例实施例，具有可调谐屏障的石墨烯开关器件包括半导体衬底，其包括掺杂有杂质的第一阱，在半导体衬底的第一区域上的第一电极，在半导体衬底的第二区域上的绝缘层 在所述绝缘层上的石墨烯层，并且朝向所述第一电极延伸到所述半导体衬底上，所述石墨烯层和绝缘层上的第二电极，所述石墨烯层上的栅极绝缘层和所述栅极绝缘层上的栅极电极。 半导体衬底的第一区域和第二区域可以彼此间隔开。 石墨烯层与第一电极间隔开。 石墨烯层的下部可以接触第一孔。 第一阱被配置为在石墨烯层和第一电极之间形成能量势垒。

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