公开(公告)号：US11728292B2

公开(公告)日：2023-08-15

申请号：US16779217

申请日：2020-01-31

申请人： MediaTek Inc.

发明人： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Wei-Che Huang ,  Che-Ya Chou

IPC分类号： H01L23/552 ,  H01L23/66 ,  H01L23/538 ,  H01L25/16 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498

CPC分类号： H01L23/66 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L25/16 ,  H01L23/49816 ,  H01L25/105 ,  H01L2223/6677 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1421 ,  H01L2924/1435 ,  H01L2924/1438 ,  H01L2924/19011 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025

摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first redistribution layer (RDL) structure having a first surface and a second surface opposite to the first substrate. The first RDL structure includes a plurality of first conductive traces close to the first surface of the first RDL structure. An antenna pattern is disposed close to the second surface of the first RDL structure. A first semiconductor die is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. A plurality of conductive structures is disposed on the first surface of the first RDL structure and electrically coupled to the first RDL structure. The plurality of conductive structures is spaced apart from the antenna pattern through the plurality of first conductive traces of the first RDL structure.

公开(公告)号：US10468341B2

公开(公告)日：2019-11-05

申请号：US16232129

申请日：2018-12-26

申请人： MEDIATEK INC.

发明人： Nai-Wei Liu ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Che-Hung Kuo ,  Che-Ya Chou ,  Wei-Che Huang

IPC分类号： H01L23/485 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538 ,  H01L25/10

摘要： A semiconductor package assembly includes a redistribution layer (RDL) structure, which RDL structure includes a conductive trace. A redistribution layer (RDL) contact pad is electrically coupled to the conductive trace, and the RDL contact pad is composed of a symmetrical portion and an extended wing portion connected to the symmetrical portion. The RDL structure includes a first region for a semiconductor die to be disposed thereon and a second region surrounding the first region, and the extended wing portion of the RDL contact pad is offset from a center of the first region.

公开(公告)号：US10147674B2

公开(公告)日：2018-12-04

申请号：US15613333

申请日：2017-06-05

申请人： MEDIATEK Inc.

发明人： Tung-Hsien Hsieh ,  Che-Ya Chou

IPC分类号： H01L23/49 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10

摘要： Various structures of a semiconductor package assembly are provided. In one implementation, a semiconductor package assembly includes a redistribution layer (RDL) structure die-attach surface and a bump-attach surface opposite the die-attach surface. A semiconductor die is mounted on the die-attach surface of the redistribution layer (RDL) structure. A first solder mask layer disposed on the die-attach surface, surrounding the semiconductor die. Further, a first conductive bump disposed over the first solder mask, coupled to a first pad of the redistribution layer (RDL) structure through a single circuit structure on a portion the first solder mask layer, wherein a first distance between a center of the first pad and a sidewall of the semiconductor die, which is close to the first pad, is equal to or greater than a second distance between a center of the first conductive bump and the sidewall of the semiconductor die.

公开(公告)号：US20170271265A1

公开(公告)日：2017-09-21

申请号：US15613144

申请日：2017-06-03

申请人： MEDIATEK INC.

发明人： Shih-Yi Syu ,  Tung-Hsien Hsieh ,  Che-Ya Chou

IPC分类号： H01L23/538 ,  H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L23/532 ,  H01L23/498

CPC分类号： H01L23/5386 ,  H01L23/291 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/525 ,  H01L23/53228 ,  H01L23/5384 ,  H01L23/66 ,  H01L24/05 ,  H01L24/09 ,  H01L24/17 ,  H01L24/20 ,  H01L24/24 ,  H01L24/25 ,  H01L24/96 ,  H01L25/0655 ,  H01L2224/02331 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/244 ,  H01L2224/245 ,  H01L2224/25175 ,  H01L2224/73209 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014

摘要： An RDL structure on a passivation layer includes a first landing pad disposed directly above a first on-chip metal pad; a first via in a passivation layer to electrically connect the first landing pad with the first on-chip metal pad; a second landing pad disposed directly above the second on-chip metal pad; a second via in the passivation layer to electrically connect the second landing pad with the second on-chip metal pad; and at least five traces being disposed on the passivation layer and passing through a space between the first landing pad and the second landing pad.

公开(公告)号：US20150097277A1

公开(公告)日：2015-04-09

申请号：US14045803

申请日：2013-10-04

申请人： MEDIATEK INC.

发明人： Nan-Cheng Chen ,  Che-Ya Chou

IPC分类号： H01L23/498 ,  H01L25/07

CPC分类号： H01L25/18 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49861 ,  H01L23/49866 ,  H01L24/09 ,  H01L24/17 ,  H01L24/19 ,  H01L25/03 ,  H01L25/0655 ,  H01L2224/0912 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/141 ,  H01L2924/142 ,  H01L2924/1421 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

摘要： A system-in-package includes a package carrier; a first semiconductor die having a die face and a die edge, the first semiconductor die being assembled face-down to a chip side of the package carrier, wherein a plurality of contact pads are situated on the die face; a second semiconductor die mounted on the package carrier and adjacent to the first semiconductor die; a rewiring laminate structure between the first semiconductor die and the package carrier, the rewiring laminate structure comprising a re-routed metal layer, wherein at least a portion of the re-routed metal layer projects beyond the die edge; and a plurality of copper pillar bumps arranged on the rewiring laminate structure for electrically connecting the first semiconductor die with the package carrier.

摘要翻译： 系统级封装包括封装载体; 第一半导体管芯，其具有管芯面和管芯边缘，所述第一半导体管芯正面朝下地组装到所述封装载体的芯片侧，其中，多个接触焊盘位于所述管芯面上; 安装在所述封装载体上并与所述第一半导体管芯相邻的第二半导体管芯; 在所述第一半导体管芯和所述封装载体之间的再布线层压结构，所述重新布线层压结构包括重新布线的金属层，其中所述重新布线的金属层的至少一部分突出超过所述管芯边缘; 以及布置在重新布线层压结构上的多个铜柱凸块，用于将第一半导体管芯与封装载体电连接。

公开(公告)号：US11837552B2

公开(公告)日：2023-12-05

申请号：US17748308

申请日：2022-05-19

申请人： MediaTek Inc.

发明人： Wen-Sung Hsu ,  Tao Cheng ,  Nan-Cheng Chen ,  Che-Ya Chou ,  Wen-Chou Wu ,  Yen-Ju Lu ,  Chih-Ming Hung ,  Wei-Hsiu Hsu

IPC分类号： H01L23/373 ,  H01L21/52 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/07 ,  H01L25/00 ,  H01L29/739 ,  H01L29/861 ,  H01L23/051 ,  H01L25/18 ,  H01L23/495 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10 ,  H01L25/16 ,  H01L23/50 ,  H01L21/683 ,  H01Q9/04 ,  H01L23/66 ,  H01Q1/22 ,  H01L23/14 ,  H01Q21/06

CPC分类号： H01L23/5389 ,  H01L21/486 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/66 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L25/165 ,  H01L25/50 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/0414 ,  H01L23/145 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1533 ,  H01L2924/1579 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01Q21/065 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/45099

摘要： A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US11244913B2

公开(公告)日：2022-02-08

申请号：US16699851

申请日：2019-12-02

申请人： MEDIATEK Inc.

发明人： Ying-Chih Chen ,  Yen-Ju Lu ,  Che-Ya Chou ,  Hsing-Chih Liu

IPC分类号： H01L23/66 ,  H01L23/31 ,  H01L23/528 ,  H01L23/532 ,  H01Q1/22

摘要： A semiconductor package includes a substrate, an electronic component, a dielectric layer a transmitting antenna, a receiving antenna and a FSS (Frequency selective surface) antenna. The electronic component is disposed on and electrically connected with the substrate. The dielectric layer has a dielectric upper surface. The transmitting antenna and the receiving antenna are formed adjacent to the substrate. The FSS antenna is formed adjacent to the dielectric upper surface of the dielectric layer. The FSS antenna is separated from the substrate by the dielectric layer in a wireless signal emitting direction.

公开(公告)号：US20210202425A1

公开(公告)日：2021-07-01

申请号：US17199237

申请日：2021-03-11

申请人： MediaTek Inc.

发明人： Che-Ya Chou ,  Wen-Sung Hsu ,  Nan-Cheng Chen

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/367 ,  H01L25/065 ,  H05K1/11

摘要： A semiconductor package is provided. The semiconductor package includes a semiconductor device bonded to a base through a first conductive structure. The semiconductor device includes a carrier substrate including a conductive trace. A portion of the conductive trace is elongated. The semiconductor device also includes a second conductive structure above the carrier substrate. A portion of the second conductive structure is in contact with the portion of the conductive trace. The semiconductor device further includes a semiconductor body mounted above the conductive trace. The semiconductor body is connected to the second conductive structure.

公开(公告)号：US20190355697A1

公开(公告)日：2019-11-21

申请号：US16398228

申请日：2019-04-29

申请人： MEDIATEK INC.

发明人： Min-Chen Lin ,  Yi-Hui Lee ,  Che-Ya Chou ,  Nan-Cheng Chen

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/528 ,  H01L23/522

摘要： An electronic package configured to operate at Gigabit-per-second (Gbps) data rates is disclosed. The electronic package includes a package substrate of a rectangular shape. A chip package having a first high-speed interface circuit die is mounted on a top surface of the package substrate. The chip package is rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through about 45 degrees. The first high-speed interface circuit die includes a first Serializer/Deserializer (SerDes) circuit block.

公开(公告)号：US10103128B2

公开(公告)日：2018-10-16

申请号：US15588690

申请日：2017-05-07

申请人： MEDIATEK INC.

发明人： Che-Ya Chou ,  Kun-Ting Hung ,  Chia-Hao Yang ,  Nan-Cheng Chen

IPC分类号： H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/03 ,  H01L25/16 ,  H01L25/18 ,  H01L25/00 ,  H01L21/56

摘要： A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.