公开(公告)号：US11908759B2

公开(公告)日：2024-02-20

申请号：US17190584

申请日：2021-03-03

Applicant: MediaTek Inc.

Inventor： Nan-Cheng Chen ,  Che-Ya Chou ,  Hsing-Chih Liu ,  Che-Hung Kuo

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L23/48 ,  H01L23/482 ,  H01L25/04 ,  H01L23/14 ,  H01L25/18

CPC classification number: H01L23/31 ,  H01L23/481 ,  H01L23/4824 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/20 ,  H01L25/043 ,  H01L25/0652 ,  H01L25/0655 ,  H01L23/145 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/3135 ,  H01L25/18 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2225/06541 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/1434 ,  H01L2924/157 ,  H01L2924/15311 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a semiconductor die, a molding compound, a conductive component and a lower redistribution layer (RDL). The semiconductor die has an active surface. The molding compound encapsulates the semiconductor die and has a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface. The conductive component is formed within the through hole. The lower RDL is formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface. The electronic component is disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.

公开(公告)号：US20220352084A1

公开(公告)日：2022-11-03

申请号：US17748308

申请日：2022-05-19

Applicant: MediaTek Inc.

Inventor： Wen-Sung Hsu ,  Tao Cheng ,  Nan-Cheng Chen ,  Che-Ya Chou ,  Wen-Chou Wu ,  Yen-Ju Lu ,  Chih-Ming Hung ,  Wei-Hsiu Hsu

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L23/31 ,  H01L25/065 ,  H01L25/16 ,  H01L23/50 ,  H01L23/498 ,  H01L21/683 ,  H01Q9/04 ,  H01L23/66 ,  H01Q1/22

Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US20170243858A1

公开(公告)日：2017-08-24

申请号：US15588690

申请日：2017-05-07

Applicant: MEDIATEK INC.

Inventor： Che-Ya Chou ,  Kun-Ting Hung ,  Chia-Hao Yang ,  Nan-Cheng Chen

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2223/6677 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/85005 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/141 ,  H01L2924/142 ,  H01L2924/1421 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/83005 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48247

Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.

公开(公告)号：US11837552B2

公开(公告)日：2023-12-05

申请号：US17748308

申请日：2022-05-19

Applicant: MediaTek Inc.

Inventor： Wen-Sung Hsu ,  Tao Cheng ,  Nan-Cheng Chen ,  Che-Ya Chou ,  Wen-Chou Wu ,  Yen-Ju Lu ,  Chih-Ming Hung ,  Wei-Hsiu Hsu

IPC: H01L23/373 ,  H01L21/52 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/07 ,  H01L25/00 ,  H01L29/739 ,  H01L29/861 ,  H01L23/051 ,  H01L25/18 ,  H01L23/495 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10 ,  H01L25/16 ,  H01L23/50 ,  H01L21/683 ,  H01Q9/04 ,  H01L23/66 ,  H01Q1/22 ,  H01L23/14 ,  H01Q21/06

CPC classification number: H01L23/5389 ,  H01L21/486 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/66 ,  H01L25/0657 ,  H01L25/10 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L25/165 ,  H01L25/50 ,  H01Q1/2283 ,  H01Q9/0407 ,  H01Q9/0414 ,  H01L23/145 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/81005 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/1533 ,  H01L2924/1579 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01Q21/065 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/45099

Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.

公开(公告)号：US20210202425A1

公开(公告)日：2021-07-01

申请号：US17199237

申请日：2021-03-11

Applicant: MediaTek Inc.

Inventor： Che-Ya Chou ,  Wen-Sung Hsu ,  Nan-Cheng Chen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/367 ,  H01L25/065 ,  H05K1/11

Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor device bonded to a base through a first conductive structure. The semiconductor device includes a carrier substrate including a conductive trace. A portion of the conductive trace is elongated. The semiconductor device also includes a second conductive structure above the carrier substrate. A portion of the second conductive structure is in contact with the portion of the conductive trace. The semiconductor device further includes a semiconductor body mounted above the conductive trace. The semiconductor body is connected to the second conductive structure.

公开(公告)号：US20190355697A1

公开(公告)日：2019-11-21

申请号：US16398228

申请日：2019-04-29

Applicant: MEDIATEK INC.

Inventor： Min-Chen Lin ,  Yi-Hui Lee ,  Che-Ya Chou ,  Nan-Cheng Chen

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/528 ,  H01L23/522

Abstract: An electronic package configured to operate at Gigabit-per-second (Gbps) data rates is disclosed. The electronic package includes a package substrate of a rectangular shape. A chip package having a first high-speed interface circuit die is mounted on a top surface of the package substrate. The chip package is rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through about 45 degrees. The first high-speed interface circuit die includes a first Serializer/Deserializer (SerDes) circuit block.

公开(公告)号：US10103128B2

公开(公告)日：2018-10-16

申请号：US15588690

申请日：2017-05-07

Applicant: MEDIATEK INC.

Inventor： Che-Ya Chou ,  Kun-Ting Hung ,  Chia-Hao Yang ,  Nan-Cheng Chen

IPC: H01L23/495 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/03 ,  H01L25/16 ,  H01L25/18 ,  H01L25/00 ,  H01L21/56

Abstract: A semiconductor package is provided. The semiconductor package includes a carrier substrate having opposite first surface and second surface, and a chip stack disposed on the first surface of the carrier substrate. The chip stack includes a first semiconductor die, a second semiconductor die, and an interposer between the first semiconductor die and the second semiconductor die. The interposer transmits signals between the first semiconductor die and the second semiconductor die.

公开(公告)号：US09131602B2

公开(公告)日：2015-09-08

申请号：US13747738

申请日：2013-01-23

Applicant: MediaTek Inc.

Inventor： Sheng-Ming Chang ,  Shih-Chieh Lin ,  Nan-Cheng Chen

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0219 ,  H05K1/0218 ,  H05K1/025 ,  H05K1/0298 ,  H05K1/114 ,  H05K1/115 ,  H05K2201/0723 ,  H05K2201/09672 ,  H05K2201/09709 ,  H05K2201/10522 ,  H05K2201/10674

Abstract: The invention provides a printed circuit board for mobile platforms. An exemplary embodiment of the printed circuit board for mobile platforms includes a core substrate having a first side. A ground plane covers the first side. A first insulating layer covers the ground plane. A plurality of first signal traces and a plurality of first ground traces are alternatively arranged on the first insulating layer. A second insulating layer connects to the first insulating layer. A plurality of second signal traces separated from each other is disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto.

Abstract translation: 本发明提供一种用于移动平台的印刷电路板。 用于移动平台的印刷电路板的示例性实施例包括具有第一侧的芯基板。 地平面覆盖第一面。 第一绝缘层覆盖接地层。 多个第一信号迹线和多个第一接地迹线交替地布置在第一绝缘层上。 第二绝缘层连接到第一绝缘层。 彼此分离的多个第二信号迹线设置在第二绝缘层上，其中第二信号迹线直接设置在第一信号迹线和与其相邻的第一接地迹线之间的空间上。

公开(公告)号：US20220302574A1

公开(公告)日：2022-09-22

申请号：US17713105

申请日：2022-04-04

Applicant: MediaTek Inc.

Inventor： Shih-Chia Chiu ,  Yen-Ju Lu ,  Wen-Chou Wu ,  Nan-Cheng Chen

IPC: H01Q1/22 ,  H01L23/66 ,  H01L23/31 ,  H01Q21/06 ,  H01L23/14 ,  H01Q15/00 ,  H01Q19/06 ,  H01Q15/10

Abstract: A semiconductor package includes a substrate having thereon at least an antenna layer and a ground reflector layer under the antenna layer, a radio frequency (RF) die disposed on or in the substrate, a molding compound disposed on the antenna layer of the substrate, and a frequency-selective surface (FSS) structure disposed on the molding compound. The FSS structure is a two-dimensional periodic array of metal patterns of same shape and size. The FSS structure has highly reflective characteristic.

公开(公告)号：US10680727B2

公开(公告)日：2020-06-09

申请号：US16056549

申请日：2018-08-07

Applicant: MEDIATEK INC.

Inventor： Yen-Ju Lu ,  Chih-Ming Hung ,  Wen-Chou Wu ,  Nan-Cheng Chen

IPC: H04B1/38 ,  H04B17/16 ,  G01R31/28 ,  G01R31/302 ,  G01R1/24 ,  G01R29/08 ,  G01R1/04

Abstract: An over-the-air (OTA) wireless test system includes a container, a machine plate disposed on the container, a supporter disposed on the machine plate, a load board disposed on the supporter, a socket disposed on the load board, a device under test (DUT) installed in the socket, and a wave-guiding feature in the socket and the load board configured to pass and guide electromagnetic waves to and/or from an antenna structure of the DUT. The wave-guiding feature comprises a wave-guiding channel in the socket defined by a plurality of pogo pins surrounding the antenna structure of the DUT. The wave-guiding feature may further comprise a radiation passage in the load board defined by rows of via fence extending through an entire thickness of the load board.