公开(公告)号：US11948895B2

公开(公告)日：2024-04-02

申请号：US17810625

申请日：2022-07-04

申请人： MEDIATEK INC.

发明人： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng ,  Nai-Wei Liu

IPC分类号： H01L23/00 ,  H01L23/043 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC分类号： H01L23/562 ,  H01L23/043 ,  H01L23/13 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5383 ,  H01L24/16 ,  H01L25/0655 ,  H01L23/5385 ,  H01L2224/16227

摘要： A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. Holes are formed on a surface of the substrate, wherein the holes are located within a projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material surrounds the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate are exposed by the molding material.

公开(公告)号：US11670596B2

公开(公告)日：2023-06-06

申请号：US17208175

申请日：2021-03-22

申请人： MEDIATEK INC.

发明人： Yi-Lin Tsai ,  Wen-Sung Hsu ,  I-Hsuan Peng ,  Yi-Jou Lin

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/5381 ,  H01L23/49816 ,  H01L24/20 ,  H01L24/73 ,  H01L2224/224 ,  H01L2224/73104

摘要： A semiconductor package structure includes a substrate, a first redistribution layer, a second redistribution layer, a bridge structure, a first semiconductor component, and a second semiconductor component. The first redistribution layer is over the substrate. The second redistribution layer is over the first redistribution layer. The bridge structure is between the first redistribution layer and the second redistribution layer, wherein the bridge structure includes an active device. The first semiconductor component and the second semiconductor component are located over the second redistribution layer, wherein the first semiconductor component is electrically coupled to the second semiconductor component through the second redistribution layer and the bridge structure.

公开(公告)号：US20230044797A1

公开(公告)日：2023-02-09

申请号：US17973318

申请日：2022-10-25

申请人： MediaTek Inc.

发明人： Yao-Chun Su ,  Chih-Ching Chen ,  I-Hsuan Peng ,  Yi-Jou Lin

IPC分类号： H01L25/16 ,  H01L23/16 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L49/02

摘要： A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

公开(公告)号：US10410969B2

公开(公告)日：2019-09-10

申请号：US15891481

申请日：2018-02-08

申请人： MEDIATEK INC.

发明人： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng

IPC分类号： H01L23/31 ,  H01L23/538 ,  H01L23/528 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/18 ,  H01L21/56 ,  H01L23/367 ,  H01L25/10

摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package and a second semiconductor package overlying a portion of the first semiconductor package. The first semiconductor package includes a first redistribution layer (RDL) structure, a first semiconductor die and a molding compound. The first semiconductor die is disposed on a first surface of the first RDL structure and electrically coupled to the first RDL structure. The molding compound is positioned overlying the first semiconductor die and the first surface of the first RDL structure. The second semiconductor package includes a first memory die and a second memory die vertically stacked on the first memory die. The second memory die is electrically coupled to first memory die by through silicon via (TSV) interconnects formed passing through the second memory die.

公开(公告)号：US10217723B2

公开(公告)日：2019-02-26

申请号：US15644849

申请日：2017-07-10

申请人： MEDIATEK INC.

发明人： Tzu-Hung Lin ,  I-Hsuan Peng ,  Nai-Wei Liu ,  Wei-Che Huang

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/538 ,  H01L29/06

摘要： A semiconductor chip package includes a first die and a second die. The first die and second die are coplanar and disposed in proximity to each other in a side-by-side fashion. A non-straight line shaped interface gap is disposed between the first die and second die. A molding compound surrounds the first die and second die. A redistribution layer (RDL) structure is disposed on the first die, the second die and on the molding compound. The first semiconductor die is electrically connected to the second semiconductor die through the RDL structure.

公开(公告)号：US09978729B2

公开(公告)日：2018-05-22

申请号：US14986207

申请日：2015-12-31

申请人： MediaTek Inc.

发明人： Tzu-Hung Lin ,  I-Hsuan Peng

IPC分类号： H01L23/02 ,  H01L25/10 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/04042 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00

摘要： The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package including a first semiconductor die. A first molding compound surrounds the first semiconductor die. A first redistribution layer (RDL) structure is disposed on a bottom surface of the first molding compound. The first semiconductor die is coupled to the first RDL structure. A second redistribution layer (RDL) structure is disposed on a top surface of the first molding compound. A passive device is coupled to the second RDL structure.

公开(公告)号：US09941260B2

公开(公告)日：2018-04-10

申请号：US15203418

申请日：2016-07-06

申请人： MediaTek Inc.

发明人： Tzu-Hung Lin ,  Chi-Chin Lien ,  Nai-Wei Liu ,  I-Hsuan Peng ,  Ching-Wen Hsiao ,  Wei-Che Huang

IPC分类号： H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC分类号： H01L25/105 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00

摘要： A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor package that includes a first semiconductor die having a first surface and a second surface opposite thereto. A first package substrate is disposed on the first surface of the first semiconductor die. A first molding compound surrounds the first semiconductor die and the first package substrate. A first redistribution layer (RDL) structure is disposed on the first molding compound, in which the first package substrate is interposed and electrically coupled between the first semiconductor die and the first RDL structure.

公开(公告)号：US11830851B2

公开(公告)日：2023-11-28

申请号：US17208198

申请日：2021-03-22

申请人： MEDIATEK INC.

发明人： Yi-Lin Tsai ,  Wen-Sung Hsu ,  I-Hsuan Peng ,  Yi-Jou Lin

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/18 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/18 ,  H01L23/49822 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2225/0652 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06548

摘要： A semiconductor package structure includes a substrate, a redistribution layer, a first semiconductor component, a conductive pillar, and a second semiconductor component. The redistribution layer is over the substrate. The first semiconductor component is over the redistribution layer. The conductive pillar is adjacent to the first semiconductor component, wherein the first semiconductor component and the conductive pillar are surrounded by a molding material. The second semiconductor component is over the molding material, wherein the second semiconductor component is electrically coupled to the redistribution layer through the conductive pillar.

公开(公告)号：US11646295B2

公开(公告)日：2023-05-09

申请号：US17488921

申请日：2021-09-29

申请人： MEDIATEK INC.

发明人： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/367

CPC分类号： H01L25/0655 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/5386 ,  H01L23/3675 ,  H01L24/16 ,  H01L2224/16113 ,  H01L2224/16227 ,  H01L2924/3511

摘要： A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

公开(公告)号：US11264337B2

公开(公告)日：2022-03-01

申请号：US16702104

申请日：2019-12-03

申请人： MEDIATEK INC.

发明人： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

IPC分类号： H01L23/00 ,  H01L23/053 ,  H01L23/367 ,  H01L23/31 ,  H01L25/16 ,  H01L23/498

摘要： A semiconductor package structure is provided. The semiconductor package structure includes a substrate, a semiconductor die and a frame. The semiconductor die is disposed over the substrate. The frame is disposed over the substrate, wherein the frame is adjacent to the semiconductor die, and the upper surface of the frame is lower than the upper surface of the semiconductor die.