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    Semiconductor package structure
    2.
    发明授权
    Semiconductor package structure 有权

    公开(公告)号：US10784211B2

    公开(公告)日：2020-09-22

    申请号：US15906098

    申请日：2018-02-27

    Applicant: MEDIATEK INC.

    Inventor： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng ,  Nai-Wei Liu

    IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/043 ,  H01L23/13 ,  H01L23/538

    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto. The substrate includes a wiring structure. The semiconductor package structure also includes a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The semiconductor package structure further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The first semiconductor die and the second semiconductor die are separated by a molding material. In addition, the semiconductor package structure includes a first hole and a second hole formed on the second surface of the substrate.

    Semiconductor package structure having an annular frame with truncated corners
    3.
    发明授权
    Semiconductor package structure having an annular frame with truncated corners 有权

    公开(公告)号：US11171113B2

    公开(公告)日：2021-11-09

    申请号：US16563919

    申请日：2019-09-08

    Applicant: MEDIATEK INC.

    Inventor： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/367

    Abstract: A semiconductor package structure includes a substrate having a first surface and second surface opposite thereto, a first semiconductor die disposed on the first surface of the substrate, a second semiconductor die disposed on the first surface, a molding material surrounding the first semiconductor die and the second semiconductor die, and an annular frame mounted on the first surface of the substrate. The first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. The first semiconductor die is separated from the second semiconductor die by the molding material. The substrate includes a wiring structure. The first semiconductor die and the second semiconductor die are electrically coupled to the wiring structure. The annular frame surrounds the first semiconductor die and the second semiconductor die. The annular frame includes a retracted region at an outer corner of the annular frame.

    Semiconductor package assembly and method for forming the same
    5.
    发明授权
    Semiconductor package assembly and method for forming the same 有权

    公开(公告)号：US10903198B2

    公开(公告)日：2021-01-26

    申请号：US16674298

    申请日：2019-11-05

    Applicant: MEDIATEK INC.

    Inventor： Chia-Cheng Chang ,  I-Hsuan Peng ,  Tzu-Hung Lin

    IPC: H01L25/18 ,  H01L21/78 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L23/538

    Abstract: A semiconductor package assembly and method for forming the same are provided. The semiconductor package assembly includes a first semiconductor die and a second semiconductor die disposed on a first surface of a substrate. The first semiconductor die includes a peripheral region having a second edge facing the first edge of the second semiconductor die and a third edge opposite to the second edge, a circuit region surrounded by the peripheral region, wherein the circuit region has a fourth edge adjacent to the second edge and a fifth edge adjacent to the third edge. A minimum distance between the second edge and the fourth edge is a first distance, a minimum distance between the third edge and the fifth edge is a second distance, and the first distance is different from the second distance.

    Semiconductor package structure
    7.
    发明授权
    Semiconductor package structure 有权

    公开(公告)号：US11410936B2

    公开(公告)日：2022-08-09

    申请号：US16983182

    申请日：2020-08-03

    Applicant: MEDIATEK INC.

    Inventor： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng ,  Nai-Wei Liu

    IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/043 ,  H01L23/13 ,  H01L23/538

    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a substrate having a first surface and a second surface opposite thereto, wherein the substrate includes a wiring structure, and a first semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure. The package further includes a second semiconductor die disposed over the first surface of the substrate and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are separated by a molding material. A first hole and a second hole are formed on the second surface of the substrate. Finally, a frame is disposed over the first surface of the substrate, wherein the frame surrounds the first semiconductor die and the second semiconductor die.

    Semiconductor package assembly
    9.
    发明授权
    Semiconductor package assembly 有权

    公开(公告)号：US10410969B2

    公开(公告)日：2019-09-10

    申请号：US15891481

    申请日：2018-02-08

    Applicant: MEDIATEK INC.

    Inventor： Tzu-Hung Lin ,  Chia-Cheng Chang ,  I-Hsuan Peng

    IPC: H01L23/31 ,  H01L23/538 ,  H01L23/528 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L25/18 ,  H01L21/56 ,  H01L23/367 ,  H01L25/10

    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a first semiconductor package and a second semiconductor package overlying a portion of the first semiconductor package. The first semiconductor package includes a first redistribution layer (RDL) structure, a first semiconductor die and a molding compound. The first semiconductor die is disposed on a first surface of the first RDL structure and electrically coupled to the first RDL structure. The molding compound is positioned overlying the first semiconductor die and the first surface of the first RDL structure. The second semiconductor package includes a first memory die and a second memory die vertically stacked on the first memory die. The second memory die is electrically coupled to first memory die by through silicon via (TSV) interconnects formed passing through the second memory die.

    Semiconductor package structure having an annular frame with truncated corners
    10.
    发明授权
    Semiconductor package structure having an annular frame with truncated corners 有权

    公开(公告)号：US12142598B2

    公开(公告)日：2024-11-12

    申请号：US18170078

    申请日：2023-02-16

    Applicant: MEDIATEK INC.

    Inventor： Chia-Cheng Chang ,  Tzu-Hung Lin ,  I-Hsuan Peng ,  Yi-Jou Lin

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538

    Abstract: A semiconductor package structure includes a substrate having a substrate having a first surface and second surface opposite thereto, wherein the substrate comprises a wiring structure. The structure also has a first semiconductor die disposed on the first surface of the substrate and electrically coupled to the wiring structure, and a second semiconductor die disposed on the first surface and electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged in a side-by-side manner. A molding material surrounds the first semiconductor die and the second semiconductor die, wherein the first semiconductor die is separated from the second semiconductor die by the molding material. Finally, an annular frame mounted on the first surface of the substrate, wherein the annular frame surrounds the first semiconductor die and the second semiconductor die.

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