公开(公告)号：US10157825B2

公开(公告)日：2018-12-18

申请号：US15357205

申请日：2016-11-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsien Hsieh ,  Hsien-Wei Chen ,  Chi-Hsi Wu ,  Chen-Hua Yu ,  Der-Chyang Yeh ,  Li-Han Hsu ,  Wei-Cheng Wu

IPC分类号： H01L23/40 ,  H01L23/498 ,  H01L23/58 ,  H01L23/31 ,  H01L23/00

摘要： A structure includes a metal pad, a passivation layer having a portion covering edge portions of the metal pad, and a dummy metal plate over the passivation layer. The dummy metal plate has a plurality of through-openings therein. The dummy metal plate has a zigzagged edge. A dielectric layer has a first portion overlying the dummy metal plate, second portions filling the first plurality of through-openings, and a third portion contacting the first zigzagged edge.

公开(公告)号：US20180211912A1

公开(公告)日：2018-07-26

申请号：US15640949

申请日：2017-07-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  An-Jhih Su ,  Chi-Hsi Wu ,  Der-Chyang Yeh ,  Ming Shih Yeh ,  Jing-Cheng Lin ,  Hung-Jui Kou

IPC分类号： H01L23/522 ,  H01L23/538 ,  H01L23/498 ,  H01L23/48 ,  H01L23/00 ,  H01L21/48 ,  H01L21/768

CPC分类号： H01L21/76805 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/76813 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/24 ,  H01L24/27 ,  H01L24/28 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/04042 ,  H01L2224/24147 ,  H01L2224/244 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/32145 ,  H01L2224/32265 ,  H01L2224/73215 ,  H01L2224/73217 ,  H01L2224/73227 ,  H01L2224/73267 ,  H01L2224/82051 ,  H01L2224/821 ,  H01L2224/82951 ,  H01L2224/83191 ,  H01L2224/83815 ,  H01L2224/83895

摘要： A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.

公开(公告)号：US10026704B2

公开(公告)日：2018-07-17

申请号：US15707700

申请日：2017-09-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi-Hsi Wu ,  Der-Chyang Yeh ,  Hsien-Wei Chen ,  Jie Chen

IPC分类号： H01L23/34 ,  H01L21/00 ,  H01L23/00 ,  H01L23/48 ,  H01L25/00 ,  H01L25/065 ,  H01L21/56 ,  H01L21/48 ,  H01L23/538

摘要： An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.

公开(公告)号：US09984998B2

公开(公告)日：2018-05-29

申请号：US15058818

申请日：2016-03-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  An-Jhih Su ,  Wei-Yu Chen ,  Ying-Ju Chen ,  Tsung-Shu Lin ,  Chin-Chuan Chang ,  Hsien-Wei Chen ,  Wei-Cheng Wu ,  Der-Chyang Yeh ,  Li-Hsien Huang ,  Chi-Hsi Wu

IPC分类号： H01L21/00 ,  H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/56 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2924/3511

摘要： A method includes attaching a first-level device die to a dummy die, encapsulating the first-level device die in a first encapsulating material, forming through-vias over and electrically coupled to the first-level device die, attaching a second-level device die over the first-level device die, and encapsulating the through-vias and the second-level device die in a second encapsulating material. Redistribution lines are formed over and electrically coupled to the through-vias and the second-level device die. The dummy die, the first-level device die, the first encapsulating material, the second-level device die, and the second encapsulating material form parts of a composite wafer.

公开(公告)号：US20180082966A1

公开(公告)日：2018-03-22

申请号：US15823110

申请日：2017-11-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shuo-Mao Chen ,  Der-Chyang Yeh ,  Li-Hsien Huang

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/538 ,  H01L23/525

CPC分类号： H01L24/11 ,  H01L21/56 ,  H01L21/568 ,  H01L21/76801 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3192 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/525 ,  H01L23/5389 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/00

摘要： An embodiment is a device comprising a substrate, a metal pad over the substrate, and a passivation layer comprising a portion over the metal pad. The device further comprises a metal pillar over and electrically coupled to the metal pad, and a passive device comprising a first portion at a same level as the metal pillar, wherein the first portion of the passive device is formed of a same material as the metal pillar.

公开(公告)号：US20180076175A1

公开(公告)日：2018-03-15

申请号：US15682261

申请日：2017-08-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsien Hsieh ,  Li-Han Hsu ,  Wei-Cheng Wu ,  Hsien-Wei Chen ,  Der-Chyang Yeh ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L21/768 ,  H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L23/48

摘要： An embodiment package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and a conductive line electrically connecting a first conductive via to a second conductive via. The conductive line includes a first segment over the first integrated circuit die and having a first lengthwise dimension extending in a first direction and a second segment having a second lengthwise dimension extending in a second direction different than the first direction. The second segment extends over a boundary between the first integrated circuit die and the encapsulant.

公开(公告)号：US20170317029A1

公开(公告)日：2017-11-02

申请号：US15225024

申请日：2016-08-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsien Hsieh ,  Li-Han Hsu ,  Wei-Cheng Wu ,  Hsien-Wei Chen ,  Der-Chyang Yeh ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L23/5386 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012

摘要： An embodiment device includes an integrated circuit die and a first metallization pattern over the integrated circuit die. The first metallization pattern includes a first dummy pattern having a first hole extending through a first conductive region. The device further includes a second metallization pattern over the first metallization pattern. The second metallization pattern includes a second dummy pattern having a second hole extending through a second conductive region. The second hole is arranged projectively overlapping a portion of the first hole and a portion of the first conductive region.

公开(公告)号：US09735129B2

公开(公告)日：2017-08-15

申请号：US14447426

申请日：2014-07-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  Jie Chen ,  Der-Chyang Yeh ,  Shin-Puu Jeng ,  Chen-Hua Yu

IPC分类号： H01L29/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/48 ,  H01L25/10 ,  H01L23/544 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L25/0655 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/03 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/81 ,  H01L24/96 ,  H01L25/105 ,  H01L25/50 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/02319 ,  H01L2224/03438 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/06181 ,  H01L2224/11332 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/12105 ,  H01L2224/13005 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13181 ,  H01L2224/16237 ,  H01L2224/17181 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/96 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/13124 ,  H01L2924/01082 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/2064 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/01074

摘要： Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a semiconductor package including a first package including one or more dies, and a redistribution layer coupled to the one or more dies at a first side of the first package with a first set of bonding joints. The redistribution layer including more than one metal layer disposed in more than one passivation layer, the first set of bonding joints being directly coupled to at least one of the one or more metal layers, and a first set of connectors coupled to a second side of the redistribution layer, the second side being opposite the first side.

公开(公告)号：US09666522B2

公开(公告)日：2017-05-30

申请号：US14465474

申请日：2014-08-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Li-Hsien Huang ,  Hsien-Wei Chen ,  Ching-Wen Hsiao ,  Der-Chyang Yeh ,  Shin-Puu Jeng ,  Chen-Hua Yu

IPC分类号： H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L23/544 ,  H01L21/48 ,  H01L23/538 ,  H01L21/683 ,  H01L25/10 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/544 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68318 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package includes a device die, a molding material molding the device die therein, a through-via penetrating through the molding material, and an alignment mark penetrating through the molding material. A redistribution line is on a side of the molding material. The redistribution line is electrically coupled to the through-via.

公开(公告)号：US20160293577A1

公开(公告)日：2016-10-06

申请号：US15186624

申请日：2016-06-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Der-Chyang Yeh ,  Kuo-Chung Yee ,  Jui-Pin Hung

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L21/683 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L25/0652 ,  H01L21/0273 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/7684 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/78 ,  H01L22/14 ,  H01L23/3107 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2221/68381 ,  H01L2224/0237 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/11616 ,  H01L2224/11622 ,  H01L2224/12105 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/24137 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48096 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81 ,  H01L2224/81005 ,  H01L2224/81203 ,  H01L2224/81895 ,  H01L2224/83 ,  H01L2224/83005 ,  H01L2224/9222 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01322 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/12042 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/82 ,  H01L2924/00012

摘要： A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die.