公开(公告)号：US20240355721A1

公开(公告)日：2024-10-24

申请号：US18761200

申请日：2024-07-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Li-Hsien Huang ,  An-Jhih Su ,  Der-Chyang Yeh ,  Hua-Wei Tseng ,  Chiang Lin ,  Ming-Shih Yeh

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L23/49822 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L25/105 ,  H01L2225/1041 ,  H01L2225/1058

摘要： A semiconductor package includes a semiconductor die including an active surface and an electrical terminal on the active surface, and a redistribution circuitry disposed on the active surface of the semiconductor die and connected to the electrical terminal. A top surface of the redistribution circuitry includes a planar portion and a concave portion connected to the planar portion, the concave portion is directly over the electrical terminal, and a minimum distance measured from a lowest point of the concave portion to a virtual plane where the planar portion is located is equal to or smaller than 0.5 μm.

公开(公告)号：US20240332202A1

公开(公告)日：2024-10-03

申请号：US18735194

申请日：2024-06-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Hung Lin ,  Chih-Wei Wu ,  Chia-Nan Yuan ,  Ying-Ching Shih ,  An-Jhih Su ,  Szu-Wei Lu ,  Ming-Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/295 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/5381 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2224/11462 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/25171 ,  H01L2224/25174 ,  H01L2224/2518 ,  H01L2224/82101

摘要： A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

公开(公告)号：US12033949B2

公开(公告)日：2024-07-09

申请号：US17960767

申请日：2022-10-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Hung Lin ,  Chih-Wei Wu ,  Chia-Nan Yuan ,  Ying-Ching Shih ,  An-Jhih Su ,  Szu-Wei Lu ,  Ming-Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L21/768 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/295 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/5381 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2224/11462 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/25171 ,  H01L2224/25174 ,  H01L2224/2518 ,  H01L2224/82101

摘要： A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

公开(公告)号：US20240178133A1

公开(公告)日：2024-05-30

申请号：US18434757

申请日：2024-02-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  An-Jhih Su ,  Li-Hsien Huang

IPC分类号： H01L23/522 ,  H01L21/311 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/5226 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L25/50 ,  H01L21/311 ,  H01L21/568 ,  H01L23/3128 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/181

摘要： Device, package structure and method of forming the same are disclosed. The device includes a die encapsulated by an encapsulant, a conductive structure aside the die, and a dielectric layer overlying the conductive structure. The conductive structure includes a through via in the encapsulant, a redistribution line layer overlying the through via, and a seed layer overlying the redistribution line layer. The dielectric layer includes an opening, wherein the opening exposes a surface of the conductive structure, the opening has a scallop sidewall, and an included angle between a bottom surface of the dielectric layer and a sidewall of the opening is larger than about 60 degrees.

公开(公告)号：US20240128143A1

公开(公告)日：2024-04-18

申请号：US18162715

申请日：2023-02-01

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chia-Han Hsieh ,  Yu-Jin Hu ,  Hua-Wei Tseng ,  An-Jhih Su ,  Der-Chyang Yeh

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00

CPC分类号： H01L23/3192 ,  H01L21/561 ,  H01L21/78 ,  H01L23/562

摘要： Provided are a package structure and a method of forming the same. The method includes: forming an interconnect structure on a substrate; performing a laser grooving process to form a first opening in the interconnect structure and form a debris layer on a sidewall of the first opening in a same step; forming a protective layer to fill in the first opening and cover the debris layer and the interconnect structure; patterning the protective layer to form a second opening, wherein the second opening is spaced from the debris layer by the protective layer; performing a planarization process on the protective layer to expose a topmost contact pad of the interconnect structure; and performing a mechanical dicing process through the second opening to form a third opening in the substrate and cut the substrate into a plurality of semiconductor dies.

公开(公告)号：US11935836B2

公开(公告)日：2024-03-19

申请号：US17884560

申请日：2022-08-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Hung Lin ,  An-Jhih Su ,  Der-Chyang Yeh ,  Shih-Guo Shen ,  Chia-Nan Yuan ,  Ming-Shih Yeh

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/5381 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L25/0655 ,  H01L25/50

摘要： A semiconductor device includes a bridge and a first integrated circuit. The bridge is free of active devices and includes a first conductive connector. The first integrated circuit includes a substrate and a second conductive connector disposed in a first dielectric layer over the substrate. The second conductive connector is directly bonded to the first conductive connector. The second conductive connector includes conductive pads and first conductive vias and a second conductive via between the conductive pads. The second conductive via is not overlapped with the first conductive vias while the first conductive vias are overlapped with one another. A vertical distance between the second conductive via and the first conductive connector is larger than a vertical distance between each of the first conductive vias and the first conductive connector, and a sidewall of the first dielectric layer is substantially flush with a sidewall of the substrate.

公开(公告)号：US11929322B2

公开(公告)日：2024-03-12

申请号：US17871998

申请日：2022-07-25

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  An-Jhih Su ,  Li-Hsien Huang

IPC分类号： H01L23/522 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  H01L21/311 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L23/5226 ,  H01L24/19 ,  H01L24/20 ,  H01L25/105 ,  H01L25/50 ,  H01L21/311 ,  H01L21/568 ,  H01L23/3128 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2924/15311 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00

摘要： Device, package structure and method of forming the same are disclosed. The device includes a die encapsulated by an encapsulant, a conductive structure aside the die, and a dielectric layer overlying the conductive structure. The conductive structure includes a through via in the encapsulant, a redistribution line layer overlying the through via, and a seed layer overlying the redistribution line layer. The dielectric layer includes an opening, wherein the opening exposes a surface of the conductive structure, the opening has a scallop sidewall, and an included angle between a bottom surface of the dielectric layer and a sidewall of the opening is larger than about 60 degrees.

公开(公告)号：US20240055311A1

公开(公告)日：2024-02-15

申请号：US17887499

申请日：2022-08-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yueh-Ting Lin ,  Hua-Wei Tseng ,  An-Jhih Su ,  Ming-Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L21/463

CPC分类号： H01L23/3157 ,  H01L23/49816 ,  H01L24/32 ,  H01L24/05 ,  H01L21/463 ,  H01L2924/15311 ,  H01L2224/32146 ,  H01L2224/02373

摘要： A semiconductor structure includes a package, an electrical device and an underfill material. The package includes a redistribution structure and at least one die, and the at least one die is disposed on a first side of the redistribution structure. The electrical device is disposed on a second side of the redistribution structure, the electrical device has a top surface and a bottom surface opposite to each other, and the top surface faces the redistribution structure. The underfill material is disposed between the top surface and the redistribution structure and extending toward the bottom surface, the underfill material has an end surface corresponding to the bottom surface, and the end surface is a flat surface. In addition, a manufacturing method of the semiconductor structure is also provided.

公开(公告)号：US20230036283A1

公开(公告)日：2023-02-02

申请号：US17960767

申请日：2022-10-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Hung Lin ,  Chih-Wei Wu ,  Chia-Nan Yuan ,  Ying-Ching Shih ,  An-Jhih Su ,  Szu-Wei Lu ,  Ming-Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/538 ,  H01L21/768 ,  H01L23/29 ,  H01L23/31 ,  H01L23/48 ,  H01L23/00 ,  H01L21/56

摘要： A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.

公开(公告)号：US20220278067A1

公开(公告)日：2022-09-01

申请号：US17185970

申请日：2021-02-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hua-Wei Tseng ,  Yueh-Ting Lin ,  Shao-Yun Chen ,  Li-Hsien Huang ,  An-Jhih Su ,  Ming-Shih Yeh ,  Der-Chyang Yeh

IPC分类号： H01L23/00 ,  H01L49/02

摘要： A package structure including IPD and method of forming the same are provided. The package structure includes a die, an encapsulant laterally encapsulating the die, a first RDL structure disposed on the encapsulant and the die, an IPD disposed on the first RDL structure and an underfill layer. The IPD includes a substrate, a first connector on a first side of the substrate and electrically connected to the first RDL structure, a guard structure on a second side of the substrate opposite to the first side and laterally surrounding a connector region, and a second connector disposed within the connector region and electrically connected to a conductive via embedded in the substrate. The underfill layer is disposed to at least fill a space between the first side of the IPD and the first RDL structure. The underfill layer is separated from the connector region by the guard structure.