公开(公告)号：US09853014B2

公开(公告)日：2017-12-26

申请号：US15275752

申请日：2016-09-26

Applicant: FUJITSU LIMITED

Inventor： Ryo Kikuchi ,  Nobuhiro Imaizumi ,  Hiroshi Onuki

IPC: H01L23/52 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0214 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/0225 ,  H01L2224/02255 ,  H01L2224/0226 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/03001 ,  H01L2224/036 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05005 ,  H01L2224/05014 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/0519 ,  H01L2224/05195 ,  H01L2224/05287 ,  H01L2224/0529 ,  H01L2224/05395 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/12105 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/03 ,  H01L2224/11 ,  H01L21/304 ,  H01L21/76898 ,  H01L2224/81 ,  H01L2924/0665 ,  H01L2924/00

Abstract: An electronic component includes a substrate configured to include a first portion that first thermal conductivity, and have a first surface and a second surface opposite to the first surface; a second portion configured to be formed inside the first portion, and have second thermal conductivity lower than the first thermal conductivity; a first terminal configured to be formed to correspond to the second portion on a side of the first surface; and a second terminal configured to be formed on a side of the second surface.

公开(公告)号：US09824993B2

公开(公告)日：2017-11-21

申请号：US15202700

申请日：2016-07-06

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Sumihiro Ichikawa

IPC: H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/29 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L24/17 ,  H01L23/295 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49833 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/111 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/13005 ,  H01L2224/13014 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1319 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14136 ,  H01L2224/14179 ,  H01L2224/14505 ,  H01L2224/16145 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81065 ,  H01L2224/81143 ,  H01L2224/81193 ,  H01L2224/81856 ,  H01L2224/81862 ,  H01L2224/81895 ,  H01L2224/81907 ,  H01L2224/81986 ,  H01L2224/83104 ,  H01L2224/83862 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06565 ,  H01L2225/06593 ,  H01L2924/00015 ,  H01L2924/14 ,  H05K3/305 ,  H05K3/328 ,  H05K3/368 ,  H01L2224/81121 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/05442 ,  H01L2224/034 ,  H01L2224/113 ,  H01L2924/00012 ,  H01L2224/81203 ,  H01L2924/00

Abstract: A packaging structure includes a first substrate including a first metal terminal and a first protruding resin portion formed at a first surface; a second substrate including a second metal terminal and a second protruding resin portion formed at a second surface, the second metal terminal being made of the same kind of metal as the first metal terminal; and a sealing portion filled between the first surface of the first substrate and the second surface of the second substrate, the first metal terminal and the second metal terminal being directly bonded with each other, the first protruding resin portion and the second protruding resin portion being directly bonded with each other, each of the first protruding resin portion and the second protruding resin portion being made of a resin material that does not include fillers, and the sealing portion being made of a resin material including fillers.

公开(公告)号：US20170294400A1

公开(公告)日：2017-10-12

申请号：US15479887

申请日：2017-04-05

Applicant: ROHM CO., LTD.

Inventor： Motoharu HAGA ,  Kaoru YASUDA

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/492

CPC classification number: H01L24/43 ,  H01L23/3157 ,  H01L23/492 ,  H01L23/498 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0346 ,  H01L2224/036 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/27462 ,  H01L2224/29101 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48824 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83455 ,  H01L2224/83805 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01204 ,  H01L2924/00014 ,  H01L2924/014

Abstract: A semiconductor device includes a semiconductor substrate with a wiring layer formed thereon, an insulating film formed on the semiconductor substrate so as to cover the wiring layer and having a pad opening exposing a portion of the wiring layer as a pad, a front surface protection film formed on the insulating film and being constituted of an insulating material differing from the insulating film and having a second pad opening securing exposure of at least a portion of the pad, a seed layer formed on the pad, and a plating layer formed on the seed layer.

公开(公告)号：US20170154831A1

公开(公告)日：2017-06-01

申请号：US14953865

申请日：2015-11-30

Applicant: Infineon Technologies Austria AG

Inventor： Martin Standing

IPC: H01L23/31 ,  H01L21/768 ,  H01L23/528 ,  H01L21/3213 ,  H01L23/00 ,  H01L23/29 ,  H01L21/56 ,  H01L21/288 ,  H01L21/02 ,  H01L23/48

CPC classification number: H01L23/3107 ,  H01L21/022 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/32134 ,  H01L21/50 ,  H01L21/56 ,  H01L21/76873 ,  H01L21/76874 ,  H01L21/76877 ,  H01L23/04 ,  H01L23/13 ,  H01L23/145 ,  H01L23/295 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/06 ,  H01L2224/036

Abstract: In an embodiment, an electronic component includes a first dielectric layer including an organic component having a decomposition temperature of at least 180° C., a semiconductor die embedded in the first dielectric layer, a second dielectric layer arranged on a first surface of the first dielectric layer, the second dielectric layer including a photo definable polymer composition and defining two or more discrete openings having conductive material, and a first substrate arranged on the second dielectric layer and on the conductive material. One or more contact pads are arranged on an outermost surface of the first substrate.

公开(公告)号：US20170098631A1

公开(公告)日：2017-04-06

申请号：US15275752

申请日：2016-09-26

Applicant: FUJITSU LIMITED

Inventor： Ryo Kikuchi ,  Nobuhiro IMAIZUMI ,  Hiroshi Onuki

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0214 ,  H01L2224/02145 ,  H01L2224/0215 ,  H01L2224/0225 ,  H01L2224/02255 ,  H01L2224/0226 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/0239 ,  H01L2224/03001 ,  H01L2224/036 ,  H01L2224/03612 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05005 ,  H01L2224/05014 ,  H01L2224/05022 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/0519 ,  H01L2224/05195 ,  H01L2224/05287 ,  H01L2224/0529 ,  H01L2224/05395 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/12105 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13014 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06555 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/03 ,  H01L2224/11 ,  H01L21/304 ,  H01L21/76898 ,  H01L2224/81 ,  H01L2924/0665 ,  H01L2924/00

Abstract: An electronic component includes a substrate configured to include a first portion that first thermal conductivity, and have a first surface and a second surface opposite to the first surface;a second portion configured to be formed inside the first portion, and have second thermal conductivity lower than the first thermal conductivity;a first terminal configured to be formed to correspond to the second portion on a side of the first surface; and a second terminal configured to be formed on a side of the second surface.

公开(公告)号：US09595446B2

公开(公告)日：2017-03-14

申请号：US14150906

申请日：2014-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chungsun Lee ,  Jung-Hwan Kim ,  Kwang-chul Choi ,  Un-Byoung Kang ,  Jeon Il Lee

IPC: H01L21/46 ,  H01L21/302 ,  H01L21/683 ,  H01L21/02 ,  H01L23/00

CPC classification number: H01L21/302 ,  H01L21/02057 ,  H01L21/6835 ,  H01L21/6836 ,  H01L24/03 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/03002 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/92 ,  H01L2224/9222 ,  H01L2224/92222 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/15311 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00014 ,  H01L2221/68304 ,  H01L21/304 ,  H01L2221/68368 ,  H01L21/78 ,  H01L2224/81

Abstract: Methods processing substrates are provided. The method may include providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting glue layer and thermosetting release layers provided on opposing sides of the thermosetting glue layer.

Abstract translation: 提供了处理衬底的方法。 该方法可以包括在衬底和载体之间提供结合层，以将衬底粘合到载体上，在衬底被载体支撑的同时处理衬底，以及去除结合层以使衬底与载体分离。 接合层可以包括热固性胶层和设置在热固性胶层的相对侧上的热固性剥离层。

公开(公告)号：US20170062366A1

公开(公告)日：2017-03-02

申请号：US14835379

申请日：2015-08-25

Applicant: ZIPTRONIX, INC.

Inventor： Paul M. ENQUIST

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/09 ,  H01L21/50 ,  H01L24/03 ,  H01L24/80 ,  H01L24/89 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/036 ,  H01L2224/05005 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/08145 ,  H01L2224/8019 ,  H01L2224/80895 ,  H01L2225/06513

Abstract: A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Abstract translation: 一种用于形成直接杂化键的方法和由直接杂化键形成的器件，其包括具有第一组金属接合焊盘的第一衬底，该第一衬底优选地连接到被导电屏障覆盖的器件或电路上， 金属区域，与第一基板上的金属接合焊盘相邻，第二基板具有由第二导电屏障覆盖的第二组金属接合焊盘，第二组导电屏障与第一组金属焊盘对准，优选地连接到设备或电路，以及 具有与所述第二基板上的所述金属接合焊盘相邻的第二非金属区域，以及所述第一和第二组金属接合焊盘之间的接触接合界面，所述第一和第二组金属接合焊盘由所述第一非金属区域与所述第一非金属区域的接合形成的导电屏障 第二个非金属区域。

公开(公告)号：US09418949B2

公开(公告)日：2016-08-16

申请号：US14028554

申请日：2013-09-17

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Chung-Hsin Lin ,  Ping-Heng Wu ,  Chao-Wen Lay ,  Hung-Mo Wu ,  Ying-Cheng Chuang

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/52 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/00 ,  H01L23/522 ,  H01L23/31 ,  H01L23/525

CPC classification number: H01L24/05 ,  H01L23/3192 ,  H01L23/522 ,  H01L23/525 ,  H01L23/562 ,  H01L24/03 ,  H01L24/48 ,  H01L2224/0218 ,  H01L2224/0219 ,  H01L2224/0345 ,  H01L2224/036 ,  H01L2224/0361 ,  H01L2224/03614 ,  H01L2224/03622 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.

Abstract translation: 本发明提供一种半导体器件，其包括衬底，电介质层，虚拟焊盘，焊盘，再分配层和金属互连。 衬底包括非器件区域和器件区域。 介电层位于非器件区域和器件区域上。 虚拟焊盘位于非器件区的介质层上。 金属互连在非器件区的介质层中并连接到虚拟焊盘。 焊盘位于器件区域的介电层上。 缓冲层位于接合焊盘和电介质层之间。 缓冲层包括金属，金属氮化物或其组合。 再分布层在电介质层上并连接虚拟焊盘和焊盘。

公开(公告)号：US09324667B2

公开(公告)日：2016-04-26

申请号：US13350098

申请日：2012-01-13

Applicant: Trent S. Uehling ,  Lawrence S. Klingbeil ,  Mostafa Vadipour ,  Brett P. Wilkerson ,  Leo M. Higgins, III

Inventor： Trent S. Uehling ,  Lawrence S. Klingbeil ,  Mostafa Vadipour ,  Brett P. Wilkerson ,  Leo M. Higgins, III

IPC: H01L21/4763 ,  H01L23/00

CPC classification number: H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/036 ,  H01L2224/0361 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/11472 ,  H01L2224/11849 ,  H01L2224/11906 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/16237 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/05552

Abstract: A method forms a connecting pillar to a bonding pad of an integrated circuit. A seed layer is formed over the bond pad. Photoresist is deposited over the integrated circuit. An opening is formed in the photoresist over the bond pad. The connecting pillar is formed in the opening by plating.

Abstract translation: 一种方法形成到集成电路的焊盘的连接柱。 在接合焊盘上形成种子层。 光刻胶沉积在集成电路上。 在接合焊盘上的光致抗蚀剂中形成开口。 连接柱通过电镀形成在开口中。

公开(公告)号：US20160111391A1

公开(公告)日：2016-04-21

申请号：US14976491

申请日：2015-12-21

Applicant: Amkor Technology, Inc.

Inventor： Jong Sik Paek ,  Doo Hyun Park

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/31

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L23/04 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/50 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/02372 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05023 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16104 ,  H01L2224/16146 ,  H01L2224/16221 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/92 ,  H01L2224/92225 ,  H01L2224/94 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/1659 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2221/683 ,  H01L21/304 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

Abstract: Provided are a semiconductor device and a method of manufacturing the same. A carrier is removed after a first semiconductor die and a second semiconductor die are stacked on each other, and then a first encapsulant is formed, so that the carrier may be easily removed when compared to approaches in which a carrier is removed from a wafer having a thin thickness.

Abstract translation: 提供半导体器件及其制造方法。 在第一半导体管芯和第二半导体管芯彼此堆叠之后，移除载体，然后形成第一密封剂，使得与从载体从具有 薄的厚度。