Patent search ap:("ROHM CO. Page LTD.") AND inv:"Motoharu HAGA"

1.

发明申请
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开

公开(公告)号：US20170301612A1

公开(公告)日：2017-10-19

申请号：US15479914

申请日：2017-04-05

Applicant: ROHM CO., LTD.

Inventor： Motoharu HAGA , Yosui FUTAMURA

IPC: H01L23/495 , H01L21/56 , H01L23/31 , H01L23/00 , H01L21/48

CPC classification number: H01L23/49548 , H01L21/4825 , H01L21/565 , H01L23/3107 , H01L23/3114 , H01L23/49503 , H01L23/49513 , H01L23/4952 , H01L23/49541 , H01L23/49575 , H01L23/49582 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/92 , H01L2224/05554 , H01L2224/27462 , H01L2224/27472 , H01L2224/29101 , H01L2224/29116 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48245 , H01L2224/48247 , H01L2224/48465 , H01L2224/49113 , H01L2224/73265 , H01L2224/83026 , H01L2224/83439 , H01L2224/85439 , H01L2224/92247 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/01204 , H01L2924/00012 , H01L2924/014 , H01L2924/013 , H01L2924/01047 , H01L2924/0105

Abstract: A semiconductor device includes a plurality of islands, each having an outer surface including an upper surface and end surfaces, semiconductor chips, above the respective islands, a bonding material, between the islands and the semiconductor chips, and plating layers, formed on the outer surfaces of the islands, and with at least one of the plurality of islands, the island is exposed as a bare surface region at a first end surface, which, among the end surfaces of the one island, faces the island adjacent thereto.

2.

发明申请
SEMICONDUCTOR DEVICE AND METHOD FOR MAKING SEMICONDUCTOR DEVICE 有权
Title translation: 半导体器件及其半导体器件的制造方法

公开(公告)号：US20160005708A1

公开(公告)日：2016-01-07

申请号：US14755334

申请日：2015-06-30

Applicant: ROHM CO., LTD.

Inventor： Yuto NISHIYAMA , Motoharu HAGA

IPC: H01L23/00 , G01R33/02 , H01L21/78 , H01L23/31 , H01L21/56

CPC classification number: H01L24/48 , G01R33/0005 , G01R33/0047 , G01R33/02 , G01R33/0206 , G01R33/24 , H01L21/561 , H01L21/78 , H01L23/13 , H01L23/3121 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/92 , H01L24/97 , H01L2224/05554 , H01L2224/05644 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48108 , H01L2224/48145 , H01L2224/48157 , H01L2224/48227 , H01L2224/48471 , H01L2224/48479 , H01L2224/49171 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/11 , H01L2924/146 , H01L2924/15153 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/05599

Abstract: A semiconductor device includes: a substrate including a base member having a main surface and a back surface facing opposite in a thickness direction; a semiconductor element mounted on the main surface of the substrate and having at least one element pad; a wire having a bonding portion bonded to the element pad; and a sealing resin formed on the main surface of the substrate for covering the wire and at least a portion of the semiconductor element. The semiconductor element has an element exposed side surface that faces in a direction crossing the thickness direction of the substrate and is exposed from the sealing resin.

Abstract translation: 半导体器件包括：基板，其具有基板部件，该基板部件具有主表面和与厚度方向相反的背面; 半导体元件，其安装在所述基板的主表面上并且具有至少一个元件焊盘; 电线，其具有接合到元件焊盘的接合部分; 以及密封树脂，其形成在所述基板的主表面上，用于覆盖所述导线和所述半导体元件的至少一部分。半导体元件具有面向与基板的厚度方向交叉的方向的元件露出侧面，并从密封树脂露出。

3.

发明公开
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开

公开(公告)号：US20230207432A1

公开(公告)日：2023-06-29

申请号：US18176175

申请日：2023-02-28

Applicant: ROHM CO., LTD.

Inventor： Motoharu HAGA

IPC: H01L23/495 , H01L23/532 , H01L23/00

CPC classification number: H01L23/49575 , H01L23/4952 , H01L23/49503 , H01L23/49513 , H01L23/49562 , H01L23/53242 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/49 , H01L24/83 , H01L24/85 , H01L24/03 , H01L24/06 , H01L24/27 , H01L24/48 , H01L24/73 , H01L24/92 , H01L2224/94 , H01L2224/0345 , H01L2224/0346 , H01L2224/0603 , H01L2224/2732 , H01L2224/2929 , H01L2224/04026 , H01L2224/04042 , H01L2224/4903 , H01L2224/05558 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/06181 , H01L2224/8384 , H01L2224/27318 , H01L2224/29006 , H01L2224/29007 , H01L2224/29011 , H01L2224/29012 , H01L2224/29013 , H01L2224/29014 , H01L2224/29015 , H01L2224/29016 , H01L2224/29078 , H01L2224/29139 , H01L2224/29339 , H01L2224/32014 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/48465 , H01L2224/48471 , H01L2224/49111 , H01L2224/73265 , H01L2224/83055 , H01L2224/83092 , H01L2224/83192 , H01L2224/83439 , H01L2224/85205 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/3512 , H01L2924/10156 , H01L2924/13055 , H01L2924/13091

Abstract: A semiconductor device includes a semiconductor element, a mount portion, and a sintered metal bond. The semiconductor element includes a body and an electrode pad. The body has an obverse surface facing forward in a first direction and a reverse surface facing rearward in the first direction. The electrode pad covers the element reverse surface. The mount portion supports the semiconductor element. The sintered metal bond electrically bonds the electrode pad and the mount portion. The sintered metal bond includes a first rear edge and a first front edge spaced forward in the first direction from the first rear edge. The electrode pad includes a second rear edge and a second front edge spaced forward in the first direction from the second rear edge. The first front edge of the metal bond is spaced rearward in the first direction from the second front edge of the pad.

4.

发明申请
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开

公开(公告)号：US20190214334A1

公开(公告)日：2019-07-11

申请号：US16238077

申请日：2019-01-02

Applicant: Rohm Co., Ltd.

Inventor： Masato IKEDA , Motoharu HAGA

IPC: H01L23/495 , H01L23/00 , H01L21/48

Abstract: A semiconductor device includes leads, a semiconductor element and a sealing resin covering the leads and the semiconductor element. The sealing resin includes an obverse surface, a reverse surface, and an end surface between the obverse surface and the reverse surface. The leads include a peripheral lead with a reverse surface exposed from the reverse surface of the resin and with an outer end surface exposed from the end surface of the resin. The outer end surface is located inward from the end surface of the resin. The sealing resin includes an interior top surface connected to its end surface and the outer end surface of the lead. The interior top surface and the reverse surface of the resin face in the same direction.

5.

发明申请
WIRE BONDING STRUCTURE AND ELECTRONIC DEVICE 审中-公开

公开(公告)号：US20180108597A1

公开(公告)日：2018-04-19

申请号：US15782487

申请日：2017-10-12

Applicant: ROHM CO., LTD.

Inventor： Motoharu HAGA

IPC: H01L23/495

CPC classification number: H01L23/4952 , H01L23/49503 , H01L23/49555 , H01L2224/05 , H01L2224/48247 , H01L2224/48465 , H01L2224/78301 , H01L2224/85045 , H01L2924/181 , H01L2924/00012

Abstract: A wire bonding structure includes a bonding target and a wire with its bond portion bonded to the bonding target. The bond portion has a bottom surface in contact with the bonding target, a pressed surface facing away from the bottom surface in a thickness direction of the bond portion, and a side surface connecting the bottom surface and the pressed surface. The pressed surface includes first and second annular portions connected to each other via a bent portion. The first annular portion is parallel to the bottom surface and positioned on the inner side of the second annular portion as viewed in the thickness direction. The second annular portion becomes more distant from the bottom surface in the thickness direction as extending outward as viewed in the thickness direction, starting from the first bent portion.

6.

发明申请
SEMICONDUCTOR DEVICE 有权
Title translation: 半导体器件

公开(公告)号：US20140091464A1

公开(公告)日：2014-04-03

申请号：US14036304

申请日：2013-09-25

Applicant: ROHM CO., LTD.

Inventor： Motoharu HAGA

IPC: H01L23/498

CPC classification number: H01L23/49827 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/48463 , H01L2224/48824 , H01L2224/85205 , H01L2924/00014 , H01L2924/00015 , H01L2924/01206 , H01L2924/01204 , H01L2924/20753 , H01L2924/00

Abstract: The semiconductor device of the present invention includes a semiconductor substrate provided with semiconductor elements, a lower layer wiring pattern which includes first wiring and second wiring, the first wiring and the second wiring disposed separately so as to be flush with each other, and the first wiring and the second wiring being fixed at a mutually different potential, an uppermost interlayer film disposed on the lower layer wiring pattern, a titanium nitride layer disposed on the uppermost interlayer film so as to cover the first wiring and the second wiring, and the titanium nitride having the thickness of 800 Å or more, and a pad metal disposed on the titanium nitride layer.

Abstract translation: 本发明的半导体器件包括设置有半导体元件的半导体衬底，包括第一布线和第二布线的下层布线图案，第一布线和第二布线分别彼此齐平布置，并且第一布线布线和第二布线以相互不同的电位固定，布置在下层布线图案上的最上层的中间膜，设置在最上层的中间膜上以覆盖第一布线和第二布线的氮化钛层，以及钛厚度为800以上的氮化物和设置在氮化钛层上的焊盘金属。

7.

发明公开
SEMICONDUCTOR DEVICE 审中-公开

公开(公告)号：US20240087996A1

公开(公告)日：2024-03-14

申请号：US18510204

申请日：2023-11-15

Applicant: ROHM CO., LTD.

Inventor： Kazuki OKUYAMA , Shuntaro TAKAHASHI , Motoharu HAGA , Shingo YOSHIDA , Kazuhisa KUMAGAI , Hajime OKUDA

IPC: H01L23/495 , H01L21/48 , H01L21/56 , H01L21/765 , H01L23/00 , H01L23/31 , H01L23/34 , H01L29/40 , H01L29/66 , H01L29/78

CPC classification number: H01L23/49562 , H01L21/4825 , H01L21/565 , H01L21/765 , H01L23/3114 , H01L23/34 , H01L23/49513 , H01L23/4952 , H01L23/49582 , H01L24/48 , H01L29/407 , H01L29/66734 , H01L29/7813 , H01L2224/48245 , H01L2224/48472 , H01L2924/13091

Abstract: A semiconductor device includes a semiconductor element and a first connection member. The semiconductor element includes a substrate and an electrode pad. The substrate includes a transistor formation region, in which a transistor is formed and which is shaped to be non-quadrangular. The electrode pad is located on the transistor formation region. The first connection member is connected to the electrode pad at one location. The electrode pad is arranged to cover a center of gravity of the transistor formation region in a plan view of the electrode pad. In the plan view, a connection region in which the first connection member is connected to the electrode pad includes a center of gravity position of the transistor formation region.

8.

发明申请
SEMICONDUCTOR DEVICE 审中-公开

公开(公告)号：US20180190642A1

公开(公告)日：2018-07-05

申请号：US15906313

申请日：2018-02-27

Applicant: ROHM CO., LTD.

Inventor： Hajime OKUDA , Motoharu HAGA , Kenji FUJII

IPC: H01L27/02 , H01L23/373 , H01L23/31 , H01L23/498 , H01L29/78

CPC classification number: H01L27/0255 , H01L23/3107 , H01L23/3171 , H01L23/3736 , H01L23/4334 , H01L23/4952 , H01L23/49562 , H01L23/49811 , H01L23/49838 , H01L29/7395 , H01L29/7827 , H01L2224/0603 , H01L2224/32245 , H01L2224/48247 , H01L2224/4903 , H01L2224/49111 , H01L2924/181 , H01L2924/00012

Abstract: A semiconductor device according to the present invention includes: a substrate; a plurality of trenches formed in the substrate; and a plurality of functional element forming regions arrayed along each of the trenches, including a channel forming region as a current path, wherein the plurality of functional element forming regions includes a first functional element forming region in which the area of the channel forming region per unit area is relatively small and a second functional element forming region in which the area of the channel forming region per unit area is relatively large, and the first functional element forming region is provided at a region where heat generation should be suppressed.