公开(公告)号：US20240363398A1

公开(公告)日：2024-10-31

申请号：US18765006

申请日：2024-07-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng TANG ,  Fu-Chen CHANG ,  Cheng-Lin HUANG ,  Wen-Ming CHEN ,  Chun-Yen LO ,  Kuo-Chio LIU

IPC分类号： H01L21/768 ,  H01L21/304 ,  H01L21/67 ,  H01L21/683 ,  H01L21/78 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498 ,  H01L23/58 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L21/76802 ,  H01L21/304 ,  H01L21/3043 ,  H01L21/67011 ,  H01L21/67092 ,  H01L21/67132 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/48 ,  H01L23/481 ,  H01L24/11 ,  H01L24/32 ,  H01L23/49816 ,  H01L23/562 ,  H01L23/585 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

摘要： A semiconductor die is provided. The semiconductor die includes a substrate having a front surface, a rear surface opposite to the front surface, and a sidewall connected between the front surface and the rear surface. The sidewall includes a first primary segment immediately connected to the front surface, a second primary segment immediately connected to the rear surface, and a middle segment between the first primary segment and the second primary segment. The slope of the second primary segment is less than the slope of the first primary segment, and the slope of the middle segment is less than the slope of the second primary segment. Each of the first primary segment, the second primary segment, and the middle segment is a flat surface having a slope greater than 0 degrees relative to a line parallel to the front surface of the substrate.

公开(公告)号：US20240363387A1

公开(公告)日：2024-10-31

申请号：US18291845

申请日：2022-07-14

申请人： NISSAN CHEMICAL CORPORATION

发明人： Takahisa OKUNO ,  Yuki USUI ,  Tetsuya SHINJO

IPC分类号： H01L21/683 ,  C09J5/04 ,  C09J5/06 ,  C09J183/04 ,  H01L21/67

CPC分类号： H01L21/6836 ,  C09J5/04 ,  C09J5/06 ,  C09J183/04 ,  H01L21/67092 ,  C09J2203/326 ,  C09J2301/304 ,  C09J2301/408 ,  C09J2301/416 ,  C09J2301/502 ,  C09J2425/005 ,  H01L2221/68318 ,  H01L2221/68386

摘要： A method of manufacturing a laminate that includes forming a first adhesive coating layer on a surface of a release agent coating layer formed on a surface of a support substrate; forming a second adhesive coating layer on a surface of a semiconductor substrate; and bonding the first adhesive coating layer and the second adhesive coating layer, followed by heating, to form a release layer and an adhesive layer, wherein the first adhesive coating layer is formed from a first adhesive composition, the second adhesive coating layer is formed from a second adhesive composition, and one of the first adhesive composition and the second adhesive composition contains a first thermosetting component and a second thermosetting component that reacts with the first thermosetting component in the presence of a catalyst, and the other contains the catalyst.

公开(公告)号：US20240363386A1

公开(公告)日：2024-10-31

申请号：US18764315

申请日：2024-07-04

申请人： BESI Switzerland AG

发明人： Fabian HURSCHLER ,  Stefan BEHLER ,  Brian PULIS

IPC分类号： H01L21/683

CPC分类号： H01L21/6835 ,  H01L2221/68322

摘要： A die ejector (2) comprising a chamber (4) with a cover plate (40) having a passageway, a plurality of plates (56) arranged inside the chamber (4) and reciprocally moveable between an initial position (58) and an operating position (60), respectively, the plates (56) intended to interact with a die carrier to support the removal of dies from the carrier, and a drive member (100) for moving the plates (56) between the operating position and the initial position.

公开(公告)号：US20240361546A1

公开(公告)日：2024-10-31

申请号：US18771687

申请日：2024-07-12

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yu-Hao CHEN ,  Hui Yu LEE

IPC分类号： G02B6/42 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L23/538 ,  H01L25/16

CPC分类号： G02B6/4268 ,  G02B6/4255 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4871 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3731 ,  H01L23/3732 ,  H01L23/3736 ,  H01L23/3738 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L25/167 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2924/3511

摘要： In a method, a stacked structure including an electronic integrated circuit (IC) and a photonic IC is bonded to a heat spreader releasably attached to a carrier. A first multilayer structure is sequentially deposited and patterned over the stacked structure to form, in the first multilayer structure, a first waveguide optically coupled to the photonic IC. A redistribution structure is sequentially deposited and patterned over the first multilayer structure, the redistribution structure electrically coupled to the photonic IC. The carrier is detached from the heat spreader.

公开(公告)号：US12131984B2

公开(公告)日：2024-10-29

申请号：US18302112

申请日：2023-04-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Po-Hao Tsai ,  Po-Yao Chuang ,  Shin-Puu Jeng ,  Techi Wong

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L23/49822 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L24/81 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/18 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/181 ,  H01L2924/00012

摘要： A semiconductor device and method of manufacture are provided whereby an interposer and a first semiconductor device are placed onto a carrier substrate and encapsulated. The interposer comprises a first portion and conductive pillars extending away from the first portion. A redistribution layer located on a first side of the encapsulant electrically connects the conductive pillars to the first semiconductor device.

公开(公告)号：US20240355664A1

公开(公告)日：2024-10-24

申请号：US18607622

申请日：2024-03-18

申请人： Mitsubishi Electric Corporation

发明人： Kinya YAMASHITA ,  Yasushi TAKAKI ,  Masaki UENO ,  Dai KITANO

IPC分类号： H01L21/683 ,  H01L21/687

CPC分类号： H01L21/6836 ,  H01L21/6838 ,  H01L21/6875 ,  H01L2221/68327

摘要： Provided is a semiconductor manufacturing apparatus preventing unnecessary chips from flying off when the semiconductor chips are stripped. A semiconductor manufacturing apparatus stripping the semiconductor chips obtained by dividing an approximately circular wafer into small pieces through dicing, from a dicing sheet on one surface of which the wafer including the semiconductor chips is attached, the apparatus including: a stage including protrusions; a dicing sheet holder; and a gas evacuation device evacuating gases from a space between the stage and the dicing sheet, wherein the protrusions include first protrusions each including a tapered portion that is tapered in a cross-sectional view and an end disposed on a center portion that is an approximately circular region in a center of the stage, and at least one second protrusion without any tapered portion which includes an end disposed on a perimeter portion surrounding the center portion in a plan view.

公开(公告)号：US20240355596A1

公开(公告)日：2024-10-24

申请号：US18759314

申请日：2024-06-28

申请人： Lam Research Corporation

发明人： Thorsten Lill ,  Mariusch Gregor

IPC分类号： H01J37/32 ,  F04D19/04 ,  H01L21/683 ,  H01L21/687

CPC分类号： H01J37/32834 ,  F04D19/042 ,  H01J37/3244 ,  H01J37/32513 ,  H01J37/32715 ,  H01L21/68785 ,  H01L21/68792 ,  H01J37/321 ,  H01J37/32633 ,  H01L21/6831

摘要： A processing chamber and method of etching a semiconductor substrate are presented. The processing chamber is symmetric, with the centerlines of a chuck and stem of a stage to retain a semiconductor substrate aligned with a centerline of a passage in a core of a pump used to evacuate the processing chamber and with a centerline of a gas port through which gas is introduced to the processing chamber. The stem extends through the passage and a spiral groove is formed in the passage in only one of the stem or an inner surface of the core to provide pumping action to counter back streaming of the gas from an exhaust of the pump in an intermediate and viscous flow regime inside a gap between the stem and the core.

公开(公告)号：US20240355593A1

公开(公告)日：2024-10-24

申请号：US18136276

申请日：2023-04-18

申请人： Tokyo Electron Limited

发明人： Melvin Verbaas ,  Einosuke Tsuda

IPC分类号： H01J37/32 ,  C23C16/458 ,  C23C16/46 ,  C23C16/509 ,  C23C16/52 ,  H01L21/683

CPC分类号： H01J37/32715 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/509 ,  C23C16/52 ,  H01J37/32568 ,  H01L21/6833 ,  H01J37/32082 ,  H01J2237/002 ,  H01J2237/2007

摘要： An electrostatic chuck (ESC) for holding a workpiece in a plasma processing chamber, where the ESC includes a monolithic insulating substrate with a top surface; a plurality of electrodes embedded in the insulating substrate, the plurality of electrodes being in a multipolar configuration to receive multiple DC bias signals from a first power supply circuit; and a radio frequency (RF) electrode embedded in the insulating substrate, the plurality of electrodes being located between the top surface and the RF electrode, the RF electrode including a contact node configured to be coupled to a second power supply circuit configured to generate an RF signal.

公开(公告)号：US12125798B2

公开(公告)日：2024-10-22

申请号：US17242704

申请日：2021-04-28

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chen-Hua Yu ,  Jeng-Shien Hsieh ,  Chuei-Tang Wang ,  Chieh-Yen Chen

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0652 ,  H01L2221/68372 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2225/06548

摘要： A semiconductor device includes a first plurality of dies on a wafer, a first redistribution structure over the first plurality of dies, and a second plurality of dies on the first redistribution structure opposite the first plurality of dies. The first redistribution structure includes a first plurality of conductive features. Each die of the first plurality of dies are bonded to respective conductive features of the first plurality of conductive features by metal-metal bonds on a bottom side of the first redistribution structure. Each die of the second plurality of dies are bonded to respective conductive features of the first plurality of conductive features in the first redistribution structure by metal-metal bonds on a top side of the first redistribution structure.

公开(公告)号：US12125737B1

公开(公告)日：2024-10-22

申请号：US18736423

申请日：2024-06-06

申请人： Monolithic 3D Inc.

发明人： Zvi Or-Bach ,  Brian Cronquist ,  Deepak C. Sekar

IPC分类号： H01L21/683 ,  G11C8/16 ,  H01L21/74 ,  H01L21/762 ,  H01L21/768 ,  H01L21/822 ,  H01L21/8238 ,  H01L21/84 ,  H01L23/48 ,  H01L23/525 ,  H01L27/02 ,  H01L27/06 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/118 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H10B10/00 ,  H10B12/00 ,  H10B20/00 ,  H10B41/20 ,  H10B41/40 ,  H10B41/41 ,  H10B43/20 ,  H10B43/40 ,  H01L23/00 ,  H01L23/367 ,  H01L25/00 ,  H01L25/065 ,  H10B20/20

CPC分类号： H01L21/6835 ,  G11C8/16 ,  H01L21/743 ,  H01L21/76254 ,  H01L21/76898 ,  H01L21/8221 ,  H01L21/823828 ,  H01L21/84 ,  H01L23/481 ,  H01L23/5252 ,  H01L27/0207 ,  H01L27/0688 ,  H01L27/092 ,  H01L27/10 ,  H01L27/105 ,  H01L27/11807 ,  H01L27/11898 ,  H01L27/1203 ,  H01L29/4236 ,  H01L29/66272 ,  H01L29/66621 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/66901 ,  H01L29/78 ,  H01L29/7841 ,  H01L29/7843 ,  H01L29/7881 ,  H01L29/792 ,  H10B10/00 ,  H10B10/125 ,  H10B12/053 ,  H10B12/09 ,  H10B12/20 ,  H10B12/50 ,  H10B20/00 ,  H10B41/20 ,  H10B41/40 ,  H10B41/41 ,  H10B43/20 ,  H10B43/40 ,  H01L23/3677 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/1214 ,  H01L27/1266 ,  H01L2221/68368 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83894 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01066 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12033 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H10B12/05 ,  H10B20/20

摘要： A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where each of the first transistors includes a single crystal channel; a first metal layer; a second metal layer overlaying the first metal layer; a second level including second transistors, first memory cells including at least one second transistor, and overlaying the second metal layer, a third level including third transistors and overlaying the second level, a fourth level including fourth transistors, second memory cells including at least one fourth transistor, and overlaying the third level, where the first level includes memory control circuits which control writing to the second memory cells, and at least one Phase-Lock-Loop (“PLL”) circuit or at least one Digital-Lock-Loop (“DLL”) circuit.