公开(公告)号：US20240355794A1

公开(公告)日：2024-10-24

申请号：US18497039

申请日：2023-10-30

申请人： Samsung Electronics Co., Ltd.

发明人： Choongbin Yim ,  Jongkook Kim ,  Chengtar Wu

IPC分类号： H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498 ,  H10B80/00

CPC分类号： H01L25/105 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3135 ,  H01L23/3738 ,  H01L23/49822 ,  H01L23/49894 ,  H01L24/08 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H10B80/00 ,  H01L24/83 ,  H01L2224/08145 ,  H01L2224/08235 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83862 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/1436 ,  H01L2924/15153 ,  H01L2924/3511

摘要： A semiconductor package may include: a redistribution layer structure; a semiconductor structure on the redistribution layer structure; a printed circuit board on the redistribution layer structure and extending around a side surface of the semiconductor structure; a molding material extending around the semiconductor structure on the redistribution layer structure; and a silicon interposer on the printed circuit board and the molding material.

公开(公告)号：US12125766B2

公开(公告)日：2024-10-22

申请号：US17537689

申请日：2021-11-30

申请人： Samsung Electronics Co., Ltd.

发明人： Tae Hwan Kim ,  Jae Choon Kim ,  Kyung Suk Oh

IPC分类号： H01L35/32 ,  F25B21/02 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/38 ,  H01L23/48 ,  H01L23/522 ,  H01L25/16

CPC分类号： H01L23/38 ,  H01L23/3121 ,  H01L23/3738 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/16 ,  H01L25/16 ,  H01L24/73 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/73204

摘要： A semiconductor package includes a first package substrate, a first semiconductor chip on the first package substrate, a plurality of first chip bumps between the first package substrate and the first semiconductor chip, a plurality of second semiconductor chips sequentially stacked on the first semiconductor chip, a molding member which covers the plurality of second semiconductor chips, on the first semiconductor chip, and a thermoelectric cooling layer attached onto a surface of the first semiconductor chip. The thermoelectric cooling layer includes a cooling material layer extending along the surface of the first semiconductor chip, a first electrode pattern which surrounds the plurality of first chip bumps from a planar viewpoint, in the cooling material layer, and a second electrode pattern which surrounds the first electrode pattern from the planar viewpoint, in the cooling material layer.

公开(公告)号：US20240347497A1

公开(公告)日：2024-10-17

申请号：US18301367

申请日：2023-04-17

申请人： International Business Machines Corporation

发明人： SHIDONG LI ,  Kenneth Charles Marston ,  Kalind BARAYA

IPC分类号： H01L23/00 ,  H01L23/373 ,  H01L23/473

CPC分类号： H01L24/32 ,  H01L23/3733 ,  H01L23/473 ,  H01L24/29 ,  H01L24/83 ,  H01L23/3738 ,  H01L23/481 ,  H01L2224/29109 ,  H01L2224/29147 ,  H01L2224/29166 ,  H01L2224/29184 ,  H01L2224/29186 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32235 ,  H01L2224/32245 ,  H01L2224/83191 ,  H01L2224/83894 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2924/0544

摘要： Semiconductor structures are provided with five different cooling elements directly bonded to a semiconductor chip. The cooling element is directly bonded to the backside of a thinned semiconductor substrate or to the front side back-end-of-line (BEOL) interconnect wiring of the semiconductor chip. The cooling element replaces a carrier wafer on semiconductor chips with backside BEOL interconnect wiring. Each of the five cooling elements provide better thermal conductivity for the semiconductor structure when directly bonded to the front side BEOL interconnect wiring than the carrier wafer typically bonded to a semiconductor chip with backside BEOL interconnect wiring. The cooling element is one of a copper cooling element with water-filled microchannels, or a copper plate, a silicon cooling element with water-filled microchannels, a silicon carbide plate, or a glass plate with copper-filled vias. The cooling element is directly bonded to the semiconductor chip by a hybrid bond.

公开(公告)号：US20240234245A1

公开(公告)日：2024-07-11

申请号：US18612949

申请日：2024-03-21

申请人： Intel Corporation

发明人： Shrenik KOTHARI ,  Chandra Mohan JHA ,  Weihua TANG ,  Robert SANKMAN ,  Xavier BRUN ,  Pooya TADAYON

IPC分类号： H01L23/42 ,  H01L23/00 ,  H01L23/367 ,  H01L23/373 ,  H01L23/495 ,  H01L23/522 ,  H01L23/538 ,  H01L25/07

CPC分类号： H01L23/42 ,  H01L23/367 ,  H01L23/3738 ,  H01L23/522 ,  H01L23/49575 ,  H01L23/5384 ,  H01L24/20 ,  H01L25/072

摘要： Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.

公开(公告)号：US20240149565A1

公开(公告)日：2024-05-09

申请号：US18550096

申请日：2022-02-18

申请人： NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

发明人： Takashi MATSUMAE ,  Hideki TAKAGI ,  Hitoshi UMEZAWA ,  Yuuichi KURASHIMA ,  Eiji HIGURASHI

IPC分类号： B32B18/00 ,  H01L23/373

CPC分类号： B32B18/00 ,  H01L23/3738

摘要： There is provided a silicon carbide composite body that can be expected to have efficient heat conduction and electrical conduction between bonding base materials. The silicon carbide composite body includes a first base material including silicon carbide having a silicon oxide layer SiOx formed on the surface and a second base material which has an oxide layer MOy with an element M, which is one or more of metals that forms an oxide in the atmosphere (excluding alkali metals and alkaline earth metals), Si, Ge, As, Se, Sb, and C in diamond on the surface, and is bonded to the first base material such that the MOy side faces the SiOx side, and when at least some of C in silicon carbide forms C—O-M bonds and/or at least some of Si in the silicon carbide forms Si—O−M bonds, the second base material is bonded to the first base material.

公开(公告)号：US20240063091A1

公开(公告)日：2024-02-22

申请号：US17891735

申请日：2022-08-19

申请人： Intel Corporation

发明人： Adel Elsherbini ,  Feras Eid ,  Scot Kellar ,  Yoshihiro Tomita ,  Rajiv Mongia ,  Kimin Jun ,  Shawna Liff ,  Wenhao Li ,  Johanna Swan ,  Bhaskar Jyoti Krishnatreya ,  Debendra Mallik ,  Krishna Vasanth Valavala ,  Lei Jiang ,  Xavier Brun ,  Mohammad Enamul Kabir ,  Haris Khan Niazi ,  Jiraporn Seangatith ,  Thomas Sounart

IPC分类号： H01L23/473 ,  H01L23/00 ,  H01L25/065 ,  H01L23/367 ,  H01L23/373

CPC分类号： H01L23/473 ,  H01L24/08 ,  H01L25/0652 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L23/3677 ,  H01L23/3675 ,  H01L23/3732 ,  H01L23/3738 ,  H01L2924/3511 ,  H01L2224/08145 ,  H01L2224/08121 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/182 ,  H01L2924/186

摘要： Microelectronic devices, assemblies, and systems include a multichip composite device having one or more chiplets bonded to a base die and an inorganic dielectric material adjacent the chiplets and over the base die. The multichip composite device is coupled to a structural member that is made of or includes a heat conducting material, or has integrated fluidic cooling channels to conduct heat from the chiplets and the base die.

公开(公告)号：US20240063074A1

公开(公告)日：2024-02-22

申请号：US17889868

申请日：2022-08-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Yu Chen ,  Yu Hsiang Chen ,  Cheng Hung Wu ,  Wei-Pin Changchien ,  Ming-Fa Chen

IPC分类号： H01L23/367 ,  H01L23/473 ,  H01L23/373 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L23/367 ,  H01L23/473 ,  H01L23/3732 ,  H01L23/3736 ,  H01L23/3738 ,  H01L23/373 ,  H01L25/0657 ,  H01L25/50 ,  H01L24/32 ,  H01L2224/32245 ,  H01L2224/29124 ,  H01L2224/29147 ,  H01L2224/29105 ,  H01L2224/29117 ,  H01L2224/29144 ,  H01L2224/2916 ,  H01L2224/29123 ,  H01L2224/29155 ,  H01L2224/29169 ,  H01L2224/29139 ,  H01L2224/29166 ,  H01L2224/29184 ,  H01L2224/29118 ,  H01L2224/29138 ,  H01L2224/29193 ,  H01L2224/29186 ,  H01L24/29 ,  H01L2224/08145 ,  H01L24/08 ,  H01L2224/16145 ,  H01L24/16 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L24/73

摘要： A semiconductor package is disclosed. The semiconductor package includes a package substrate. The semiconductor package includes a semiconductor die having a first surface attached to the package substrate and a second surface. The semiconductor package includes a heat sink attached to the second surface of the semiconductor die. The semiconductor package includes a heat dissipation layer interposed between the heat sink and the semiconductor die. The heat dissipation layer comprises one or more high-k dielectric materials.

公开(公告)号：US20240006262A1

公开(公告)日：2024-01-04

申请号：US18176695

申请日：2023-03-01

申请人： Samsung Electronics Co., Ltd.

发明人： Kyungdon MUN ,  Eungkyu Kim ,  Hyeonseok Lee

IPC分类号： H01L23/367 ,  H01L25/16 ,  H10B80/00 ,  H01L23/498 ,  H01L23/373

CPC分类号： H01L23/3677 ,  H01L25/165 ,  H10B80/00 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/3738 ,  H01L24/16

摘要： A semiconductor package includes a first redistribution structure, a first die above the first redistribution structure, a second die above the first die, a heat dissipation unit on side surfaces of the first die or the second die, and a second redistribution structure above the second die. The semiconductor package includes a first post protruding from an upper surface of the first redistribution structure and extending to a lower surface of the second redistribution structure, a second post connecting the heat dissipation unit with a heat dissipation redistribution structure as a thermal path, and a molding unit filling an empty space between the first redistribution structure and the second redistribution structure. An outer pad of the heat dissipation redistribution structure is exposed to an outside of the semiconductor package, and an inner pad of the heat dissipation redistribution structure is in contact with the second post.

公开(公告)号：US11842941B2

公开(公告)日：2023-12-12

申请号：US17700956

申请日：2022-03-22

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Youngho Kim ,  Hwanpil Park

IPC分类号： H01L23/34 ,  H01L23/367 ,  H01L23/373 ,  H01L23/40 ,  H01L23/492 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/3738 ,  H01L23/40 ,  H01L23/492 ,  H01L24/19 ,  H01L25/105 ,  H01L23/49816 ,  H01L23/5389 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/19 ,  H01L2224/73259 ,  H01L2924/15153

摘要： A method of fabricating a semiconductor package structure is provided. The structure is configured to include a base substrate, a die placed on the base substrate, the die including a semiconductor device, a solder bump placed on one surface of the die to exhaust heat generated in the die to an outside; and a solder ball placed on other surface of the die facing the one surface to transmit a signal, which is produced by the semiconductor device of the die, to an external device.

公开(公告)号：US11756860B2

公开(公告)日：2023-09-12

申请号：US16522443

申请日：2019-07-25

申请人： Intel Corporation

发明人： Shrenik Kothari ,  Chandra Mohan Jha ,  Weihua Tang ,  Robert Sankman ,  Xavier Brun ,  Pooya Tadayon

IPC分类号： H01L23/42 ,  H01L23/522 ,  H01L23/373 ,  H01L23/367 ,  H01L25/07 ,  H01L23/538

CPC分类号： H01L23/42 ,  H01L23/367 ,  H01L23/3738 ,  H01L23/522 ,  H01L23/5384 ,  H01L25/072

摘要： Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.