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公开(公告)号：US20160148857A1
公开(公告)日：2016-05-26
申请号：US14555405
申请日：2014-11-26
发明人： Jing-Cheng Lin , Po-Hao Tsai , Li-Hui Cheng , Porter Chen
IPC分类号： H01L23/48 , H01L21/768 , H01L23/532 , H01L21/56 , H01L23/528 , H01L23/31
CPC分类号： H01L25/105 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49811 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/92 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16145 , H01L2224/19 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73259 , H01L2224/73265 , H01L2224/83005 , H01L2224/9222 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/15311 , H01L2924/181 , H01L2224/83 , H01L2924/00012
摘要： A semiconductor device and method for providing an enhanced removal of heat from a semiconductor die within an integrated fan out package on package configuration is presented. In an embodiment a metal layer is formed on a backside of the semiconductor die, and the semiconductor die along and through vias are encapsulated. Portions of the metal layer are exposed and a thermal die is connected to remove heat from the semiconductor die.
摘要翻译： 提出了一种半导体器件和方法，用于在封装结构下的集成扇形封装中提供从半导体管芯增强的热量去除。 在一个实施例中，金属层形成在半导体管芯的背面上，并且沿着通孔和通孔的半导体管芯被封装。 金属层的一部分被暴露，并且连接热模以从半导体管芯移除热量。
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公开(公告)号：US09349701B2
公开(公告)日：2016-05-24
申请号：US14690581
申请日：2015-04-20
发明人： Cheng-Lin Huang , I-Ting Chen , Ying Ching Shih , Po-Hao Tsai , Szu Wei Lu , Jing-Cheng Lin , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/00 , H01L23/498
CPC分类号： H01L24/14 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/17 , H01L24/81 , H01L2224/0346 , H01L2224/03912 , H01L2224/0401 , H01L2224/1146 , H01L2224/11462 , H01L2224/11472 , H01L2224/1161 , H01L2224/11622 , H01L2224/13011 , H01L2224/13014 , H01L2224/13078 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/1405 , H01L2224/14051 , H01L2224/145 , H01L2224/16238 , H01L2224/17107 , H01L2224/81141 , H01L2224/81193 , H01L2224/81815 , H01L2224/81897 , H01L2924/1305 , H01L2924/1306 , H01L2924/00014 , H01L2924/01047 , H01L2924/01082 , H01L2924/01029 , H01L2924/0103 , H01L2924/01083 , H01L2924/01053 , H01L2924/01079 , H01L2924/01051 , H01L2924/014 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device includes a substrate having a major surface and conductive bumps distributed over the major surface of the substrate. Each conductive bump of a first subset of the conductive bumps comprises a regular body and a second subset of the conductive bumps comprises a group of separate conductive bumps uniformly distributed around a periphery of a central opening.
摘要翻译： 半导体器件包括具有主表面的衬底和分布在衬底的主表面上的导电凸块。 导电凸块的第一子集的每个导电凸块包括规则体，并且导电凸块的第二子集包括均匀地分布在中心开口的周边上的一组单独的导电凸块。
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公开(公告)号：US09343431B2
公开(公告)日：2016-05-17
申请号：US13939003
申请日：2013-07-10
发明人： Ying-Ching Shih , Szu Wei Lu , Jing-Cheng Lin
IPC分类号： H01L25/065 , H01L23/00 , H01L25/00 , H01L23/498 , H05K3/34
CPC分类号： H01L25/0657 , H01L23/49816 , H01L23/49827 , H01L24/02 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/50 , H01L2224/024 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/1703 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81001 , H01L2224/81007 , H01L2224/81191 , H01L2224/81192 , H01L2224/831 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/3511 , H01L2924/3841 , H05K3/3436 , H05K2201/10568 , H05K2201/10734 , H05K2201/2036 , Y02P70/613 , H01L2224/81 , H01L2224/83 , H01L2224/05552 , H01L2924/00 , H01L2924/014 , H01L2924/00012
摘要： A package structure includes a bottom package component, a top package component overlying and bonded to the bottom package component, and a dam between the bottom package component and the top package component. The dam has a top surface attached to a bottom surface of the top package component, and a bottom surface spaced apart from a top surface of the bottom package component.
摘要翻译： 封装结构包括底部封装部件，覆盖并结合到底部封装部件的顶部封装部件，以及底部封装部件和顶部封装部件之间的封盖。 坝具有附接到顶部封装部件的底表面的顶表面和与底部封装部件的顶表面间隔开的底表面。
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公开(公告)号：US09337063B2
公开(公告)日：2016-05-10
申请号：US14323960
申请日：2014-07-03
发明人： Chih-Hao Chen , Long Hua Lee , Chun-Hsing Su , Yi-Lin Tsai , Kung-Chen Yeh , Chung Yu Wang , Jui-Pin Hung , Jing-Cheng Lin
CPC分类号： H01L21/563 , H01L21/561 , H01L21/78 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/81 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L29/0657 , H01L2224/131 , H01L2224/16225 , H01L2224/17181 , H01L2224/26145 , H01L2224/2919 , H01L2224/32145 , H01L2224/73204 , H01L2224/81193 , H01L2224/81815 , H01L2224/83104 , H01L2224/9202 , H01L2224/92125 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/351 , H01L2224/81 , H01L2224/32225 , H01L2924/00 , H01L2924/00014 , H01L2224/11 , H01L2924/014 , H01L2924/0665
摘要： A wafer level package includes a semiconductor die bonded on a supporting wafer. The semiconductor die has at least a step recess at its substrate. An underfill layer is formed between the semiconductor die and the supporting wafer. Moreover, the height of the underfill layer is limited by the step recess. During a fabrication process of the wafer level package, the step recess helps to reduce the stress on the wafer level package.
摘要翻译： 晶片级封装包括结合在支撑晶片上的半导体管芯。 半导体管芯在其衬底上至少有一个台阶凹槽。 在半导体管芯和支撑晶片之间形成底部填充层。 此外，底部填充层的高度受到台阶凹槽的限制。 在晶片级封装的制造过程中，台阶凹槽有助于减小晶片级封装上的应力。
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公开(公告)号：US09281297B2
公开(公告)日：2016-03-08
申请号：US14449573
申请日：2014-08-01
发明人： Jing-Cheng Lin , Chen-Hua Yu , Szu Wei Lu , Shih Ting Lin , Shin-Puu Jeng
IPC分类号： H01L25/065 , H01L21/56 , H01L21/768 , H01L21/66 , H01L23/31 , H01L23/48 , H01L23/00 , H01L25/00 , H01L25/10
CPC分类号： H01L25/105 , H01L21/565 , H01L21/76802 , H01L21/76877 , H01L22/14 , H01L23/3107 , H01L23/3128 , H01L23/481 , H01L24/09 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/81 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2224/023 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/81815 , H01L2224/83 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06548 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2225/1082 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00012 , H01L2924/00 , H01L2924/207 , H01L2224/45099
摘要： A package includes a first package including a device die, a molding compound molding the device die therein, a through-via penetrating through the molding compound, and a first plurality of Redistribution Lines (RDLs) and a second plurality of RDLs on opposite sides of the molding compound. The through-via electrically couples one of the first plurality of RDLs to one of the second plurality of RDLs. The package further includes a second package bonded to the first package, a spacer disposed in a gap between the first package and the second package, and a first electrical connector and a second electrical connector on opposite sides of the spacer. The first electrical connector and the second electrically couple the first package to the second package. The spacer is spaced apart from the first electrical connector and the second electrical connector.
摘要翻译： 一种包装包括：第一包装，包括装置模具，模制其中的装置模具的模塑料，穿过模塑料的通孔，以及第一多个再分配线（RDL）和第二多个RDL， 模塑料。 通孔将第一多个RDL中的一个电耦合到第二多个RDL中的一个。 该封装还包括结合到第一封装的第二封装，设置在第一封装和第二封装之间的间隙中的间隔件，以及在间隔件的相对侧上的第一电连接器和第二电连接器。 第一电连接器和第二电连接器将第一封装电耦合到第二封装。 间隔件与第一电连接器和第二电连接器间隔开。
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公开(公告)号：US20160049363A1
公开(公告)日：2016-02-18
申请号：US14460089
申请日：2014-08-14
发明人： Li-Hui Cheng , Po-Hao Tsai , Jing-Cheng Lin
IPC分类号： H01L23/522 , H01L21/56 , H01L21/768 , H01L23/28 , H01L23/532
CPC分类号： H01L24/24 , H01L21/4853 , H01L21/56 , H01L21/6835 , H01L21/6836 , H01L21/76838 , H01L23/28 , H01L23/3128 , H01L23/481 , H01L23/49816 , H01L24/02 , H01L24/12 , H01L24/19 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68359 , H01L2221/68381 , H01L2224/02311 , H01L2224/02313 , H01L2224/02379 , H01L2224/02381 , H01L2224/12105 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73259 , H01L2224/73265 , H01L2224/73267 , H01L2224/83005 , H01L2224/92244 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1058 , H01L2225/1082 , H01L2924/00014 , H01L2924/15311 , H01L2924/00012 , H01L2224/82 , H01L2224/83 , H01L2924/00 , H01L2224/05599 , H01L2224/45099
摘要： A semiconductor device and method utilizing a dummy structure in association with a redistribution layer is provided. By providing the dummy structure adjacent to the redistribution layer, damage to the redistribution layer may be reduced from a patterning of an overlying passivation layer, such as by laser drilling. By reducing or eliminating the damage caused by the patterning, a more effective bond to an overlying structure, such as a package, may be achieved.
摘要翻译： 提供了一种利用与再分配层相关联的虚拟结构的半导体器件和方法。 通过提供与再分配层相邻的虚拟结构，可以例如通过激光钻孔从覆盖钝化层的图案化中减少对再分布层的损伤。 通过减少或消除由图案形成引起的损伤，可以实现对覆盖结构（例如封装）的更有效的粘合。
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公开(公告)号：US09171815B2
公开(公告)日：2015-10-27
申请号：US14495399
申请日：2014-09-24
发明人： Yung-Chi Lin , Jing-Cheng Lin , Chen-Hua Yu
IPC分类号： H01L21/00 , H01L21/30 , H01L21/46 , H01L23/00 , H01L21/48 , H01L21/56 , H01L23/29 , H01L23/31 , H01L23/538 , H01L21/768 , H01L23/498
CPC分类号： H01L21/4857 , H01L21/4846 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/768 , H01L23/295 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L24/03 , H01L24/11 , H01L24/19 , H01L24/24 , H01L25/0657 , H01L25/50 , H01L2221/68359 , H01L2224/02331 , H01L2224/02372 , H01L2224/0239 , H01L2224/0401 , H01L2224/12105 , H01L2224/16225 , H01L2224/24227 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2225/06517 , H01L2225/06548 , H01L2225/06572 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01059 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： A package system includes a first integrated circuit disposed over an interposer. The interposer includes at least one molding compound layer including a plurality of electrical connection structures through the at least one molding compound layer. A first interconnect structure is disposed over a first surface of the at least one molding compound layer and electrically coupled with the plurality of electrical connection structures. The first integrated circuit is electrically coupled with the first interconnect structure.
摘要翻译： 封装系统包括设置在插入器上的第一集成电路。 所述插入器包括至少一个包含穿过所述至少一个模塑复合层的多个电连接结构的模塑复合层。 第一互连结构设置在至少一个模塑复合层的第一表面上并与多个电连接结构电耦合。 第一集成电路与第一互连结构电耦合。
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68.发明授权公开(公告)号：US09142432B2
公开(公告)日：2015-09-22
申请号：US14026742
申请日：2013-09-13
发明人： Po-Hao Tsai , Li-Hui Cheng , Jui-Pin Hung , Jing-Cheng Lin
IPC分类号： H01L21/311 , H01L21/56 , H01L23/538 , H01L23/00 , H01L21/683
CPC分类号： H01L24/96 , H01L21/31053 , H01L21/311 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/6836 , H01L21/78 , H01L23/3114 , H01L23/5389 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/19 , H01L2221/68327 , H01L2221/6834 , H01L2221/68359 , H01L2221/68372 , H01L2224/02205 , H01L2224/0231 , H01L2224/02379 , H01L2224/0239 , H01L2224/024 , H01L2224/0401 , H01L2224/04105 , H01L2224/05008 , H01L2224/05025 , H01L2224/05124 , H01L2224/11334 , H01L2224/1146 , H01L2224/11849 , H01L2224/12105 , H01L2224/13026 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2924/04642 , H01L2924/05042 , H01L2924/05442 , H01L2924/0549 , H01L2924/07025 , H01L2924/10253 , H01L2924/1027 , H01L2924/1032 , H01L2924/12042 , H01L2924/1432 , H01L2924/1433 , H01L2924/1434 , H01L2924/181 , H01L2924/1815 , H01L2924/18162 , H01L2924/3512 , H01L2924/00
摘要： A package includes a first die and a second die. The first die includes a first substrate and a first metal pad overlying the first substrate. The second die includes a second substrate and a second metal pad overlying the second substrate. A molding compound molds the first die and the second die therein. The molding compound has a first portion between the first die and the second die, and a second portion, which may form a ring encircles the first portion. The first portion and the second portion are on opposite sides of the first die. The first portion has a first top surface. The second portion has a second top surface higher than the first top surface.
摘要翻译： 包装包括第一模具和第二模具。 第一管芯包括第一衬底和覆盖第一衬底的第一金属焊盘。 第二管芯包括第二衬底和覆盖第二衬底的第二金属焊盘。 模塑料在其中模制第一模具和第二模具。 模塑料具有在第一模具和第二模具之间的第一部分，并且可形成环的第二部分环绕第一部分。 第一部分和第二部分在第一模具的相对侧上。 第一部分具有第一顶面。 第二部分具有高于第一顶表面的第二顶表面。
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公开(公告)号：US09123643B2
公开(公告)日：2015-09-01
申请号：US14599872
申请日：2015-01-19
发明人： Jing-Cheng Lin , Hsin Chang , Shih Ting Lin
IPC分类号： H01L21/78 , H01L23/28 , H01L23/538 , H01L23/00
CPC分类号： H01L23/28 , H01L21/486 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L21/78 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5384 , H01L24/06 , H01L24/14 , H01L24/16 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/50 , H01L2221/68345 , H01L2224/0401 , H01L2224/131 , H01L2224/13147 , H01L2224/13655 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2224/81447 , H01L2224/81455 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2924/014 , H01L2924/15311 , H01L2924/157 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00 , H01L2924/00014
摘要： A package component includes a substrate, wherein the substrate has a front surface and a back surface over the front surface. A through-via penetrates through the substrate. A conductive feature is disposed over the back surface of the substrate and electrically coupled to the through-via. A first dielectric pattern forms a ring covering edge portions of the conductive feature. An Under-Bump-Metallurgy (UBM) is disposed over and in contact with a center portion of the conductive feature. A polymer contacts a sidewall of the substrate. A second dielectric pattern is disposed over and aligned to the polymer. The first and the second dielectric patterns are formed of a same dielectric material, and are disposed at substantially a same level.
摘要翻译： 包装部件包括基板，其中基板具有前表面和在前表面上的后表面。 通孔穿过基底。 导电特征设置在衬底的背表面上并电连接到通孔。 第一电介质图案形成导电特征的环覆盖边缘部分。 底部金属（UBM）被布置在导电特征的中心部分上并与其接触。 聚合物接触衬底的侧壁。 将第二电介质图案设置在聚合物上并对准聚合物。 第一和第二电介质图案由相同的电介质材料形成，并且设置在基本上相同的水平。
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公开(公告)号：US09111914B2
公开(公告)日：2015-08-18
申请号：US14579345
申请日：2014-12-22
发明人： Jing-Cheng Lin , Jui-Pin Hung , Po-Hao Tsai
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L21/768 , H01L23/528
CPC分类号： H01L23/481 , H01L21/486 , H01L21/568 , H01L21/76802 , H01L21/76877 , H01L21/76897 , H01L23/3121 , H01L23/49816 , H01L23/49822 , H01L23/528 , H01L23/5384 , H01L23/5389 , H01L24/19 , H01L24/73 , H01L25/105 , H01L2224/04105 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1058 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/00012 , H01L2924/00
摘要： A fan out package includes a molding compound, a conductive plug in the molding compound, a dielectric covering the molding compound and a portion of the conductive plug, and an interconnect disposed over the dielectric and contacted with the conductive plug, wherein a width of the interconnect contacting the conductive plug is substantially smaller than a width of the conductive plug in the molding compound, and a width of the interconnect disposed over the dielectric is substantially greater than the width of the conductive plug in the molding compound.
摘要翻译： 风扇外包装包括模制化合物，模制化合物中的导电插塞，覆盖模制化合物的电介质和导电插塞的一部分，以及布置在电介质上并与导电插塞接触的互连，其中， 接触导电插塞的互连基本上小于模制化合物中的导电插塞的宽度，并且设置在电介质上的互连件的宽度基本上大于模制化合物中的导电插塞的宽度。
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