公开(公告)号：US09165792B2

公开(公告)日：2015-10-20

申请号：US13625893

申请日：2012-09-25

Applicant: Infineon Technologies AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Anton Mauder

IPC: H01L23/48 ,  H01L21/50 ,  H01L23/31 ,  H01L21/683 ,  H01L21/768 ,  H01L23/00

CPC classification number: H01L21/50 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03462 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/08145 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1316 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27416 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29188 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/80203 ,  H01L2224/80801 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

Abstract: An integrated circuit is provided, the integrated circuit including: a carrier including at least one electronic component and at least one contact area disposed on a first side of the carrier, wherein the at least one electronic component is electrically connected to the at least one contact area; an inorganic material layer wafer bonded to the first side of the carrier, wherein the carrier has a first coefficient of thermal expansion, and wherein the inorganic material layer has a second coefficient of thermal expansion, wherein the second coefficient of thermal expansion has a difference of less than 100% compared with the first coefficient of thermal expansion; and at least one contact via formed through the inorganic material layer, wherein the at least one contact via contacts the at least one contact area.

Abstract translation: 提供集成电路，集成电路包括：载体，其包括至少一个电子部件和布置在载体的第一侧上的至少一个接触区域，其中至少一个电子部件电连接到该至少一个触点 区; 与所述载体的第一侧接合的无机材料层晶片，其中所述载体具有第一热膨胀系数，并且其中所述无机材料层具有第二热膨胀系数，其中所述第二热膨胀系数具有 与第一热膨胀系数相比低于100％; 以及通过无机材料层形成的至少一个接触孔，其中所述至少一个接触通孔接触所述至少一个接触区域。

公开(公告)号：US20150371905A1

公开(公告)日：2015-12-24

申请号：US14746005

申请日：2015-06-22

Applicant: RF Micro Devices, Inc.

Inventor： Michael Carroll ,  Julio C. Costa ,  Philip W. Mason ,  Edward T. Spears ,  Bill Rhyne

IPC: H01L21/84 ,  H01L21/304 ,  H01L21/683 ,  H01L29/10 ,  H01L27/12 ,  H01L23/00 ,  H01L29/167 ,  H01L21/78 ,  H01L27/092

CPC classification number: H01L21/84 ,  H01L21/6835 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L27/1203 ,  H01L29/167 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/08225 ,  H01L2224/11002 ,  H01L2224/32225 ,  H01L2224/73251 ,  H01L2224/73253 ,  H01L2224/80006 ,  H01L2224/80009 ,  H01L2224/80205 ,  H01L2224/80893 ,  H01L2224/80896 ,  H01L2224/83005 ,  H01L2224/83805 ,  H01L2224/8389 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/15738 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2224/83 ,  H01L2924/01014 ,  H01L2924/01079 ,  H01L2224/08 ,  H01L2224/16 ,  H01L2221/6835 ,  H01L2224/11003 ,  H01L21/78

Abstract: A method for manufacturing a semiconductor die includes providing an SOI semiconductor wafer including a substrate, an insulating layer over the substrate, and a device layer over the insulating layer. A surface of the SOI semiconductor wafer opposite the substrate is mounted to a temporary carrier mount, and the substrate is removed, leaving an exposed surface of the insulating layer. A high-resistivity gold-doped silicon substrate is then provided on the exposed surface of the insulating layer. By providing the high-resistivity gold-doped silicon substrate, an exceptionally high-resistivity substrate can be achieved, thereby minimizing field-dependent electrical interaction between the substrate and one or more semiconductor devices thereon. Accordingly, harmonic distortion in the semiconductor devices caused by the substrate will be reduced, thereby increasing the performance of the device.

Abstract translation: 一种半导体晶片的制造方法，其特征在于，在绝缘层上设置包括基板，绝缘层，绝缘层的SOI半导体晶片。 与衬底相对的SOI半导体晶片的表面安装到临时载体安装件，并且去除衬底，留下绝缘层的暴露表面。 然后在绝缘层的暴露表面上提供高电阻率金掺杂硅衬底。 通过提供高电阻率金掺杂硅衬底，可以实现特别高电阻率的衬底，从而最小化衬底与其上的一个或多个半导体器件之间的场相关电相互作用。 因此，由衬底引起的半导体器件中的谐波失真将减小，从而提高器件的性能。

公开(公告)号：US20140084302A1

公开(公告)日：2014-03-27

申请号：US13625893

申请日：2012-09-25

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Khalil Hosseini ,  Joachim Mahler ,  Anton Mauder

IPC: H01L23/498 ,  H01L29/16 ,  H01L21/762 ,  H01L29/20

CPC classification number: H01L21/50 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03462 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05611 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0566 ,  H01L2224/05664 ,  H01L2224/08145 ,  H01L2224/11462 ,  H01L2224/13009 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1316 ,  H01L2224/13164 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/27416 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29188 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/80203 ,  H01L2224/80801 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/01322 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/00

Abstract: An integrated circuit is provided, the integrated circuit including: a carrier including at least one electronic component and at least one contact area disposed on a first side of the carrier, wherein the at least one electronic component is electrically connected to the at least one contact area; an inorganic material layer wafer bonded to the first side of the carrier, wherein the carrier has a first coefficient of thermal expansion, and wherein the inorganic material layer has a second coefficient of thermal expansion, wherein the second coefficient of thermal expansion has a difference of less than 100% compared with the first coefficient of thermal expansion; and at least one contact via formed through the inorganic material layer, wherein the at least one contact via contacts the at least one contact area.

Abstract translation: 提供集成电路，集成电路包括：载体，其包括至少一个电子部件和布置在载体的第一侧上的至少一个接触区域，其中所述至少一个电子部件电连接到所述至少一个触点 区; 与所述载体的第一侧接合的无机材料层晶片，其中所述载体具有第一热膨胀系数，并且其中所述无机材料层具有第二热膨胀系数，其中所述第二热膨胀系数具有 与第一热膨胀系数相比低于100％; 以及通过无机材料层形成的至少一个接触孔，其中所述至少一个接触通孔接触所述至少一个接触区域。

公开(公告)号：US20160190089A1

公开(公告)日：2016-06-30

申请号：US14712729

申请日：2015-05-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Hua Yu ,  Ming-Fa Chen ,  Wen-Ching Tsai

IPC: H01L23/00

CPC classification number: H01L24/81 ,  B81C1/00238 ,  B81C3/001 ,  B81C2203/031 ,  B81C2203/035 ,  H01L21/50 ,  H01L23/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03602 ,  H01L2224/03614 ,  H01L2224/03616 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05149 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/06051 ,  H01L2224/08225 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/16014 ,  H01L2224/16147 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2747 ,  H01L2224/27614 ,  H01L2224/279 ,  H01L2224/27912 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29149 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/32014 ,  H01L2224/32147 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/80805 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/10158 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/0347 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/114 ,  H01L2224/1146 ,  H01L2224/1161 ,  H01L2224/274 ,  H01L2224/2746 ,  H01L2224/2761 ,  H01L21/302 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/80

Abstract: Bonded structures and method of forming the same are provided. A conductive layer is formed on a first surface of a bonded structure, the bonded structure including a first substrate bonded to a second substrate, the first surface of the bonded structure being an exposed surface of the first substrate. A patterned mask having first openings and second openings is formed on the conductive layer, the first openings and the second openings exposing portions of the conductive layer. First portions of first bonding connectors are formed in the first openings and first portions of second bonding connectors are formed in the second openings. The conductive layer is patterned to form second portions of the first bonding connectors and second portions of the second bonding connectors. The bonded structure is bonded to a third substrate using the first bonding connectors and the second bonding connectors.

Abstract translation: 提供了粘合结构及其形成方法。 导电层形成在接合结构的第一表面上，接合结构包括与第二基底结合的第一基底，接合结构的第一表面是第一基底的暴露表面。 具有第一开口和第二开口的图案化掩模形成在导电层上，第一开口和第二开口露出导电层的部分。 第一接合连接器的第一部分形成在第一开口中，第二接合连接器的第一部分形成在第二开口中。 图案化导电层以形成第一接合连接器的第二部分和第二接合连接器的第二部分。 使用第一接合连接器和第二接合连接器将接合结构接合到第三基板。

公开(公告)号：US09287126B2

公开(公告)日：2016-03-15

申请号：US13872632

申请日：2013-04-29

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Chien-Hua Chen ,  Kianush Naeli ,  Stephen R. Farrar

IPC: H01L21/20 ,  H01L23/00 ,  C03C27/00

CPC classification number: H01L21/2007 ,  C03C27/00 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/05638 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/74 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/759 ,  H01L2224/75901 ,  H01L2224/80048 ,  H01L2224/80487 ,  H01L2224/80488 ,  H01L2224/80893 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/80 ,  H01L2924/00012 ,  H01L2924/01014 ,  H01L2924/05442

Abstract: An electric field concurrently anodically bonds together wafers of each of a plurality of independent wafer pairs.

Abstract translation: 电场同时阳极连接在多个独立晶片对中的每一个的晶片。

公开(公告)号：US20170221856A1

公开(公告)日：2017-08-03

申请号：US15519542

申请日：2015-10-19

Applicant: BONDTECH CO., LTD.

Inventor： Akira YAMAUCHI

IPC: H01L23/00 ,  H01L21/683 ,  H01L21/67

CPC classification number: H01L24/83 ,  B23K20/023 ,  B23K20/233 ,  B23K20/24 ,  B23K37/0408 ,  B23K37/047 ,  B23K2101/40 ,  B23K2103/50 ,  H01L21/187 ,  H01L21/67092 ,  H01L21/67259 ,  H01L21/68 ,  H01L21/6831 ,  H01L21/6838 ,  H01L21/68735 ,  H01L23/544 ,  H01L24/75 ,  H01L24/80 ,  H01L24/94 ,  H01L2223/54426 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/7501 ,  H01L2224/75102 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75272 ,  H01L2224/75303 ,  H01L2224/75305 ,  H01L2224/757 ,  H01L2224/75701 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75724 ,  H01L2224/75725 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/759 ,  H01L2224/75901 ,  H01L2224/7592 ,  H01L2224/75981 ,  H01L2224/80012 ,  H01L2224/80013 ,  H01L2224/8003 ,  H01L2224/80047 ,  H01L2224/8009 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80203 ,  H01L2224/80213 ,  H01L2224/80893 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80907 ,  H01L2224/80908 ,  H01L2224/80986 ,  H01L2224/83009 ,  H01L2224/8309 ,  H01L2224/83896 ,  H01L2224/83908 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2224/8001 ,  H01L2224/80009 ,  H01L2224/80121

Abstract: A production of voids between substrates is prevented when the substrates are bonded together, and the substrates are bonded together at a high positional precision while suppressing a strain. A method for bonding a first substrate and a second substrate includes a step of performing hydrophilization treatment to cause water or an OH containing substance to adhere to bonding surface of the first substrate and the bonding surface of the second substrate, a step of disposing the first substrate and the second substrate with the respective bonding surfaces facing each other, and bowing the first substrate in such a way that a central portion of the bonding surface protrudes toward the second substrate side relative to an outer circumferential portion of the bonding surface, a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate at the respective central portions, and a step of abutting the bonding surface of the first substrate with the bonding surface of the second substrate across the entirety of the bonding surfaces, decreasing a distance between the outer circumferential portion of the first substrate and an outer circumferential portion of the second substrate with the respective central portions abutting each other at a pressure that maintains a non-bonded condition.

公开(公告)号：US09704820B1

公开(公告)日：2017-07-11

申请号：US15054907

申请日：2016-02-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Xin-Hua Huang ,  Yung-Lung Lin ,  Ping-Yin Liu ,  Chia-Shiung Tsai

IPC: H01L21/67 ,  H01L23/00 ,  H01L21/50 ,  H01L21/02 ,  H01L21/687

CPC classification number: H01L21/68764 ,  H01L21/02049 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/76251 ,  H01L22/12 ,  H01L22/20 ,  H01L24/05 ,  H01L24/08 ,  H01L24/799 ,  H01L24/80 ,  H01L24/94 ,  H01L24/98 ,  H01L2224/04 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/80203 ,  H01L2224/80801 ,  H01L2224/80805 ,  H01L2224/80893 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80908 ,  H01L2224/80948 ,  H01L2224/80986 ,  H01L2224/94 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2224/08 ,  H01L2224/808

Abstract: A semiconductor manufacturing method is disclosed. The method includes: providing a first wafer and a second wafer, wherein the first wafer and the second wafer are bonded together; submerging the bonded first and second wafers in an ultrasonic transmitting medium; producing ultrasonic waves; and directing the ultrasonic waves to the bonded first and second wafers through the ultrasonic transmitting medium for a predetermined time period. An associated semiconductor manufacturing system for at least weakening a bonding strength of bonded wafers is also disclosed.

公开(公告)号：US09613926B2

公开(公告)日：2017-04-04

申请号：US14712729

申请日：2015-05-14

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Hua Yu ,  Ming-Fa Chen ,  Wen-Ching Tsai

IPC: H01L23/00 ,  B81C3/00 ,  H01L23/10 ,  H01L21/50

CPC classification number: H01L24/81 ,  B81C1/00238 ,  B81C3/001 ,  B81C2203/031 ,  B81C2203/035 ,  H01L21/50 ,  H01L23/10 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03602 ,  H01L2224/03614 ,  H01L2224/03616 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05149 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/06051 ,  H01L2224/08225 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11614 ,  H01L2224/119 ,  H01L2224/11912 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/16014 ,  H01L2224/16147 ,  H01L2224/2745 ,  H01L2224/27452 ,  H01L2224/27462 ,  H01L2224/27464 ,  H01L2224/2747 ,  H01L2224/27614 ,  H01L2224/279 ,  H01L2224/27912 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29014 ,  H01L2224/29082 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29138 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29149 ,  H01L2224/29155 ,  H01L2224/29164 ,  H01L2224/29166 ,  H01L2224/32014 ,  H01L2224/32147 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/80805 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/81815 ,  H01L2224/8183 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/8383 ,  H01L2224/92 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/10158 ,  H01L2924/1461 ,  H01L2924/163 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00012 ,  H01L2224/0347 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/114 ,  H01L2224/1146 ,  H01L2224/1161 ,  H01L2224/274 ,  H01L2224/2746 ,  H01L2224/2761 ,  H01L21/302 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L2224/80

Abstract: Bonded structures and method of forming the same are provided. A conductive layer is formed on a first surface of a bonded structure, the bonded structure including a first substrate bonded to a second substrate, the first surface of the bonded structure being an exposed surface of the first substrate. A patterned mask having first openings and second openings is formed on the conductive layer, the first openings and the second openings exposing portions of the conductive layer. First portions of first bonding connectors are formed in the first openings and first portions of second bonding connectors are formed in the second openings. The conductive layer is patterned to form second portions of the first bonding connectors and second portions of the second bonding connectors. The bonded structure is bonded to a third substrate using the first bonding connectors and the second bonding connectors.

公开(公告)号：US20140322892A1

公开(公告)日：2014-10-30

申请号：US13872632

申请日：2013-04-29

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Chien-Hua Chen ,  Kianush Naeli ,  Stephen R. Farrar

IPC: H01L23/00

CPC classification number: H01L21/2007 ,  C03C27/00 ,  H01L24/74 ,  H01L24/80 ,  H01L2224/05638 ,  H01L2224/05687 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/74 ,  H01L2224/75102 ,  H01L2224/7525 ,  H01L2224/759 ,  H01L2224/75901 ,  H01L2224/80048 ,  H01L2224/80487 ,  H01L2224/80488 ,  H01L2224/80893 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2224/80 ,  H01L2924/00012 ,  H01L2924/01014 ,  H01L2924/05442

Abstract: An electric field concurrently anodically bonds together wafers of each of a plurality of independent wafer pairs.

Abstract translation: 电场同时阳极连接在多个独立晶片对中的每一个的晶片。

公开(公告)号：US08590389B2

公开(公告)日：2013-11-26

申请号：US13370758

申请日：2012-02-10

Applicant: Chin-Fu Hsu ,  Chia-Hsing Shih

Inventor： Chin-Fu Hsu ,  Chia-Hsing Shih

IPC: G01L9/02 ,  H01L21/58

CPC classification number: G01L9/0047 ,  B81B3/0094 ,  B81B2201/0264 ,  B81B2207/015 ,  G01L9/0054 ,  G01L9/0072 ,  H01L24/08 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L2224/08245 ,  H01L2224/32225 ,  H01L2224/80805 ,  H01L2224/80893 ,  H01L2224/80894 ,  H01L2224/8385 ,  H01L2224/8389 ,  H01L2924/01322 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15156 ,  H01L2924/00014

Abstract: The present invention discloses a Micro-Electro-Mechanical System (MEMS) pressure sensor device and a manufacturing method thereof. The MEMS pressure sensor device includes: a substrate having at least one recess formed on an upper surface thereof, the recess defining a boss; a membrane, which is bonded to at least a part of the upper surface and at least a part of the boss, so that the at least one recess forms a cavity; at least one sensing unit, which is coupled to the membrane, for sensing deflection of the membrane; and an opening, which is formed on a lower surface of the substrate, and connects to the cavity.

Abstract translation: 本发明公开了一种微机电系统（MEMS）压力传感器装置及其制造方法。 MEMS压力传感器装置包括：基底，其具有形成在其上表面上的至少一个凹部，所述凹部限定凸起; 膜，其结合到所述上表面的至少一部分和所述凸台的至少一部分，使得所述至少一个凹部形成空腔; 耦合到膜的至少一个感测单元，用于感测膜的偏转; 以及开口，其形成在所述基板的下表面上并且连接到所述空腔。