公开(公告)号：US20170309593A1

公开(公告)日：2017-10-26

申请号：US15644552

申请日：2017-07-07

Applicant: Tessera, Inc.

Inventor： Teck-Gyu KANG ,  Wei-Shun WANG ,  Hiroaki SATO ,  Kiyoaki HASHIMOTO ,  Yoshikuni NAKADAIRA ,  Norihito MASUDA ,  Belgacem HABA ,  Ilyas MOHAMMED ,  Philip DAMBERG

IPC: H01L23/00 ,  B23K1/00 ,  H01L21/48 ,  H05K3/34 ,  H01L23/498 ,  H05K3/40 ,  H01L21/56 ,  H05K1/11 ,  H01L23/31

CPC classification number: H01L24/81 ,  B23K1/0016 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/8138 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/831 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/113 ,  H05K3/341 ,  H05K3/4007 ,  H05K2201/0195 ,  Y10T29/49126 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

公开(公告)号：US09659858B2

公开(公告)日：2017-05-23

申请号：US14801259

申请日：2015-07-16

Applicant: Tessera, Inc.

Inventor： Ilyas Mohammed ,  Belgacem Haba ,  Cyprian Emeka Uzoh

IPC: H01L23/48 ,  H01L23/532 ,  H01L23/522 ,  H01L21/768

CPC classification number: H01L23/5226 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L2224/10135 ,  H01L2924/07811 ,  H01L2924/00

Abstract: A component can include a substrate having a front surface and a rear surface remote therefrom, an opening extending from the rear surface towards the front surface, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The opening can define an inner surface between the front and rear surfaces. The conductive via can include a first metal layer overlying the inner surface and a second metal region overlying the first metal layer and electrically coupled to the first metal layer. The second metal region can have a CTE greater than a CTE of the first metal layer. The conductive via can have an effective CTE across a diameter of the conductive via that is less than 80% of the CTE of the second metal region.

公开(公告)号：US09633968B2

公开(公告)日：2017-04-25

申请号：US14814781

申请日：2015-07-31

Applicant: Tessera, Inc.

Inventor： Ilyas Mohammed ,  Belgacem Haba ,  Wael Zohni ,  Philip R. Osborn

IPC: H01L23/00 ,  H01L23/522 ,  H01L25/065 ,  H01L23/498 ,  H01L23/538 ,  H01L25/10

CPC classification number: H01L24/46 ,  H01L23/49811 ,  H01L23/49838 ,  H01L23/5226 ,  H01L23/5386 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48105 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: Packaged microelectronic elements are provided which include a dielectric element, a cavity, a plurality of chip contacts and a plurality of package contacts, and microelectronic elements having a plurality of bond pads connected to the chip contacts.

公开(公告)号：US20170110370A1

公开(公告)日：2017-04-20

申请号：US15391393

申请日：2016-12-27

Applicant: Tessera, Inc.

Inventor： Cyprian UZOH ,  Vage OGANESIAN ,  Ilyas MOHAMMED

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L21/3212 ,  H01L21/32125 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76852 ,  H01L21/7688 ,  H01L23/481 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect features in the holes. To prevent erosion/dishing of the conductive layer at the holes, the conductive layer is covered by a sacrificial layer (possibly conformal) before polishing; then both layers are polished. Initially, before polishing, the conductive layer and the sacrificial layer are recessed over the holes, but the sacrificial layer is polished at a lower rate to result in a protrusion of the conductive layer at a location of each hole. The polishing can continue to remove the protrusions and provide a planar surface.

公开(公告)号：US09620437B2

公开(公告)日：2017-04-11

申请号：US15047295

申请日：2016-02-18

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L23/498 ,  H01L21/78 ,  H01L23/14 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/145 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/89 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.

公开(公告)号：US09570382B2

公开(公告)日：2017-02-14

申请号：US14834803

申请日：2015-08-25

Applicant: Tessera, Inc.

Inventor： Belgacem Haba

IPC: H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/315 ,  H01L23/3157 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/1401 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

Abstract: A microelectronic package has a microelectronic element overlying or mounted to a first surface of a substrate and substantially rigid conductive posts projecting above the first surface or projecting above a second surface of the substrate remote therefrom. Conductive elements exposed at a surface of the substrate opposite the surface above which the conductive posts project are electrically interconnected with the microelectronic element. An encapsulant overlies at least a portion of the microelectronic element and the surface of the substrate above which the conductive posts project, the encapsulant having a recess or a plurality of openings each permitting at least one electrical connection to be made to at least one conductive post. At least some conductive posts are electrically insulated from one another and adapted to simultaneously carry different electric potentials. In particular embodiments, the openings in the encapsulant at least partially expose conductive masses joined to posts, fully expose top surfaces of posts and partially expose edge surfaces of posts, or may only partially expose top surfaces of posts.

Abstract translation: 微电子封装具有覆盖或安装到基板的第一表面上的微电子元件，以及突出在第一表面上方或突出在远离其的基板的第二表面上方的基本刚性的导电柱。 暴露在基板的与导电柱突出的表面相对的表面的导电元件与微电子元件电互连。 密封剂覆盖微电子元件的至少一部分和衬底的表面，导电柱突出于其上，密封剂具有凹部或多个开口，每个允许至少一个电连接至少一个导电柱 。 至少一些导电柱彼此电绝缘并且适于同时携带不同的电位。 在特定实施例中，密封剂中的开口至少部分地暴露接合到柱的导电块，完全暴露柱的顶表面并且部分地暴露柱的边缘表面，或者仅部分地暴露柱的顶表面。

公开(公告)号：US09466587B2

公开(公告)日：2016-10-11

申请号：US14679735

申请日：2015-04-06

Applicant: Tessera, Inc.

Inventor： Belgacem Haba ,  Wael Zohni ,  Richard Dewitt Crisp

IPC: H01L25/065 ,  H01L23/04 ,  H01L23/31 ,  H01L23/00 ,  H01L23/482 ,  H01L23/495

CPC classification number: H01L25/0652 ,  H01L23/04 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/4822 ,  H01L23/4952 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/06155 ,  H01L2224/06156 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/4826 ,  H01L2224/48265 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/386 ,  H01L2924/00 ,  H01L2224/7826 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A microelectronic package includes a subassembly including a first substrate and first and second microelectronic elements having contact-bearing faces facing towards oppositely-facing first and second surfaces of the first substrate and each having contacts electrically connected with the first substrate. The contact-bearing faces of the first and second microelectronic elements at least partially overlie one another. Leads electrically connect the subassembly with a second substrate, at least portions of the leads being aligned with an aperture in the second substrate. The leads can include wire bonds extending through an aperture in the first substrate and joined to contacts of the first microelectronic element aligned with the first substrate aperture. In one example, the subassembly can be electrically connected with the second substrate using electrically conductive spacer elements.

公开(公告)号：US20160284627A1

公开(公告)日：2016-09-29

申请号：US15174983

申请日：2016-06-06

Applicant: Tessera, Inc.

Inventor： Vage OGANESIAN ,  Belgacem HABA ,  Ilyas MOHAMMED ,  Craig MITCHELL ,  Piyush SAVALIA

IPC: H01L23/48 ,  H01L25/065 ,  H01L23/00 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

公开(公告)号：US09443822B2

公开(公告)日：2016-09-13

申请号：US14829810

申请日：2015-08-19

Applicant: Tessera, Inc.

Inventor： Wael Zohni

IPC: H01L21/44 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49811 ,  H01L21/4846 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49883 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/84 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11003 ,  H01L2224/11332 ,  H01L2224/1134 ,  H01L2224/13011 ,  H01L2224/13016 ,  H01L2224/13076 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13613 ,  H01L2224/13639 ,  H01L2224/13647 ,  H01L2224/16111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1624 ,  H01L2224/32225 ,  H01L2224/40106 ,  H01L2224/4024 ,  H01L2224/40475 ,  H01L2224/41176 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4813 ,  H01L2224/48225 ,  H01L2224/484 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73204 ,  H01L2224/73213 ,  H01L2224/81192 ,  H01L2224/8184 ,  H01L2224/84 ,  H01L2224/8502 ,  H01L2224/85355 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/01327 ,  H01L2924/12042 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/37099

Abstract: A method is disclosed of fabricating a microelectronic package comprising a substrate overlying the front face of a microelectronic element. A plurality of metal bumps project from conductive elements of the substrate towards the microelectronic element, the metal bumps having first ends extending from the conductive elements, second ends remote from the conductive elements, and lateral surfaces extending between the first and second ends. The metal bumps can be wire bonds having first and second ends attached to a same conductive pad of the substrate. A conductive matrix material contacts at least portions of the lateral surfaces of respective ones of the metal bumps and joins the metal bumps with contacts of the microelectronic element.

Abstract translation: 公开了一种制造微电子封装的方法，该微电子封装包括覆盖在微电子元件前表面上的衬底。 多个金属凸块从基板的导电元件朝向微电子元件突出，金属凸块具有从导电元件延伸的第一端，远离导电元件的第二端以及在第一和第二端之间延伸的侧表面。 金属凸块可以是具有连接到基板的相同导电焊盘的第一端和第二端的引线键合。 导电基质材料接触相应金属凸块的侧表面的至少一部分，并将金属凸块与微电子元件的触点接合。

公开(公告)号：US09362203B2

公开(公告)日：2016-06-07

申请号：US14499162

申请日：2014-09-27

Applicant: Tessera, Inc.

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/50

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L24/03 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

Abstract translation: 制造半导体组件的方法可以包括提供具有前表面，后表面和多个导电焊盘的半导体元件，形成至少一个至少通过相应的一个导电焊盘延伸的孔， 形成从所述后表面至少部分地延伸半导体元件的厚度的开口，使得所述至少一个孔和所述开口在前表面和后表面之间的位置相遇，以及 形成在所述后表面处暴露的至少一个导电元件以电连接到外部装置，所述至少一个导电元件在所述至少一个孔内延伸并且至少进入所述开口中，所述导电元件与相应的导电垫电连接 。