公开(公告)号：US11955459B2

公开(公告)日：2024-04-09

申请号：US17687695

申请日：2022-03-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shu-Hang Liao ,  Chih-Wei Wu ,  Jing-Cheng Lin ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L25/0655 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/17 ,  H01L24/81 ,  H01L25/065 ,  H01L23/3128 ,  H01L2221/68345 ,  H01L2224/0231 ,  H01L2224/04105 ,  H01L2924/15173 ,  H01L2924/181

摘要： A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.

公开(公告)号：US09666553B2

公开(公告)日：2017-05-30

申请号：US14740190

申请日：2015-06-15

申请人： TEXAS INSTRUMENTS INCORPORATED

发明人： Rajen Manicon Murugan ,  Minhong Mi ,  Gary Paul Morrison ,  Jie Chen ,  Kenneth Robert Rhyner ,  Stanley Craig Beddingfield ,  Chittranjan Mohan Gupta ,  Django Earl Trombley

IPC分类号： H01Q1/00 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498 ,  H01Q1/22 ,  H01Q23/00 ,  H05K1/02

CPC分类号： H01L23/66 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/1423 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/30111 ,  H01Q1/2283 ,  H01Q1/3233 ,  H01Q23/00 ,  H05K1/0222 ,  H05K1/0243 ,  H05K1/0245 ,  H05K1/0251 ,  H05K1/181 ,  H05K2201/09609 ,  H05K2201/10734 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A millimeter wave integrated circuit (IC) chip. The IC chip comprises an IC die and a wire bond ball grid array package encapsulating the IC die. The wire bond ball grid array package comprises a solder ball array, a millimeter wave transmit channel, and a millimeter wave receive channel, wherein each millimeter wave transmit and receive channel electrically couples the IC die to a signal ball of the solder ball array and is configured to resonate at an operating frequency band of the millimeter wave IC chip.

公开(公告)号：US09455211B2

公开(公告)日：2016-09-27

申请号：US14577450

申请日：2014-12-19

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wu Sen Chiu ,  Li-Hui Cheng ,  Po-Hao Tsai ,  Jing-Cheng Lin

IPC分类号： H01L23/31 ,  H01L23/48 ,  H01L21/768 ,  H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L21/683 ,  H01L25/065

CPC分类号： H01L23/315 ,  H01L21/268 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/76802 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/544 ,  H01L24/17 ,  H01L24/19 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2224/12105 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： A package includes a molding compound, a through-via penetrating through the molding compound, a device die molded in the molding compound, and a buffer layer on and contacting the molding compound. An opening is through the buffer layer to the through-via. The buffer layer has ripples in a plane parallel to an interface between the molding compound and the buffer layer and around a circumference of the opening. Other embodiments contemplate an additional package bonded to the package, and methods for forming the package.

摘要翻译： 包装包括模塑料，穿透模塑料的通孔，在模塑料中模制的模具，以及在模塑料上接触的缓冲层。 开口通过缓冲层到通孔。 缓冲层在与模制化合物和缓冲层之间的界面平行的平面中并且在开口的圆周周围具有波纹。 其他实施例考虑了结合到包装的附加包装以及用于形成包装的方法。

公开(公告)号：US09449951B2

公开(公告)日：2016-09-20

申请号：US14567580

申请日：2014-12-11

申请人： PS4 Luxco S.a.r.l.

发明人： Yukitoshi Hirose ,  Yushi Inoue ,  Shiro Harashima ,  Takuya Moriya ,  Chihoko Yokobe

IPC分类号： H01L23/495 ,  H01L25/065 ,  H01L23/488 ,  H01L23/498 ,  H01L21/56 ,  H01L25/10 ,  H01L23/00 ,  H01L23/538 ,  H01L23/552 ,  H01L23/31

CPC分类号： H01L25/0657 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/488 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5384 ,  H01L23/552 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/105 ,  H01L2224/05553 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10161 ,  H01L2924/12041 ,  H01L2924/15173 ,  H01L2924/15182 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2224/92247

摘要： A semiconductor device includes an insulating substrate including a first surface and an opposing second surface, and a semiconductor chip. The semiconductor chip is mounted over the first surface, includes signal electrodes, power-supply electrodes and ground electrodes, which connect to pads on the first surface of the insulating substrate. Lands provided on the second surface of the insulating substrate include signal lands, power-supply lands and ground lands through vias penetrate from the first surface to the second surface of the insulating substrate, and include signal vias electrically connected the signal connection pads to the signal lands, power-supply vias electrically connected the power-supply connection pads to the power-supply lands and ground vias electrically connected the ground connection pads to the ground lands. At least one of the signal vias are closer to the connection pads than immediately adjacent one of the power-supply vias or the ground vias.

公开(公告)号：US09373600B2

公开(公告)日：2016-06-21

申请号：US14551277

申请日：2014-11-24

申请人： Semiconductor Components Industries, LLC

发明人： Yenting Wen

IPC分类号： H01L23/00 ,  H01L23/522 ,  H01L23/48 ,  H01L23/498 ,  H01L21/768 ,  H01L23/538 ,  H01L23/31

CPC分类号： H01L24/17 ,  H01L21/76805 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/81 ,  H01L2223/6638 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05025 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/30111 ,  H01L2924/00012 ,  H01L2224/13099 ,  H01L2224/45099 ,  H01L2924/014

摘要： In one embodiment, an electronic package structure includes a substrate having one or more conductive plane layers formed therein. The substrate also includes a plurality of conductive pads on major surface configured to provide electrical interconnects to a next level of assembly. At least one conductive plane layer is configured to have cut-outs above the solder pads so that at least portions of the solder pad are not overlapped by the conductive plane layer.

摘要翻译： 在一个实施例中，电子封装结构包括其中形成有一个或多个导电平面层的衬底。 衬底还包括在主表面上的多个导电焊盘，其被配置为将电互连提供到下一级组装。 至少一个导电平面层被配置为在焊盘上方具有切口，使得焊料焊盘的至少部分不与导电平面层重叠。

公开(公告)号：US09332650B2

公开(公告)日：2016-05-03

申请号：US13494417

申请日：2012-06-12

申请人： Shingo Yoshioka ,  Hiroaki Fujiwara

发明人： Shingo Yoshioka ,  Hiroaki Fujiwara

IPC分类号： H05K3/02 ,  H05K3/18 ,  H05K1/16 ,  H05K3/10 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/38 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K3/184 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15173 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/023 ,  H05K1/0284 ,  H05K1/11 ,  H05K1/162 ,  H05K3/0014 ,  H05K3/0032 ,  H05K3/107 ,  H05K3/381 ,  H05K3/4069 ,  H05K3/4647 ,  H05K3/4661 ,  H05K2201/09381 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2203/0108 ,  H05K2203/0565 ,  Y10T29/49114 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014

摘要： The present invention relates to a method of producing a multilayer circuit board including: a film-forming step of forming a swellable resin film on the surface of an insulative substrate, a circuit groove-forming step of forming circuit grooves having a depth equal to or greater than the thickness of the swellable resin film on the external surface of the film, a catalyst-depositing step of depositing a plating catalyst or the precursor thereof on the surface of the circuit grooves and the surface of the swellable resin film, a film-separating step of swelling the swellable resin film with a particular liquid and then separating the swollen resin film from the insulative substrate surface, and a plating processing step of forming an electrolessly plated film only in the region where the plating catalyst or the plating catalyst formed from the plating catalyst precursor remains unseparated after separation of the film.

摘要翻译： 本发明涉及一种制造多层电路板的方法，包括：在绝缘基板的表面上形成可溶胀树脂膜的成膜步骤，形成电路槽的电路槽形成步骤，该电路槽的深度等于或等于 大于膜的外表面上的可溶胀树脂膜的厚度，在电路槽的表面和可溶胀树脂膜的表面上沉积电镀催化剂或其前体的催化剂沉积步骤， 分离步骤，用特定的液体使溶胀性树脂膜溶胀，然后从膨胀的基材表面分离溶胀的树脂膜;以及电镀处理步骤，仅在由镀催化剂或电镀催化剂形成的镀层催化剂的区域形成无电镀膜 电镀催化剂前体在分离膜后保持未分离。

公开(公告)号：US09275977B2

公开(公告)日：2016-03-01

申请号：US14524906

申请日：2014-10-27

申请人： STMicroelectronics (Grenoble 2) SAS

发明人： Jean-Michel Riviere ,  Nadine Martin

IPC分类号： H01L23/52 ,  H01L25/065 ,  H01L25/10 ,  H01L23/367 ,  H01L23/498 ,  H01L23/538 ,  H01L23/40

CPC分类号： H01L25/0657 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49816 ,  H01L23/5389 ,  H01L25/105 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An electronic system includes a first electronic device (with a first integrated-circuit chip) and a second electronic device (with a second integrated-circuit chip). The second electronic device is stacked above the first electronic device on a same side as the first integrated-circuit chip. Electrical connection elements located around the first integrated-circuit chip electrically connected to the second electronic device to the first electronic device. A metal plate configured for heat capture and transfer extends between the first and second electronic devices. The metal plate includes through-passages aligned to permit the electrical connection elements to pass at a distance.

摘要翻译： 电子系统包括第一电子设备（具有第一集成电路芯片）和第二电子设备（具有第二集成电路芯片）。 第二电子装置在与第一集成电路芯片相同的一侧堆叠在第一电子装置的上方。 电连接元件围绕第一集成电路芯片电连接到第二电子设备到第一电子设备。 配置用于捕获和传送的金属板在第一和第二电子设备之间延伸。 金属板包括对准以允许电连接元件一段距离通过的通孔。

公开(公告)号：US20150255383A1

公开(公告)日：2015-09-10

申请号：US14636850

申请日：2015-03-03

申请人： CANON KABUSHIKI KAISHA

发明人： Ichiro Kataoka ,  Osamu Hamamoto ,  Kazuya Notsu ,  Koji Tamura ,  Kunihiko Minegishi

IPC分类号： H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L23/49811 ,  H01L23/49866 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15184 ,  H01L2924/15313 ,  H01L2924/16195 ,  H01L2924/181 ,  H05K1/0204 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/09781 ,  H05K2201/10719 ,  H05K2201/10727 ,  H05K2203/0465 ,  H01L2224/45099 ,  H01L2924/00012

摘要： A mounting member includes a plurality of internal connecting portions, each of which is electrically connected to an electronic device, and a plurality of external connecting portions, each of which is soldered, wherein the plurality of external connecting portions include a first connecting portion in communication with at least any of the plurality of internal connecting portions, and a second connecting portion different from the first connecting portion, and surfaces of the first connecting portion and the second connecting portion include gold layers, and a thickness of the gold layer of the second connecting portion is smaller than a thickness of the gold layer of the first connecting portion.

摘要翻译： 安装构件包括多个内部连接部分，每个内部连接部分电连接到电子设备，以及多个外部连接部分，每个外部连接部分被焊接，其中多个外部连接部分包括连通的第一连接部分 与多个内部连接部分中的至少任一个以及与第一连接部分不同的第二连接部分，并且第一连接部分和第二连接部分的表面包括金层，并且第二连接部分的金层的厚度 连接部分小于第一连接部分的金层的厚度。

公开(公告)号：US20150221599A1

公开(公告)日：2015-08-06

申请号：US14590252

申请日：2015-01-06

申请人： Shinko Electric Industries Co., Ltd.

发明人： Tomoharu Fujii ,  Yoshihiro Ihara

IPC分类号： H01L23/00 ,  H01L23/12

CPC分类号： H01L23/564 ,  H01L23/12 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/45144 ,  H01L2224/48 ,  H01L2224/49171 ,  H01L2224/85447 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15173 ,  H01L2924/161 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor device includes a wiring substrate. The wiring substrate includes a first surface, a second surface located at an opposite side of the first surface, a cavity formed in the first surface, an electrode pad formed on the first surface surrounding the cavity, and a high frequency wire exposed on the first surface. A semiconductor element is accommodated in the cavity. A bonding wire connects the semiconductor element and the electrode pad. A first protection film is arranged on the first surface of the wiring substrate to cover the first surface, the semiconductor element, the electrode pad, the bonding wire, and the high frequency wire.

摘要翻译： 半导体器件包括布线基板。 布线基板包括第一表面，位于第一表面的相对侧的第二表面，形成在第一表面中的空腔，形成在围绕空腔的第一表面上的电极焊盘和暴露在第一表面上的高频金属丝 表面。 半导体元件容纳在空腔中。 接合线连接半导体元件和电极焊盘。 第一保护膜布置在布线基板的第一表面上以覆盖第一表面，半导体元件，电极焊盘，接合线和高频线。

公开(公告)号：US20150155256A1

公开(公告)日：2015-06-04

申请号：US14558740

申请日：2014-12-03

申请人： BRIDGE SEMICONDUCTOR CORPORATION

发明人： Charles W. C. Lin ,  Chia-Chung Wang

IPC分类号： H01L23/00 ,  H01L21/768

CPC分类号： H01L24/81 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/19 ,  H01L24/25 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/12042 ,  H01L2924/15173 ,  H01L2924/16195 ,  H01L2924/171 ,  H01L2924/37001 ,  H05K1/186 ,  H05K3/3436 ,  H05K3/4694 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

摘要： A method of making a semiconductor package with package-on-package stacking capability is characterized by the step of attaching a chip-on-interposer subassembly on a base carrier with the chip inserted into a through opening of the base carrier and the interposer laterally extending beyond the through opening. The interposer provides primary fan-out routing for the chip whereas dual buildup circuitries formed on both opposite sides of the base carrier provides further fan-out routing and are electrically connected to each other by plated through holes to provide the package with stacking capacity.

摘要翻译： 制造具有封装在一起的封装堆叠能力的半导体封装的方法的特征在于将芯片上插入器子组件附接到基座载体上的步骤，其中芯片插入到基座载体的通孔中，并且插入器横向延伸 超越通过开放。 插入器为芯片提供主要扇出路由，而形成在基座的两个相对侧上的双重积聚电路提供进一步的扇出路由，并且通过电镀通孔彼此电连接，以为封装提供堆叠能力。