公开(公告)号：US20080128664A1

公开(公告)日：2008-06-05

申请号：US11793175

申请日：2005-12-14

Applicant: Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

Inventor： Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

IPC: H01B1/02

CPC classification number: H05K3/323 ,  H01L21/6835 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/083 ,  H05K2203/087 ,  Y02P70/613 ,  H01L2924/00011 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0695 ,  H01L2924/062 ,  H01L2924/0615 ,  H01L2924/068 ,  H01L2924/0705 ,  H01L2924/0675 ,  H01L2924/07001 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00014

Abstract: There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip. Finally, the resin 13 is allowed to cure so that the semiconductor chip 20 is secured to the circuit substrate 10, which leads to in a formation of a flip chip assembly.

Abstract translation: 提供了一种倒装芯片安装树脂组合物，其可用于生产率和可靠性高的倒装芯片安装工艺，因此可以应用于下一代LSI的倒装芯片安装。 这种倒装芯片安装树脂组合物包括在加热树脂13时沸腾的树脂，金属颗粒和对流添加剂12。 在加热树脂13时，金属颗粒熔化，沸腾对流添加剂12在树脂13内对流。 将该倒装芯片安装树脂组合物供给在电路基板10和半导体芯片20之间，随后加热树脂13，使得熔融金属颗粒自组装成电路基板的每个电极和电极的每个电极之间的区域 半导体芯片。 结果，在电路基板的每个电极和半导体芯片的每个电极之间形成电连接。 最后，使树脂13固化，使得半导体芯片20固定到电路基板10，这导致形成倒装芯片组件。

公开(公告)号：US20140177158A1

公开(公告)日：2014-06-26

申请号：US13725356

申请日：2012-12-21

Applicant: Aleksandar Aleksov ,  Shawna M. Liff

Inventor： Aleksandar Aleksov ,  Shawna M. Liff

IPC: H01L23/00 ,  G06F1/20 ,  G06F1/18

CPC classification number: H01L24/80 ,  C08G8/30 ,  C08G2261/3424 ,  C09J5/00 ,  C09J161/14 ,  C09J163/00 ,  C09J165/00 ,  C09J2203/326 ,  C09J2400/163 ,  G06F1/20 ,  G06F2200/201 ,  H01L23/02 ,  H01L23/3672 ,  H01L23/3737 ,  H01L23/433 ,  H01L24/01 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0384 ,  H01L2224/04026 ,  H01L2224/05638 ,  H01L2224/05688 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2731 ,  H01L2224/2732 ,  H01L2224/27416 ,  H01L2224/27418 ,  H01L2224/27422 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83484 ,  H01L2224/83487 ,  H01L2224/83862 ,  H01L2224/83986 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/171 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/05442 ,  H01L2924/05342 ,  H01L2924/095 ,  H01L2924/0665 ,  H01L2924/0715 ,  H01L2924/00012 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/07001 ,  H01L2924/014 ,  H01L2924/04953

Abstract: A thermal matched composite material, suitable for use as a die is described. In one example, the material includes a metal plate and a substrate having a coefficient of thermal expansion (CTE) lower than the metal plate to carry microelectronic circuits. An adhesive layer between the substrate and the metal plate physically attaches the metal plate to the substrate so that the combined metal plate and substrate have a higher CTE than the substrate alone.

Abstract translation: 描述适合用作模具的热匹配复合材料。 在一个示例中，材料包括金属板和具有低于金属板的热膨胀系数（CTE）的基板，以承载微电子电路。 基板和金属板之间的粘合剂层将金属板物理地附接到基板，使得组合的金属板和基板具有比单独的基板更高的CTE。

公开(公告)号：US20240203754A1

公开(公告)日：2024-06-20

申请号：US18527731

申请日：2023-12-04

Applicant: Arieca Inc.

Inventor： Navid Kazem ,  Dylan S. Shah ,  Jeffrey Gelorme ,  Hing Jii Mea ,  Keyton D. Feller

IPC: H01L21/48 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L21/4882 ,  H01L23/3733 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29005 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29301 ,  H01L2224/29305 ,  H01L2224/29309 ,  H01L2224/29311 ,  H01L2224/29347 ,  H01L2224/2936 ,  H01L2224/29366 ,  H01L2224/29372 ,  H01L2224/29379 ,  H01L2224/29387 ,  H01L2224/29388 ,  H01L2224/2939 ,  H01L2224/3201 ,  H01L2224/32221 ,  H01L2224/83201 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2924/0108 ,  H01L2924/0133 ,  H01L2924/0615 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/0675 ,  H01L2924/0695 ,  H01L2924/07001 ,  H01L2924/0715 ,  H01L2924/095

Abstract: A method of deposition of a thermal interface material onto a circuit assembly and an integrated circuit formed therefrom is provided. The method includes depositing a thermal interface material at a first layer thickness between a first layer of a circuit assembly and a second layer of the circuit assembly. The thermal interface material includes an emulsion of liquid metal droplets and polymer. The first layer thickness is at least 1.1 times a D90 of the liquid metal droplets prior to compressing the circuit assembly. The method includes compressing the circuit assembly to decrease the first layer thickness to a second layer thickness, thereby deforming the liquid metal droplets. The second layer thickness is no greater than a D90 of the liquid metal droplets in thermal interface material prior to compressing the circuit assembly.

公开(公告)号：US20180138146A1

公开(公告)日：2018-05-17

申请号：US15354291

申请日：2016-11-17

Applicant: Intel Corporation

Inventor： Bok Eng Cheah ,  Min Suet Lim ,  Jackson Chung Peng Kong

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/538

CPC classification number: H01L25/0652 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/83 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32014 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2924/181 ,  H01L2924/1811 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07001 ,  H01L2924/07025 ,  H01L2924/0675 ,  H01L2924/00014

Abstract: A microelectronic device package including multiple layers of stacked die. Multiple die layers in the package can include two or more die. At least two die in a first layer will be laterally spaced from one another to define a first gap extending in a first direction; and at least two die in a second layer will be laterally spaced from one another to define a second gap extending in a second direction that is angularly offset from the first direction. The first and second directions can be perpendicular to one another.

公开(公告)号：US08709293B2

公开(公告)日：2014-04-29

申请号：US11793175

申请日：2005-12-14

Applicant: Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

Inventor： Takashi Kitae ,  Seiji Karashima ,  Koichi Hirano ,  Toshiyuki Kojima ,  Seiichi Nakatani ,  Shingo Komatsu ,  Yoshihisa Yamashita

IPC: H01B1/02

CPC classification number: H05K3/323 ,  H01L21/6835 ,  H01L23/49838 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/06131 ,  H01L2224/06135 ,  H01L2224/11001 ,  H01L2224/11003 ,  H01L2224/1141 ,  H01L2224/11502 ,  H01L2224/11522 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/16058 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/165 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29316 ,  H01L2224/73204 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/832 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83886 ,  H01L2224/83887 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01061 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K3/3436 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/083 ,  H05K2203/087 ,  Y02P70/613 ,  H01L2924/00011 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/0695 ,  H01L2924/062 ,  H01L2924/0615 ,  H01L2924/068 ,  H01L2924/0705 ,  H01L2924/0675 ,  H01L2924/07001 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/01083 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00014

Abstract: There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip. Finally, the resin 13 is allowed to cure so that the semiconductor chip 20 is secured to the circuit substrate 10, which leads to in a formation of a flip chip assembly.

Abstract translation: 提供了一种倒装芯片安装树脂组合物，其可用于生产率和可靠性高的倒装芯片安装工艺，因此可以应用于下一代LSI的倒装芯片安装。 这种倒装芯片安装树脂组合物包括树脂，金属颗粒和在加热树脂13时沸腾的对流添加剂12.当加热树脂13时，金属颗粒熔化，沸腾对流添加剂12在树脂13内对流。 将该倒装芯片安装树脂组合物供给在电路基板10和半导体芯片20之间，随后加热树脂13，使得熔融金属颗粒自组装成电路基板的每个电极和电极的每个电极之间的区域 半导体芯片。 结果，在电路基板的每个电极和半导体芯片的每个电极之间形成电连接。 最后，使树脂13固化，使得半导体芯片20固定到电路基板10，这导致形成倒装芯片组件。

公开(公告)号：US12100923B2

公开(公告)日：2024-09-24

申请号：US17788501

申请日：2020-12-04

Applicant: SHOWA DENKO MATERIALS CO., LTD.

Inventor： Kunihiko Akai ,  Masayuki Miyaji ,  Junichi Kakehata ,  Yoshinori Ejiri ,  Toshimitsu Moriya

IPC: H01R4/02 ,  H01L23/00 ,  H01R4/58 ,  H01R12/52 ,  H01R12/61 ,  H01R12/62 ,  H05K1/18 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36

CPC classification number: H01R4/02 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01R4/58 ,  H01R12/52 ,  H01R12/613 ,  H01R12/62 ,  H05K1/181 ,  H05K3/323 ,  H05K3/3463 ,  H05K3/3478 ,  H05K3/3494 ,  H05K3/363 ,  H05K3/368 ,  H01L2224/05644 ,  H01L2224/27003 ,  H01L2224/2711 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/29311 ,  H01L2224/29313 ,  H01L2224/29499 ,  H01L2224/3201 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/32505 ,  H01L2224/83201 ,  H01L2224/83444 ,  H01L2224/83815 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/83905 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0635 ,  H01L2924/066 ,  H01L2924/0665 ,  H01L2924/0675 ,  H01L2924/069 ,  H01L2924/07001 ,  H01L2924/07025 ,  H01L2924/0705 ,  H01L2924/0715 ,  H05K2201/10636 ,  H05K2201/10977

Abstract: A connection structure including: a first circuit member having a plurality of first electrodes; a second circuit member having a plurality of second electrodes; and an intermediate layer having a plurality of bonding portions electrically connecting the first electrodes and the second electrodes, in which at least one of the first electrode and the second electrode that are connected by the bonding portion is a gold electrode, and 90% or more of the plurality of bonding portions include a first region containing a tin-gold alloy and connecting the first electrode and the second electrode and a second region containing bismuth and being in contact with the first region.

公开(公告)号：US09520378B2

公开(公告)日：2016-12-13

申请号：US13725356

申请日：2012-12-21

Applicant: Aleksandar Aleksov ,  Shawna M. Liff

Inventor： Aleksandar Aleksov ,  Shawna M. Liff

IPC: H01L23/00 ,  G06F1/18 ,  G06F1/20

CPC classification number: H01L24/80 ,  C08G8/30 ,  C08G2261/3424 ,  C09J5/00 ,  C09J161/14 ,  C09J163/00 ,  C09J165/00 ,  C09J2203/326 ,  C09J2400/163 ,  G06F1/20 ,  G06F2200/201 ,  H01L23/02 ,  H01L23/3672 ,  H01L23/3737 ,  H01L23/433 ,  H01L24/01 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/0384 ,  H01L2224/04026 ,  H01L2224/05638 ,  H01L2224/05688 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2731 ,  H01L2224/2732 ,  H01L2224/27416 ,  H01L2224/27418 ,  H01L2224/27422 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/29294 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/32245 ,  H01L2224/32501 ,  H01L2224/32505 ,  H01L2224/73253 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83201 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83484 ,  H01L2224/83487 ,  H01L2224/83862 ,  H01L2224/83986 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/171 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/05442 ,  H01L2924/05342 ,  H01L2924/095 ,  H01L2924/0665 ,  H01L2924/0715 ,  H01L2924/00012 ,  H01L2924/066 ,  H01L2924/06 ,  H01L2924/07001 ,  H01L2924/014 ,  H01L2924/04953

Abstract: A thermal matched composite material, suitable for use as a die is described. In one example, the material includes a metal plate and a substrate having a coefficient of thermal expansion (CTE) lower than the metal plate to carry microelectronic circuits. An adhesive layer between the substrate and the metal plate physically attaches the metal plate to the substrate so that the combined metal plate and substrate have a higher CTE than the substrate alone.

Abstract translation: 描述适合用作模具的热匹配复合材料。 在一个示例中，材料包括金属板和具有低于金属板的热膨胀系数（CTE）的基板，以承载微电子电路。 基板和金属板之间的粘合剂层将金属板物理地附接到基板，使得组合的金属板和基板具有比单独的基板更高的CTE。

公开(公告)号：US20140252640A1

公开(公告)日：2014-09-11

申请号：US14061198

申请日：2013-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Keun Kwak

IPC: H01L23/49

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L23/5381 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/06135 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48655 ,  H01L2224/48666 ,  H01L2224/48669 ,  H01L2224/48681 ,  H01L2224/48684 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48755 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48781 ,  H01L2224/48784 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/8388 ,  H01L2224/83885 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85455 ,  H01L2224/85466 ,  H01L2224/85469 ,  H01L2224/85476 ,  H01L2224/85481 ,  H01L2224/85484 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06589 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/0715 ,  H01L2924/066 ,  H01L2924/07001 ,  H01L2924/0635 ,  H01L2924/00

Abstract: A substrate including internal interconnections, first and second finger electrodes, and having first to fourth quadrants. External terminals are formed on the substrate and connected to the first and second finger electrodes via the internal interconnections. A first tower including first semiconductor chips is formed on the substrate. First conductive wires are formed between the first semiconductor chips and the first finger electrodes. A second tower including second semiconductor chips is formed on the substrate. Second conductive wires are formed between the second semiconductor chips and the second finger electrodes. The external terminals include a first group connected to the first finger electrodes and configuring a channel, and a second group connected to the second finger electrodes, and configuring another channel. The first finger electrodes are formed on the third quadrant, and the second finger electrodes are formed on the first quadrant.

Abstract translation: 包括内部互连的基板，第一和第二指状电极，并且具有第一至第四象限。 外部端子形成在基板上并通过内部互连连接到第一和第二指状电极。 包括第一半导体芯片的第一塔形成在基板上。 第一导电线形成在第一半导体芯片和第一指状电极之间。 包括第二半导体芯片的第二塔形成在基板上。 在第二半导体芯片和第二指状电极之间形成第二导线。 外部端子包括连接到第一指状电极并构成通道的第一组以及连接到第二指状电极的第二组，并且配置另一个通道。 第一指状电极形成在第三象限上，第二指状电极形成在第一象限上。